Re: RISC-V: Fix round_32.c test on RV32

[Palmer Dabbelt <palmer@dabbelt.com>]

On Wed, 22 May 2024 11:01:16 PDT (-0700), jeffreyalaw@gmail.com wrote:
>
>
> On 5/22/24 6:47 AM, Jivan Hakobyan wrote:
>> After 8367c996e55b2 commit several checks on round_32.c test started to
>> fail.
>> The reason is that we prevent rounding DF->SI->DF on RV32 and instead of
>> a conversation sequence we get calls to appropriate library functions.
>>
>>
>> gcc/testsuite/ChangeLog:
>>          * testsuite/gcc.target/riscv/round_32.c: Fixed test
> I wonder if this test even makes sense for rv32 anymore given we can't
> do a DF->DI as a single instruction and DF->SI is going to give
> incorrect results.  So the underlying optimization to improve those
> rounding cases just doesn't apply to DF mode objects for rv32.
>
> Thoughts?

Unless I'm missing something, we should still be able to do the 
float roundings on rv32?

I think with Zfa we'd also have testable sequences for the double/double 
and float/float roundings, which could be useful to test.  I'm not 
entirely sure there, though, as I always get a bit lost in which FP 
rounding flavors map down.

I'd also kicked off some run trying to promote these to executable 
tests.   IIRC it was just DG stuff (maybe just adding a `dg-do run`?) 
but I don't know where I stashed the results...

> Jeff