From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pl1-x634.google.com (mail-pl1-x634.google.com [IPv6:2607:f8b0:4864:20::634]) by sourceware.org (Postfix) with ESMTPS id B0A1A3858C5E for ; Thu, 27 Oct 2022 23:05:06 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org B0A1A3858C5E Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=dabbelt.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=dabbelt.com Received: by mail-pl1-x634.google.com with SMTP id j12so3231933plj.5 for ; Thu, 27 Oct 2022 16:05:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=dabbelt-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:message-id:to:from:cc :in-reply-to:subject:date:from:to:cc:subject:date:message-id :reply-to; bh=MKR2QPysxZSuBVNBUgBBGSSrjbBiy7jTE3zXsbcxIhw=; b=I7+UZp+MKlpfUTNtIyLvtaTDg6qxFUXCazaqzH8Q9xVPeachG0vhUhncDJ0JwK+qub 6Jo6Y4ypcAmN8QMbh5i2b3WgTS4wawxi7hi8nfwWPWMPd5uPrRU8ztbC6BcPjHDSkp+0 X2mD6044WGhNv2cHmOmvkR6qyDLYM1SvuRqagDxf5RAqY4pBSdRZwpuCaxqDVVXcz7xL svdBf35xKBZmem07mhLO4n3A1J/zLl5z9fcydvIxmh2hR8wmPgnCSKYGJ/wvZ/mJ8qa0 lWVXdaHOzKqi4tWfNpBOf+LdIOS9SnPyHeiHmnzRTNoF+Z386DUEZ43Wto+L2f76z/Av 4DFA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:message-id:to:from:cc :in-reply-to:subject:date:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=MKR2QPysxZSuBVNBUgBBGSSrjbBiy7jTE3zXsbcxIhw=; b=yq230jg29DRQfH99BxPR3UM/PUXyUhW1r9UY2BrJH/cKRK9xPbStJ1zYu51SgZ3phf qPV13WfYhXFp+vZ+yfFMuK7q9bzZVd6vGZVIY5t84/8dtHOg77jv6nsvZuiuX0/pY+Ll AJ5wC55VgTU/0eIXtcEU4W+uQHSdIfQPE7xm98Hm2e6sGLqI6/EjykcGRsvo9eiCWK/Q K7Lhs5x38T72grrmR4AWUCUXriSpGmzhQEmtPMrsU/hr650txhyrWppmMPmGQ2HNjz9s nnPcs95l57dA4s7l3Gbnbc540KBDGxPYc0KXjDGXK/VFSGPuM98W7CnSkCOj78KKrf0B vqQg== X-Gm-Message-State: ACrzQf10vLzSWGVlV4MhgMbVFlUkhZE9jO3Osju6KOYhVjnS2x7GWy56 4hzLVuTHSOO2zo4mJ8jfLlIiQamwlNRinw== X-Google-Smtp-Source: AMsMyM7xNhNPnL2DmZ7tXPenzmOL3YWafSKtzVSM/bLXTa+xlbfXKh9XMlmMBEqoZ3iXsT7e8JeC1Q== X-Received: by 2002:a17:902:7c11:b0:178:a6ca:4850 with SMTP id x17-20020a1709027c1100b00178a6ca4850mr53705168pll.111.1666911905503; Thu, 27 Oct 2022 16:05:05 -0700 (PDT) Received: from localhost ([50.221.140.188]) by smtp.gmail.com with ESMTPSA id ix20-20020a170902f81400b00177324a7862sm1720133plb.45.2022.10.27.16.05.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Oct 2022 16:05:04 -0700 (PDT) Date: Thu, 27 Oct 2022 16:05:04 -0700 (PDT) X-Google-Original-Date: Thu, 27 Oct 2022 16:05:01 PDT (-0700) Subject: Re: [PATCH] riscv/RTEMS: Add RISCV_GCOV_TYPE_SIZE In-Reply-To: CC: sebastian.huber@embedded-brains.de, gcc-patches@gcc.gnu.org From: Palmer Dabbelt To: gcc-patches@gcc.gnu.org Message-ID: Mime-Version: 1.0 (MHng) Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Thu, 27 Oct 2022 15:56:17 PDT (-0700), gcc-patches@gcc.gnu.org wrote: > > On 10/26/22 01:49, Sebastian Huber wrote: >> The RV32A extension does not support 64-bit atomic operations. For RTEMS, use >> a 32-bit gcov type for RV32. >> >> gcc/ChangeLog: >> >> * config/riscv/riscv.cc (riscv_gcov_type_size): New. >> (TARGET_GCOV_TYPE_SIZE): Likewise. >> * config/riscv/rtems.h (RISCV_GCOV_TYPE_SIZE): New. > > Why make this specific to rtems?  ISTM the logic behind this change > would apply independently of the os. Looks like rv32gc is just broken here: $ cat test.s int func(int x) { return x + 1; } $ gcc -march=rv32gc -O3 -fprofile-update=atomic -fprofile-arcs test.c -S -o- func(int): lui a4,%hi(__gcov0.func(int)) lw a5,%lo(__gcov0.func(int))(a4) lw a2,%lo(__gcov0.func(int)+4)(a4) addi a0,a0,1 addi a3,a5,1 sltu a5,a3,a5 add a5,a5,a2 sw a3,%lo(__gcov0.func(int))(a4) sw a5,%lo(__gcov0.func(int)+4)(a4) ret _sub_I_00100_0: lui a0,%hi(.LANCHOR0) addi a0,a0,%lo(.LANCHOR0) tail __gcov_init _sub_D_00100_1: tail __gcov_exit __gcov0.func(int): .zero 8 Those are not atomic... On rv64 we got some amoadds, which are sane.