From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pl1-x62f.google.com (mail-pl1-x62f.google.com [IPv6:2607:f8b0:4864:20::62f]) by sourceware.org (Postfix) with ESMTPS id 4B270385840D for ; Thu, 1 Jun 2023 16:56:10 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 4B270385840D Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivosinc.com Received: by mail-pl1-x62f.google.com with SMTP id d9443c01a7336-1b021cddb74so5473045ad.0 for ; Thu, 01 Jun 2023 09:56:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20221208.gappssmtp.com; s=20221208; t=1685638569; x=1688230569; h=content-transfer-encoding:mime-version:message-id:to:from:cc :in-reply-to:subject:date:from:to:cc:subject:date:message-id :reply-to; bh=SS+Jn49xkKU05pT27yZaVeE7ReYhblT2EQ5czWm6rA0=; b=aPAZyMTpbjb6onW1mgDu6NSFPK/h9+s0Gcxc7QNgBQ3rs41VULVYpqX4uCAcN+En5u /ugBkv7vONZWWKl+0rShxN1UxhWsrz6m6MZerwlPzPrBS1FwGkKxCLZkuTqllpUj/H7U xz0un772ppD4bCNp/iHfq8GXoeK2vE1rO2gGEVfxriAox119Ht7us8OCbLMuE556QBvq jcSD9uI0eJ4Op5txco27xjpGUiKQOE78h/zpk99ikHkEPGz4MjQ7Z6hNy1EUsuqfUeO+ YSZtM3U38eyowmvH2nDq0IpqRdI2/8W4Vrc+x/dKZgEf9jSyFsRsQ6+M064n8U+HhUZV IdLw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685638569; x=1688230569; h=content-transfer-encoding:mime-version:message-id:to:from:cc :in-reply-to:subject:date:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=SS+Jn49xkKU05pT27yZaVeE7ReYhblT2EQ5czWm6rA0=; b=fdqIC5kse7Cab9RElrUXMMbudhsfMpddgmLsVidksZAxj1gF8OtnqnalZsj+aq+mUW Ho6AGoCQD4DduK5EC7EOi4EuE+PSJAl/fn2DTNUPgy7nNfNTESkm6EhoaoIbDsCiTYE6 2ESpCUDY84QwbilEgugjZm0sDAr1S4lUR22bFLAC4+5XDsWFrYafUE6PhnwC59dz2J/t mgntUpelbJHtx0xJnb0rgko6t7B87ROhWCkmQm7Utbh9lw5mcMV/sLGncqpOrPCQc93L qKwES84QtBSBQI5ZhZY1pYk2N3rhsa8riJRqzjYf5TZ08fwIeux67vU2BHExwQYaZlQw jXkg== X-Gm-Message-State: AC+VfDyVjDTp/mQZ66U/KaFNC6CQ15oO3H9GdmHaZiRb0vNeFNSEmSZG fs6Ax8PJ7gJRk7l/TQtPzyPTNQ== X-Google-Smtp-Source: ACHHUZ4ngXN2z4hYTGHFqYJJZLeI5lVcO6M4ycJ94o5aJa1Gj8Z9WBKdCL/3TOVCNC+Rpe1HlIevtA== X-Received: by 2002:a17:902:7798:b0:1b0:339d:db6a with SMTP id o24-20020a170902779800b001b0339ddb6amr10859pll.21.1685638569158; Thu, 01 Jun 2023 09:56:09 -0700 (PDT) Received: from localhost ([135.180.227.0]) by smtp.gmail.com with ESMTPSA id n10-20020a170902d2ca00b001ac2c3e54adsm3754397plc.118.2023.06.01.09.56.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 01 Jun 2023 09:56:08 -0700 (PDT) Date: Thu, 01 Jun 2023 09:56:08 -0700 (PDT) X-Google-Original-Date: Thu, 01 Jun 2023 09:56:03 PDT (-0700) Subject: Re: FW: [RFC] RISC-V: Support risc-v bfloat16 This patch support bfloat16 in riscv like x86_64 and arm. In-Reply-To: <2eebb749-c837-1cb4-e3ca-c0d24dfae4a1@gmail.com> CC: juzhe.zhong@rivai.ai, gcc-patches@gcc.gnu.org, jinma@linux.alibaba.com, Kito.cheng@sifive.com From: Palmer Dabbelt To: jeffreyalaw@gmail.com Message-ID: Mime-Version: 1.0 (MHng) Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-4.9 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Thu, 01 Jun 2023 09:48:47 PDT (-0700), jeffreyalaw@gmail.com wrote: > > > On 6/1/23 01:01, juzhe.zhong@rivai.ai wrote: >> I plan to implement BF16 vector in GCC but still waiting for ISA >> ratified since GCC policy doesn't allow un-ratified ISA. > Right. So those specs need to move along further before we can start > integrating code. > >> >> Currently, we are working on INT8,INT16,INT32,INT64,FP16,FP32,FP64 >> auto-vectorizaiton. >> It should very simple BF16 in current vector framework in GCC. > In prior architectures I've worked on the bulk of BF16 work was just > adding additional entries to existing iterators. So I agree, it should > be very simple :-) We should also have someone who's a bit more plugged in to floating point check to make sure the RISC-V bfloat16 semantics match IEEE. I don't see any issues, but I'm not really a FP person so I'm not sure. There were certainly a lot of subtlies for the other FP bits, so even if the implementation just plumbs straight through IMO it's worth checking. We have one FP person at Rivos, I can try and rope him in if you want? Happy to have someone else do it, though, as he's usually pretty busy ;)