From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pj1-x102d.google.com (mail-pj1-x102d.google.com [IPv6:2607:f8b0:4864:20::102d]) by sourceware.org (Postfix) with ESMTPS id 406153853543 for ; Tue, 7 Jun 2022 18:45:55 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 406153853543 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=dabbelt.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=dabbelt.com Received: by mail-pj1-x102d.google.com with SMTP id e9so5864942pju.5 for ; Tue, 07 Jun 2022 11:45:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=dabbelt-com.20210112.gappssmtp.com; s=20210112; h=date:subject:in-reply-to:cc:from:to:message-id:mime-version :content-transfer-encoding; bh=DtHBLQSi5tdjq2iRBm3hPRfSdt4E9jIiZ4RF0m1iTBY=; b=N9O7lDBOIZzDyO+04TJVVF8iZtSJ1AR+RNGcpFbz6qc50R8IsQQ/9yfJo5OoOLq+UQ sAkTRmkmaYqvWPGilO35sI/uWfBVpIhw3em0HyShmhKIGSocvWFdx//KsCVe9p0Zi49S aCZhpwQJ9WFQeG2vc4IHgUEtnc9WSULVZOaTOfR8c3v6A62iDKKZVrM9QUcPSm2anyut 9vJ1/Aj8SkiQ7tZJMQ1SszJcXppE0cR8j38NHfYxinZpvzgLTuaa6iDD8ZWrpujXo4X8 ULSDky81FyF3FnGm6skPvToZwpqS6lwFHF604WOud2zhcOtEeyixLzpCB6KNAISHzrnP diAQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:subject:in-reply-to:cc:from:to:message-id :mime-version:content-transfer-encoding; bh=DtHBLQSi5tdjq2iRBm3hPRfSdt4E9jIiZ4RF0m1iTBY=; b=xyBaxfvh6a6/LD3lPPZyczAM+GJWaoRpeSBjsXkeJ0W7zZ6TibhA1wKjFyeFMygEP8 trbP9VdhdJ1JZNQdxUsDsuOrRK2g3hzMx/IKTLBXorhjD6ciRjHeU3pUvgUGulTPd/qZ jfHG6vMxe3RbQXYpjSTfqMrnrx2Ocs/vpfXGEh7TKglGZij9zhHsomX9Z4bFNNd/XyoC Z/BY7D/YuhCJtqvpkqcF2opQqaSRlYtFKUWSXFlnMoEXc/aYK9TZ1tRYNwO2EqrHluEw MdyK/kL9eArCnHGEIMzWFUttU1Ms19n9FMfdsxBQVNQrfEB92AEk1fuFphp4gd7F8L8N X8ig== X-Gm-Message-State: AOAM530QWefmhwZ8ZYsPnCMqJrXahUQ5R3vpOHtMDv6GRYX/o4SJYgAP tDsiPEwQdL0GapF5jlPc/6Hzpq1oMFnbFQ== X-Google-Smtp-Source: ABdhPJz/UMC93k2Lp/AYj6x58grMvcm0Zw2ztxILFBGmQ8lxqkMxJWq0nNtIJR3b53Dgeh/37I7igA== X-Received: by 2002:a17:902:ce88:b0:163:dbd5:9797 with SMTP id f8-20020a170902ce8800b00163dbd59797mr30322698plg.82.1654627553869; Tue, 07 Jun 2022 11:45:53 -0700 (PDT) Received: from localhost ([12.3.194.138]) by smtp.gmail.com with ESMTPSA id t7-20020a17090a4e4700b001df4b919937sm14850771pjl.16.2022.06.07.11.45.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Jun 2022 11:45:53 -0700 (PDT) Date: Tue, 07 Jun 2022 11:45:53 -0700 (PDT) X-Google-Original-Date: Tue, 07 Jun 2022 11:45:51 PDT (-0700) Subject: Re: [PATCH] RISC-V: Compute default ABI from -mcpu or -march In-Reply-To: <20220607025120.1601-1-pc.wang@linux.alibaba.com> CC: pc.wang@linux.alibaba.com From: Palmer Dabbelt To: gcc-patches@gcc.gnu.org Message-ID: Mime-Version: 1.0 (MHng) Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-11.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 07 Jun 2022 18:45:58 -0000 On Mon, 06 Jun 2022 19:51:20 PDT (-0700), gcc-patches@gcc.gnu.org wrote: > If -mcpu or -march is specified and there is no -mabi, we will calculate > default ABI from arch string provided by -march or defined in CPU info. IMO this is generally a good idea and we've talked about it before, but just setting the ABI from the ISA isn't quite the right way to go. IIRC we came up with something slightly more complicated, like picking the closest supported multilib. That's probably more in line with what users are asking for, which IIUC is sort of just "I don't care that much about ABI, just make my stuff build". Whatever we do here, we should document in the RISC-V specs as we'll want to make sure LLVM does the same thing. We probably also want some sort of "-mabi=auto" argument, as it's always best to have an argument that changes back to the no-argument behavior. > > gcc/ChangeLog: > > * common/config/riscv/riscv-common.cc (compute_default_abi): Implementation > to calculate -mabi from arch string. > (riscv_expand_abi_from_arch): New spec function to calcalute -mabi from arch > string provided by -march option. > (riscv_expand_abi_from_cpu): New spec function to find CPU info and calculate > -mabi from arch string defined in CPU info. > * config/riscv/riscv.h (EXTRA_SPEC_FUNCTIONS): Add above spec functions. > (OPTION_DEFAULT_SPECS): Use new spec functions to calculate -mabi and -march > has higher priority than -mcpu. > > gcc/testsuite/ChangeLog: > > * gcc.target/riscv/mabi-1.c: ilp32e test. > * gcc.target/riscv/mabi-2.c: ilp32 test. > * gcc.target/riscv/mabi-3.c: ilp32f test. > * gcc.target/riscv/mabi-4.c: ilp32d test. > * gcc.target/riscv/mabi-5.c: lp64 test. > * gcc.target/riscv/mabi-6.c: lp64f test. > * gcc.target/riscv/mabi-7.c: lp64d test. > * gcc.target/riscv/mabi-8.c: -march override -mcpu. > --- > gcc/common/config/riscv/riscv-common.cc | 66 +++++++++++++++++++++++++ > gcc/config/riscv/riscv.h | 15 ++++-- > gcc/testsuite/gcc.target/riscv/mabi-1.c | 7 +++ > gcc/testsuite/gcc.target/riscv/mabi-2.c | 7 +++ > gcc/testsuite/gcc.target/riscv/mabi-3.c | 7 +++ > gcc/testsuite/gcc.target/riscv/mabi-4.c | 7 +++ > gcc/testsuite/gcc.target/riscv/mabi-5.c | 7 +++ > gcc/testsuite/gcc.target/riscv/mabi-6.c | 7 +++ > gcc/testsuite/gcc.target/riscv/mabi-7.c | 7 +++ > gcc/testsuite/gcc.target/riscv/mabi-8.c | 7 +++ > 10 files changed, 134 insertions(+), 3 deletions(-) > create mode 100644 gcc/testsuite/gcc.target/riscv/mabi-1.c > create mode 100644 gcc/testsuite/gcc.target/riscv/mabi-2.c > create mode 100644 gcc/testsuite/gcc.target/riscv/mabi-3.c > create mode 100644 gcc/testsuite/gcc.target/riscv/mabi-4.c > create mode 100644 gcc/testsuite/gcc.target/riscv/mabi-5.c > create mode 100644 gcc/testsuite/gcc.target/riscv/mabi-6.c > create mode 100644 gcc/testsuite/gcc.target/riscv/mabi-7.c > create mode 100644 gcc/testsuite/gcc.target/riscv/mabi-8.c > > diff --git a/gcc/common/config/riscv/riscv-common.cc b/gcc/common/config/riscv/riscv-common.cc > index 0e5be2ce105..f8e40549d18 100644 > --- a/gcc/common/config/riscv/riscv-common.cc > +++ b/gcc/common/config/riscv/riscv-common.cc > @@ -1266,6 +1266,72 @@ riscv_default_mtune (int argc, const char **argv) > return default_mtune; > } > > +/* Compute default -mabi option from arch string. */ > + > +static const char * > +compute_default_abi (const char* arch_str) > +{ > + location_t loc = UNKNOWN_LOCATION; > + > + riscv_parse_arch_string (arch_str, NULL, loc); > + > + if (current_subset_list->xlen () == 64) > + { > + if (current_subset_list->lookup ("d", RISCV_DONT_CARE_VERSION, > + RISCV_DONT_CARE_VERSION)) > + return "lp64d"; > + if (current_subset_list->lookup ("f", RISCV_DONT_CARE_VERSION, > + RISCV_DONT_CARE_VERSION)) > + return "lp64f"; > + return "lp64"; > + } > + else > + { > + if (current_subset_list->lookup ("e", RISCV_DONT_CARE_VERSION, > + RISCV_DONT_CARE_VERSION)) > + return "ilp32e"; > + if (current_subset_list->lookup ("d", RISCV_DONT_CARE_VERSION, > + RISCV_DONT_CARE_VERSION)) > + return "ilp32d"; > + if (current_subset_list->lookup ("f", RISCV_DONT_CARE_VERSION, > + RISCV_DONT_CARE_VERSION)) > + return "ilp32f"; > + return "ilp32"; > + } > +} > + > +/* Expand default -mabi option from -march option. */ > + > +const char * > +riscv_expand_abi_from_arch (int argc, const char **argv) > +{ > + gcc_assert (argc == 1); > + return xasprintf ("-mabi=%s", compute_default_abi (argv[0])); > +} > + > +/* Expand default -mabi option from -mcpu option. */ > + > +const char * > +riscv_expand_abi_from_cpu (int argc, const char **argv) > +{ > + gcc_assert (argc > 0 && argc <= 2); > + const char *default_abi_str = NULL; > + if (argc >= 2) > + default_abi_str = argv[1]; > + > + const riscv_cpu_info *cpu = riscv_find_cpu (argv[0]); > + > + if (cpu == NULL) > + { > + if (default_abi_str == NULL) > + return ""; > + else > + return xasprintf ("-mabi=%s", default_abi_str); > + } > + else > + return xasprintf ("-mabi=%s", compute_default_abi (cpu->arch)); > +} > + > /* Expand arch string with implied extensions from -mcpu option. */ > > const char * > diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h > index 6f7f4d3fbdc..14cd695f37f 100644 > --- a/gcc/config/riscv/riscv.h > +++ b/gcc/config/riscv/riscv.h > @@ -50,15 +50,20 @@ along with GCC; see the file COPYING3. If not see > extern const char *riscv_expand_arch (int argc, const char **argv); > extern const char *riscv_expand_arch_from_cpu (int argc, const char **argv); > extern const char *riscv_default_mtune (int argc, const char **argv); > +extern const char *riscv_expand_abi_from_arch (int argc, const char **argv); > +extern const char *riscv_expand_abi_from_cpu (int argc, const char **argv); > > # define EXTRA_SPEC_FUNCTIONS \ > { "riscv_expand_arch", riscv_expand_arch }, \ > { "riscv_expand_arch_from_cpu", riscv_expand_arch_from_cpu }, \ > - { "riscv_default_mtune", riscv_default_mtune }, > + { "riscv_default_mtune", riscv_default_mtune }, \ > + { "riscv_expand_abi_from_arch", riscv_expand_abi_from_arch }, \ > + { "riscv_expand_abi_from_cpu", riscv_expand_abi_from_cpu }, > > /* Support for a compile-time default CPU, et cetera. The rules are: > --with-arch is ignored if -march or -mcpu is specified. > - --with-abi is ignored if -mabi is specified. > + --with-abi is ignored if -mabi is specified. If -mcpu or -march is > + specified, suitable -mabi will be selected from arch string. > --with-tune is ignored if -mtune or -mcpu is specified. > --with-isa-spec is ignored if -misa-spec is specified. > > @@ -70,7 +75,11 @@ extern const char *riscv_default_mtune (int argc, const char **argv); > {"arch", "%{!march=*:" \ > " %{!mcpu=*:-march=%(VALUE)}" \ > " %{mcpu=*:%:riscv_expand_arch_from_cpu(%* %(VALUE))}}" }, \ > - {"abi", "%{!mabi=*:-mabi=%(VALUE)}" }, \ > + {"abi", "%{!mabi=*:" \ > + " %{!march=*:" \ > + " %{!mcpu=*:-mabi=%(VALUE)}" \ > + " %{mcpu=*:%:riscv_expand_abi_from_cpu(%* %(VALUE))}}" \ > + " %{march=*:%:riscv_expand_abi_from_arch(%*)}}" }, \ > {"isa_spec", "%{!misa-spec=*:-misa-spec=%(VALUE)}" }, \ > > #ifdef IN_LIBGCC2 > diff --git a/gcc/testsuite/gcc.target/riscv/mabi-1.c b/gcc/testsuite/gcc.target/riscv/mabi-1.c > new file mode 100644 > index 00000000000..83bc343f8d8 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/mabi-1.c > @@ -0,0 +1,7 @@ > +/* { dg-do compile } */ > +/* { dg-skip-if "-mabi given" { *-*-* } { "-mabi=*" } } */ > +/* { dg-options "-march=rv32e" } */ > + > +#if !((__riscv_xlen == 32) && defined(__riscv_abi_rve)) > +#error "unexpected abi" > +#endif > diff --git a/gcc/testsuite/gcc.target/riscv/mabi-2.c b/gcc/testsuite/gcc.target/riscv/mabi-2.c > new file mode 100644 > index 00000000000..6a97c2ae2a3 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/mabi-2.c > @@ -0,0 +1,7 @@ > +/* { dg-do compile } */ > +/* { dg-skip-if "-mabi given" { *-*-* } { "-mabi=*" } } */ > +/* { dg-options "-march=rv32ima" } */ > + > +#if !((__riscv_xlen == 32) && defined(__riscv_float_abi_soft)) > +#error "unexpected abi" > +#endif > diff --git a/gcc/testsuite/gcc.target/riscv/mabi-3.c b/gcc/testsuite/gcc.target/riscv/mabi-3.c > new file mode 100644 > index 00000000000..cef04313e19 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/mabi-3.c > @@ -0,0 +1,7 @@ > +/* { dg-do compile } */ > +/* { dg-skip-if "-mabi given" { *-*-* } { "-mabi=*" } } */ > +/* { dg-options "-march=rv32imaf" } */ > + > +#if !((__riscv_xlen == 32) && defined(__riscv_float_abi_single)) > +#error "unexpected abi" > +#endif > diff --git a/gcc/testsuite/gcc.target/riscv/mabi-4.c b/gcc/testsuite/gcc.target/riscv/mabi-4.c > new file mode 100644 > index 00000000000..d62dcf6ed75 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/mabi-4.c > @@ -0,0 +1,7 @@ > +/* { dg-do compile } */ > +/* { dg-skip-if "-mabi given" { *-*-* } { "-mabi=*" } } */ > +/* { dg-options "-march=rv32imafd" } */ > + > +#if !((__riscv_xlen == 32) && defined(__riscv_float_abi_double)) > +#error "unexpected abi" > +#endif > diff --git a/gcc/testsuite/gcc.target/riscv/mabi-5.c b/gcc/testsuite/gcc.target/riscv/mabi-5.c > new file mode 100644 > index 00000000000..000e5e282c2 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/mabi-5.c > @@ -0,0 +1,7 @@ > +/* { dg-do compile } */ > +/* { dg-skip-if "-mabi given" { *-*-* } { "-mabi=*" } } */ > +/* { dg-options "-march=rv64ima" } */ > + > +#if !((__riscv_xlen == 64) && defined(__riscv_float_abi_soft)) > +#error "unexpected abi" > +#endif > diff --git a/gcc/testsuite/gcc.target/riscv/mabi-6.c b/gcc/testsuite/gcc.target/riscv/mabi-6.c > new file mode 100644 > index 00000000000..ed1458d4158 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/mabi-6.c > @@ -0,0 +1,7 @@ > +/* { dg-do compile } */ > +/* { dg-skip-if "-mabi given" { *-*-* } { "-mabi=*" } } */ > +/* { dg-options "-march=rv64imaf" } */ > + > +#if !((__riscv_xlen == 64) && defined(__riscv_float_abi_single)) > +#error "unexpected abi" > +#endif > diff --git a/gcc/testsuite/gcc.target/riscv/mabi-7.c b/gcc/testsuite/gcc.target/riscv/mabi-7.c > new file mode 100644 > index 00000000000..675fe359cfd > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/mabi-7.c > @@ -0,0 +1,7 @@ > +/* { dg-do compile } */ > +/* { dg-skip-if "-mabi given" { *-*-* } { "-mabi=*" } } */ > +/* { dg-options "-march=rv64imafd" } */ > + > +#if !((__riscv_xlen == 64) && defined(__riscv_float_abi_double)) > +#error "unexpected abi" > +#endif > diff --git a/gcc/testsuite/gcc.target/riscv/mabi-8.c b/gcc/testsuite/gcc.target/riscv/mabi-8.c > new file mode 100644 > index 00000000000..8c7e08e4289 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/riscv/mabi-8.c > @@ -0,0 +1,7 @@ > +/* { dg-do compile } */ > +/* { dg-skip-if "-mabi given" { *-*-* } { "-mabi=*" } } */ > +/* { dg-options "-mcpu=sifive-s21 -march=rv64imafd" } */ > + > +#if !((__riscv_xlen == 64) && defined(__riscv_float_abi_double)) > +#error "unexpected abi" > +#endif