From: Palmer Dabbelt <palmer@dabbelt.com>
To: gcc-patches@gcc.gnu.org
Cc: rzinsly@ventanamicro.com, gcc-patches@gcc.gnu.org, jlaw@ventanamicro.com
Subject: Re: [PATCH] RISC-V: Produce better code with complex constants [PR95632] [PR106602]
Date: Thu, 08 Dec 2022 09:39:25 -0800 (PST) [thread overview]
Message-ID: <mhng-bca1e05c-d513-4bcf-a8e9-346c9c9c6349@palmer-ri-x1c9a> (raw)
In-Reply-To: <Y5EF+PlpadTpHpdb@tucnak>
On Wed, 07 Dec 2022 13:30:32 PST (-0800), gcc-patches@gcc.gnu.org wrote:
> On Wed, Dec 07, 2022 at 05:55:17PM -0300, Raphael Moreira Zinsly wrote:
>> Due to RISC-V limitations on operations with big constants combine
>> is failing to match such operations and is not being able to
>> produce optimal code as it keeps splitting them. By pretending we
>> can do those operations we can get more opportunities for
>> simplification of surrounding instructions.
>>
>> 2022-12-06 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
>> Jeff Law <jlaw@ventanamicro.com>
>
> Just nits, not a proper review.
> 2 spaces after date and 2 spaces before <, rather than just 1.
>
>>
>> gcc/Changelog:
>> PR target/95632
>> PR target/106602
>> * config/riscv/riscv.md: New pattern to simulate complex
>> const_int loads.
>>
>> gcc/testsuite/ChangeLog:
>> * gcc.target/riscv/pr95632.c: New test.
>> * gcc.target/riscv/pr106602.c: Likewise.
>
> All lines in the ChangeLog should be tab indented, rather than just some of
> them and others with 8 spaces.
There's alsot contrib/git-commit-mklog.py, which provides a template for
these (I also have trouble remembering the formatting rules).
>
>> --- a/gcc/config/riscv/riscv.md
>> +++ b/gcc/config/riscv/riscv.md
>> @@ -1667,6 +1667,22 @@
>> MAX_MACHINE_MODE, &operands[3], TRUE);
>> })
>>
>> +;; Pretend to have the ability to load complex const_int in order to get
>> +;; better code generation around them.
>> +(define_insn_and_split ""
>
> define_insn_and_split patterns better should have some name, even if it
> starts with *. It makes dumps more readable, and you can refer to it
> in the ChangeLog when it is added or changed etc.
>
>> + [(set (match_operand:GPR 0 "register_operand" "=r")
>> + (match_operand:GPR 1 "splittable_const_int_operand" "i"))]
>> + "cse_not_expected"
>> + "#"
>> + "&& 1"
>> + [(const_int 0)]
>> +
>
> Why the empty line?
>
>> +{
>> + riscv_move_integer (operands[0], operands[0], INTVAL (operands[1]),
>> + <GPR:MODE>mode, TRUE);
>
> You can just use <MODE> if there is only one iterator in the pattern.
>
> Jakub
next prev parent reply other threads:[~2022-12-08 17:39 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-07 20:55 Raphael Moreira Zinsly
2022-12-07 21:13 ` Jeff Law
2022-12-07 21:30 ` Jakub Jelinek
2022-12-08 17:39 ` Palmer Dabbelt [this message]
2022-12-08 17:53 ` Palmer Dabbelt
2022-12-08 18:15 ` Jeff Law
2022-12-08 20:21 ` Palmer Dabbelt
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