From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pj1-x1031.google.com (mail-pj1-x1031.google.com [IPv6:2607:f8b0:4864:20::1031]) by sourceware.org (Postfix) with ESMTPS id 928993858424 for ; Mon, 22 Aug 2022 20:44:24 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 928993858424 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=dabbelt.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=dabbelt.com Received: by mail-pj1-x1031.google.com with SMTP id o5-20020a17090a3d4500b001ef76490983so12567161pjf.2 for ; Mon, 22 Aug 2022 13:44:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=dabbelt-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:message-id:to:from:cc :in-reply-to:subject:date:from:to:cc; bh=5ufb2xKbNnQqFjxbr89shdp8dkKMcMFpr0U78cJtV7g=; b=KPcKKKTTadApllnqWKUsGbIEfBQJrAF3q8WGppcqgRIKm75gFzEbastlXWQ/Qw+GNi PHLxzBIngqr5VhD1dx7ti/+PcSmUlMvVFezO/gn5D/Ar7BUWTxw9Cb7wj+rCu/lRd3GJ 5lbEuz1QyjGvW9k8WrA1HgcK1Ei5b8MVmVRU/mT+y04M9hNHznMlQHbHvbIRVGC7rTTq Q3PBVpWwMKg7+uItT5Q9T6J2I7oTWTtZzKDq8VwM6rA3BWE/kt8XQ7T/IxLIxwPhpUJu 814jVapEsKQl7xLpnO0UJuHUM7mWe5vggUQDMKtUe1RufQ1VJYMO3VVWF2qiCd64HoTj 1rBA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:message-id:to:from:cc :in-reply-to:subject:date:x-gm-message-state:from:to:cc; bh=5ufb2xKbNnQqFjxbr89shdp8dkKMcMFpr0U78cJtV7g=; b=LG/eYdOgHc4mDrqxnUkfWClTjmOHO8D0Wy8C3H1XKX4bhbWuaftjEiC0hnU2f2iwsd SwFGMTB3wnAlQykQqAUn8kqBdOeeT+tRg9aug1Ar8tyrQTJe+6qApsbQ7ogH/VsqU97Q nHkyITJ8T9sbx0YPDfCTbcvjHWgbbvOb9H3B8WWd+35911iE1PCmgoxTmfo0LvIaB/hN seUlI1To4u/c3E0SsVhcT7BRc6JDPlwYJM1bzMrWaRKVv+hXxSX01WLPfhD1UCR/thYj 12max7OCwoTNHiDjtaJwTMbpsxkrWsHBCCHVbiXnYsEwnTU0Xvvpv9onOiIvJseZlyJn s0rw== X-Gm-Message-State: ACgBeo38XVfz+SiBcsXfDt+jrZTXFXLTquFXCn1HVONfC6uj5GAvXDcj sJL4FpVAXAxnP52y5uRNwFh+GlXXMxmR4g== X-Google-Smtp-Source: AA6agR5labSGONI+cm5aMkcf7iZa3uvVo06khKreP0Nm0GvhlZClUwIZWtDlBNohbCF3w0jWRNpr3w== X-Received: by 2002:a17:90a:4607:b0:1fa:f794:2c0d with SMTP id w7-20020a17090a460700b001faf7942c0dmr155239pjg.24.1661201063204; Mon, 22 Aug 2022 13:44:23 -0700 (PDT) Received: from localhost (76-210-143-223.lightspeed.sntcca.sbcglobal.net. [76.210.143.223]) by smtp.gmail.com with ESMTPSA id l23-20020a63da57000000b0041cef96cab0sm7720897pgj.90.2022.08.22.13.44.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Aug 2022 13:44:22 -0700 (PDT) Date: Mon, 22 Aug 2022 13:44:22 -0700 (PDT) X-Google-Original-Date: Mon, 22 Aug 2022 13:44:17 PDT (-0700) Subject: Re: [PATCH 00/10] [RISCV] Fix/improve the RISCV backend In-Reply-To: <1660860233-11175-1-git-send-email-apinski@marvell.com> CC: gcc-patches@gcc.gnu.org, apinski@marvell.com From: Palmer Dabbelt To: gcc-patches@gcc.gnu.org Message-ID: Mime-Version: 1.0 (MHng) Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-5.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE, URIBL_BLACK autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 22 Aug 2022 20:44:26 -0000 On Thu, 18 Aug 2022 15:03:43 PDT (-0700), gcc-patches@gcc.gnu.org wrote: > From: Andrew Pinski > > This set of patches fixes a few RISCV issues and does a few > cleanups. Including moving all of the iterators to iterators.md like > many newer backends. > It also fixes a few PRs which I filed including the RISCV32 issue > with ZBS enabled. > > Thanks, > Andrew Pinski > > Andrew Pinski (10): > [RISCV] Move iterators from riscv.md to iterators.md > [RISCV] Move iterators from bitmanip.md to iterators.md > [RISCV] Move iterators from sync.md to iterators.md > [RISCV] Add the list of operand modifiers to riscv.md too > [RISCV] Add %~ to print w if TARGET_64BIT and use it > [RISCV] Use constraints/predicates instead of checking const_int > directly for shNadd patterns > [RISCV] Use a constraint for bset_mask and bset_1_mask > [RISCV] Fix PR 106586: riscv32 vs ZBS > [RISCV] Add constraints for > not_single_bit_mask_operand/single_bit_mask_operand > [RISCV] Fix PR 106632 and PR 106588 a few constraints in bitmanip.md > > gcc/config/riscv/bitmanip.md | 56 ++------ > gcc/config/riscv/constraints.md | 28 ++++ > gcc/config/riscv/iterators.md | 245 ++++++++++++++++++++++++++++++++ > gcc/config/riscv/predicates.md | 9 +- > gcc/config/riscv/riscv.cc | 35 ++++- > gcc/config/riscv/riscv.h | 4 +- > gcc/config/riscv/riscv.md | 199 +++----------------------- > gcc/config/riscv/sync.md | 4 - > 8 files changed, 352 insertions(+), 228 deletions(-) > create mode 100644 gcc/config/riscv/iterators.md Aside from the minor issue I pointed out in my reply to 10, these all look good to me. Thanks!