From: Palmer Dabbelt <palmer@rivosinc.com>
To: Kito Cheng <kito.cheng@gmail.com>
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [PATCH] RISC-V: Add -mtune=thead-c906 to the invoke docs
Date: Tue, 21 Jun 2022 19:31:13 -0700 (PDT) [thread overview]
Message-ID: <mhng-eb9d9737-e97f-4c42-b221-5b6ac3f75993@palmer-ri-x1c9> (raw)
In-Reply-To: <CA+yXCZArv7ypD-mA1q2hRiSOcpw47V1JgcKdLCUoRpQCUzkSjw@mail.gmail.com>
On Wed, 25 May 2022 23:11:00 PDT (-0700), Kito Cheng wrote:
> LGTM, thanks :)
Committed.
> On Thu, May 26, 2022 at 10:31 AM Palmer Dabbelt <palmer@rivosinc.com> wrote:
>>
>> gcc/ChangeLog
>>
>> * doc/invoke.texi (RISC-V): Document -mtune=thead-c906.
>>
>> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
>> ---
>> gcc/doc/invoke.texi | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
>> index 71098d86313..a584dc6a7f9 100644
>> --- a/gcc/doc/invoke.texi
>> +++ b/gcc/doc/invoke.texi
>> @@ -28088,7 +28088,7 @@ Permissible values for this option are: @samp{sifive-e20}, @samp{sifive-e21},
>> Optimize the output for the given processor, specified by microarchitecture or
>> particular CPU name. Permissible values for this option are: @samp{rocket},
>> @samp{sifive-3-series}, @samp{sifive-5-series}, @samp{sifive-7-series},
>> -@samp{size}, and all valid options for @option{-mcpu=}.
>> +@samp{thead-c906}, @samp{size}, and all valid options for @option{-mcpu=}.
>>
>> When @option{-mtune=} is not specified, use the setting from @option{-mcpu},
>> the default is @samp{rocket} if both are not specified.
>> --
>> 2.34.1
>>
prev parent reply other threads:[~2022-06-22 2:31 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-26 2:30 Palmer Dabbelt
2022-05-26 6:11 ` Kito Cheng
2022-06-22 2:31 ` Palmer Dabbelt [this message]
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