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Date: Tue, 16 May 2023 19:05:47 -0700 (PDT)
X-Google-Original-Date: Tue, 16 May 2023 19:05:23 PDT (-0700)
Subject:     Re: RISC-V Test Errors and Failures
In-Reply-To: <948aa928-4320-04c0-990f-b2755ac7a9c3@ventanamicro.com>
CC: Vineet Gupta <vineetg@rivosinc.com>, kevinl@rivosinc.com,
  gcc-patches@gcc.gnu.org, Kito Cheng <kito.cheng@gmail.com>, jiawei@iscas.ac.cn,
  christoph.muellner@vrull.eu
From: Palmer Dabbelt <palmer@dabbelt.com>
To: Jeff Law <jlaw@ventanamicro.com>
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On Tue, 16 May 2023 19:00:12 PDT (-0700), Jeff Law wrote:
>
>
> On 5/16/23 19:29, Palmer Dabbelt wrote:
>
>>
>>> I think the most pressing need is bleeding edge gcc regression tracking.
>>>   @Jeff is anything setup on sourceware and/or usable ? I thought they
>>> do have existing bots for some arches to spin up build / run - perhaps
>>> runs are native and not qemu.
>>
>> IIRC Jeff said his builders were hanging right now.
> Correct.  More precisely, the riscv64 builds hang.  Not sure if it's
> stage2 or stage3 of the bootstrap.  Been happening for the last couple
> weeks.  I suspect some codegen bug in the riscv port.  I'll have to
> bisect it which will be quite painful.

Can anyone else do it?  If the only blocker for having an upstream 
regression CI thing is just sorting out why it broke over the last few 
weeks then I'm happy to try and trick someone around here into doing 
some work...