From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id BC7D83858C1F; Tue, 14 Feb 2023 09:20:04 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org BC7D83858C1F Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 144711042; Tue, 14 Feb 2023 01:20:47 -0800 (PST) Received: from localhost (e121540-lin.manchester.arm.com [10.32.99.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B7EE93F703; Tue, 14 Feb 2023 01:20:03 -0800 (PST) From: Richard Sandiford To: "Kewen.Lin" Mail-Followup-To: "Kewen.Lin" ,linkw@gcc.gnu.org, rguenther@suse.de, gcc-patches@gcc.gnu.org, richard.sandiford@arm.com Cc: linkw@gcc.gnu.org, rguenther@suse.de, gcc-patches@gcc.gnu.org Subject: Re: [PATCH 2/2] vect: Make partial trapping ops use predication [PR96373] References: <3daa6e11-7ac6-0348-91eb-26e65f067fe4@linux.ibm.com> Date: Tue, 14 Feb 2023 09:20:02 +0000 In-Reply-To: (Kewen Lin's message of "Tue, 14 Feb 2023 10:17:34 +0800") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-Spam-Status: No, score=-29.0 required=5.0 tests=BAYES_00,KAM_DMARC_NONE,KAM_DMARC_STATUS,KAM_LAZY_DOMAIN_SECURITY,KAM_SHORT,SPF_HELO_NONE,SPF_NONE,TXREP autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: "Kewen.Lin" writes: > on 2023/2/13 21:57, Richard Sandiford wrote: >> "Kewen.Lin" writes: >>> Hi Richard, >>> >>> on 2023/1/27 19:08, Richard Sandiford via Gcc-patches wrote: >>>> PR96373 points out that a predicated SVE loop currently converts >>>> trapping unconditional ops into unpredicated vector ops. Doing >>>> the operation on inactive lanes can then raise an exception. >>>> >>>> As discussed in the PR trail, we aren't 100% consistent about >>>> whether we preserve traps or not. But the direction of travel >>>> is clearly to improve that rather than live with it. This patch >>>> tries to do that for the SVE case. >>>> >>>> Doing this regresses gcc.target/aarch64/sve/fabd_1.c. I've added >>>> -fno-trapping-math for now and filed PR108571 to track it. >>>> A similar problem applies to fsubr_1.d. >>>> >>>> I think this is likely to regress Power 10, since conditional >>>> operations are only available for masked loops. I think we'll >>>> need to add -fno-trapping-math to any affected testcases, >>>> but I don't have a Power 10 system to test on. Kewen, would you >>>> mind giving this a spin and seeing how bad the fallout is? >>>> >>> >>> Sorry for the late reply, I'm just back from vacation. >>> >>> Thank you for fixing this and caring about Power10! >>> >>> I tested your proposed patch on one Power10 machine (ppc64le), >>> it's bootstrapped but some test failures got exposed as below. >>> >>> < FAIL: gcc.target/powerpc/p9-vec-length-epil-1.c scan-assembler-times \\\\mlxvl\\\\M 14 >>> < FAIL: gcc.target/powerpc/p9-vec-length-epil-1.c scan-assembler-times \\\\mstxvl\\\\M 7 >>> < FAIL: gcc.target/powerpc/p9-vec-length-epil-2.c scan-assembler-times \\\\mlxvl\\\\M 20 >>> < FAIL: gcc.target/powerpc/p9-vec-length-epil-2.c scan-assembler-times \\\\mstxvl\\\\M 10 >>> < FAIL: gcc.target/powerpc/p9-vec-length-epil-3.c scan-assembler-times \\\\mlxvl\\\\M 14 >>> < FAIL: gcc.target/powerpc/p9-vec-length-epil-3.c scan-assembler-times \\\\mstxvl\\\\M 7 >>> < FAIL: gcc.target/powerpc/p9-vec-length-epil-4.c scan-assembler-times \\\\mlxvl\\\\M 70 >>> < FAIL: gcc.target/powerpc/p9-vec-length-epil-4.c scan-assembler-times \\\\mlxvx?\\\\M 120 >>> < FAIL: gcc.target/powerpc/p9-vec-length-epil-4.c scan-assembler-times \\\\mstxvl\\\\M 70 >>> < FAIL: gcc.target/powerpc/p9-vec-length-epil-4.c scan-assembler-times \\\\mstxvx?\\\\M 70 >>> < FAIL: gcc.target/powerpc/p9-vec-length-epil-5.c scan-assembler-times \\\\mlxvl\\\\M 21 >>> < FAIL: gcc.target/powerpc/p9-vec-length-epil-5.c scan-assembler-times \\\\mstxvl\\\\M 21 >>> < FAIL: gcc.target/powerpc/p9-vec-length-epil-5.c scan-assembler-times \\\\mstxvx?\\\\M 21 >>> < FAIL: gcc.target/powerpc/p9-vec-length-epil-6.c scan-assembler-times \\\\mlxvl\\\\M 10 >>> < FAIL: gcc.target/powerpc/p9-vec-length-epil-6.c scan-assembler-times \\\\mlxvx?\\\\M 42 >>> < FAIL: gcc.target/powerpc/p9-vec-length-epil-6.c scan-assembler-times \\\\mstxvl\\\\M 10 >>> < FAIL: gcc.target/powerpc/p9-vec-length-epil-8.c scan-assembler-times \\\\mlxvl\\\\M 16 >>> < FAIL: gcc.target/powerpc/p9-vec-length-epil-8.c scan-assembler-times \\\\mstxvl\\\\M 7 >>> < FAIL: gcc.target/powerpc/p9-vec-length-full-1.c scan-assembler-not \\\\mlxvx\\\\M >>> < FAIL: gcc.target/powerpc/p9-vec-length-full-1.c scan-assembler-not \\\\mstxvx\\\\M >>> < FAIL: gcc.target/powerpc/p9-vec-length-full-1.c scan-assembler-times \\\\mlxvl\\\\M 20 >>> < FAIL: gcc.target/powerpc/p9-vec-length-full-1.c scan-assembler-times \\\\mstxvl\\\\M 10 >>> < FAIL: gcc.target/powerpc/p9-vec-length-full-2.c scan-assembler-not \\\\mlxvx\\\\M >>> < FAIL: gcc.target/powerpc/p9-vec-length-full-2.c scan-assembler-not \\\\mstxvx\\\\M >>> < FAIL: gcc.target/powerpc/p9-vec-length-full-2.c scan-assembler-times \\\\mlxvl\\\\M 20 >>> < FAIL: gcc.target/powerpc/p9-vec-length-full-2.c scan-assembler-times \\\\mstxvl\\\\M 10 >>> < FAIL: gcc.target/powerpc/p9-vec-length-full-3.c scan-assembler-times \\\\mlxvl\\\\M 14 >>> < FAIL: gcc.target/powerpc/p9-vec-length-full-3.c scan-assembler-times \\\\mstxvl\\\\M 7 >>> < FAIL: gcc.target/powerpc/p9-vec-length-full-4.c scan-assembler-not \\\\mlxvx\\\\M >>> < FAIL: gcc.target/powerpc/p9-vec-length-full-4.c scan-assembler-not \\\\mstxv\\\\M >>> < FAIL: gcc.target/powerpc/p9-vec-length-full-4.c scan-assembler-not \\\\mstxvx\\\\M >>> < FAIL: gcc.target/powerpc/p9-vec-length-full-4.c scan-assembler-times \\\\mlxvl\\\\M 70 >>> < FAIL: gcc.target/powerpc/p9-vec-length-full-4.c scan-assembler-times \\\\mstxvl\\\\M 70 >>> < FAIL: gcc.target/powerpc/p9-vec-length-full-5.c scan-assembler-not \\\\mlxvx\\\\M >>> < FAIL: gcc.target/powerpc/p9-vec-length-full-5.c scan-assembler-not \\\\mstxv\\\\M >>> < FAIL: gcc.target/powerpc/p9-vec-length-full-5.c scan-assembler-not \\\\mstxvx\\\\M >>> < FAIL: gcc.target/powerpc/p9-vec-length-full-5.c scan-assembler-times \\\\mlxvl\\\\M 21 >>> < FAIL: gcc.target/powerpc/p9-vec-length-full-5.c scan-assembler-times \\\\mstxvl\\\\M 21 >>> < FAIL: gcc.target/powerpc/p9-vec-length-full-6.c scan-assembler-times \\\\mlxvl\\\\M 10 >>> < FAIL: gcc.target/powerpc/p9-vec-length-full-6.c scan-assembler-times \\\\mstxvl\\\\M 10 >>> < FAIL: gcc.target/powerpc/p9-vec-length-full-6.c scan-assembler-times \\\\mstxvx?\\\\M 6 >>> < FAIL: gcc.target/powerpc/p9-vec-length-full-8.c scan-assembler-times \\\\mlxvl\\\\M 30 >>> < FAIL: gcc.target/powerpc/p9-vec-length-full-8.c scan-assembler-times \\\\mstxvl\\\\M 10 >>> >>> By checking several of them, it's due to that we don't vectorize >>> some loop having float type involved with partial vector any more. >>> >>> As you suggested above, I fixed them with an extra option >>> "-fno-trapping-math" and verified all of them can pass again. >>> I also noticed that the original test case in PR96373 fails >>> on Power10 too, so I added one constructed case pr96373.c >>> into sub bucket gcc.target/powerpc for testing coverage >>> on Power. >>> >>> One re-spin with the attached adjustment shows there is no >>> regression failure any more, and the new test case works well >>> on both ppc64 (P8) and ppc64le (P10) Linux. >> >> Thanks for doing this. The patch is OK, if you need approval. >> I'll push mine once it's in. > > Thanks for the review! Pushed in r13-5978-g4f5a1198065dc0. Thanks, I've now pushed the vectoriser patch. > btw, do we want this to be backported? If yes, I'm going to > backport it to gcc-12 and gcc-11 branches soon (for gcc-10 we > don't have partial vector support on Power btw). Yeah, for SVE it'll need to go on all active branches. I'm going to be off until 27th Feb so I'll start backporting after that. Richard