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From: Richard Sandiford <richard.sandiford@arm.com>
To: "H.J. Lu" <hjl.tools@gmail.com>
Cc: GCC Patches <gcc-patches@gcc.gnu.org>,
	 Uros Bizjak <ubizjak@gmail.com>,
	 Marc Glisse <marc.glisse@inria.fr>
Subject: Re: PING^1: [PATCH] i386: Add standard scalar operation patterns
Date: Wed, 15 May 2019 21:29:00 -0000	[thread overview]
Message-ID: <mpt5zqbe7a6.fsf@arm.com> (raw)
In-Reply-To: <CAMe9rOpukFLJ1qGv8kxoqaVf0U2Ktn-XOMj8aDrd9JORXa-w6Q@mail.gmail.com>	(H. J. Lu's message of "Wed, 15 May 2019 12:15:35 -0700")

"H.J. Lu" <hjl.tools@gmail.com> writes:
> On Thu, Feb 7, 2019 at 9:49 AM H.J. Lu <hjl.tools@gmail.com> wrote:
>>
>> Standard scalar operation patterns which preserve the rest of the vector
>> look like
>>
>>      (vec_merge:V2DF
>>        (vec_duplicate:V2DF
>>          (op:DF (vec_select:DF (reg/v:V2DF 85 [ x ])
>>                 (parallel [ (const_int 0 [0])]))
>>          (reg:DF 87))
>>        (reg/v:V2DF 85 [ x ])
>>        (const_int 1 [0x1])]))
>>
>> Add such pattens to i386 backend and convert VEC_CONCAT patterns to
>> standard standard scalar operation patterns.

It looks like there's some variety in the patterns used, e.g.:

(define_insn "<sse>_vm<code><mode>3<mask_scalar_name><round_saeonly_scalar_name>"
  [(set (match_operand:VF_128 0 "register_operand" "=x,v")
	(vec_merge:VF_128
	  (smaxmin:VF_128
	    (match_operand:VF_128 1 "register_operand" "0,v")
	    (match_operand:VF_128 2 "vector_operand" "xBm,<round_saeonly_scalar_constraint>"))
	 (match_dup 1)
	 (const_int 1)))]
  "TARGET_SSE"
  "@
   <maxmin_float><ssescalarmodesuffix>\t{%2, %0|%0, %<iptr>2}
   v<maxmin_float><ssescalarmodesuffix>\t{<round_saeonly_scalar_mask_op3>%2, %1, %0<mask_scalar_operand3>|%0<mask_scalar_operand3>, %1, %<iptr>2<round_saeonly_scalar_mask_op3>}"
  [(set_attr "isa" "noavx,avx")
   (set_attr "type" "sse")
   (set_attr "btver2_sse_attr" "maxmin")
   (set_attr "prefix" "<round_saeonly_scalar_prefix>")
   (set_attr "mode" "<ssescalarmode>")])

makes the operand a full vector operation, which seems simpler.
The above would then be:

      (vec_merge:V2DF
	(op:V2DF
	  (reg:V2DF 85)
          (vec_duplicate:V2DF (reg:DF 87)))
        (reg/v:V2DF 85 [ x ])
        (const_int 1 [0x1])]))

I guess technically the two have different faulting behaviour though,
since the smaxmin gets applied to all elements, not just element 0.

The patch seems very specific.  E.g. why just PLUS, MINUS, MULT and DIV?

Thanks,
Richard


>>
>> gcc/
>>
>>         PR target/54855
>>         * simplify-rtx.c (simplify_binary_operation_1): Convert
>>         VEC_CONCAT patterns to standard standard scalar operation
>>         patterns.
>>         * config/i386/sse.md (*<sse>_vm<plusminus_insn><mode>3): New.
>>         (*<sse>_vm<multdiv_mnemonic><mode>3): Likewise.
>>
>> gcc/testsuite/
>>
>>         PR target/54855
>>         * gcc.target/i386/pr54855-1.c: New test.
>>         * gcc.target/i386/pr54855-2.c: Likewise.
>>         * gcc.target/i386/pr54855-3.c: Likewise.
>>         * gcc.target/i386/pr54855-4.c: Likewise.
>>         * gcc.target/i386/pr54855-5.c: Likewise.
>>         * gcc.target/i386/pr54855-6.c: Likewise.
>>         * gcc.target/i386/pr54855-7.c: Likewise.
>
> PING:
>
> https://gcc.gnu.org/ml/gcc-patches/2019-02/msg00398.html

  reply	other threads:[~2019-05-15 21:29 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-07 17:49 H.J. Lu
2019-05-15 19:16 ` PING^1: " H.J. Lu
2019-05-15 21:29   ` Richard Sandiford [this message]
2019-05-21 15:54     ` [PATCH] i386: Generate standard floating point " H.J. Lu
2019-06-03 22:51       ` PING^1: " H.J. Lu
2019-06-18 16:01         ` PING^2: " H.J. Lu
2019-06-19 19:21         ` PING^1: " Jeff Law

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