From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 0574E3858D38 for ; Wed, 12 Aug 2020 16:25:15 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 0574E3858D38 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=richard.sandiford@arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id AC93131B; Wed, 12 Aug 2020 09:25:14 -0700 (PDT) Received: from localhost (e121540-lin.manchester.arm.com [10.32.98.126]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 38DC33F22E; Wed, 12 Aug 2020 09:25:14 -0700 (PDT) From: Richard Sandiford To: qiaopeixin Mail-Followup-To: qiaopeixin , "gcc-patches\@gcc.gnu.org" , richard.sandiford@arm.com Cc: "gcc-patches\@gcc.gnu.org" Subject: Re: [PATCH] AArch64: Add if condition in aarch64_function_value [PR96479] References: <42246858DDD89D4E9F3F8317B1282F59A2D445@dggemi522-mbs.china.huawei.com> Date: Wed, 12 Aug 2020 17:25:12 +0100 In-Reply-To: <42246858DDD89D4E9F3F8317B1282F59A2D445@dggemi522-mbs.china.huawei.com> (qiaopeixin@huawei.com's message of "Thu, 6 Aug 2020 13:01:00 +0000") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-Spam-Status: No, score=-7.8 required=5.0 tests=BAYES_00, KAM_DMARC_STATUS, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 12 Aug 2020 16:25:16 -0000 qiaopeixin writes: > Hi, > > The test case vector-subscript-2.c in the gcc testsuit will report an ICE in the expand pass since '-mgeneral-regs-only' is incompatible with the use of V4SI mode. I propose to report the diagnostic information instead of ICE, and the problem has been discussed on PR 96479. > > I attached the patch to solve the problem. Bootstrapped and tested on aarch64-linux-gnu. Any suggestions? Thanks, pushed. I was initially sceptical because raising an error here and in aarch64_layout_arg is a hack. Both functions are just query functions and shouldn't have any side effects. The approach we took for FP modes seemed better: we define the FP move patterns unconditionally, and raise an error if we try to emit an FP move with !TARGET_FLOAT. This defers any error reporting until we actually try to generate code that depends on TARGET_FLOAT. But I guess SIMD stuff is different. There's no reason in principle why you can't use: unsigned short __attribute__((vector_size(8))) *within* a function with -mgeneral-regs-only. It would just need to be emulated, in the same way as for: unsigned short __attribute__((vector_size(4))) So it would be wrong to define the SIMD move patterns unconditionally and raise an error there. So all in all, I agree this is the best we can do given the current infrastructure. Thanks, Richard