* [PATCH 09/11] aarch64, testsuite: Fix up pr71727.c
@ 2023-10-17 20:49 Alex Coplan
2023-10-18 18:13 ` Richard Sandiford
0 siblings, 1 reply; 2+ messages in thread
From: Alex Coplan @ 2023-10-17 20:49 UTC (permalink / raw)
To: gcc-patches; +Cc: Richard Earnshaw, Richard Sandiford, Kyrylo Tkachov
[-- Attachment #1: Type: text/plain, Size: 700 bytes --]
The test is trying to check that we don't use q-register stores with
-mstrict-align, so actually check specifically for that.
This is a prerequisite to avoid regressing:
scan-assembler-not "add\tx0, x0, :"
with the upcoming ldp fusion pass, as we change where the ldps are
formed such that a register is used rather than a symbolic (lo_sum)
address for the first load.
Bootstrapped/regtested as a series on aarch64-linux-gnu, OK for trunk?
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/pr71727.c: Adjust scan-assembler-not to
make sure we don't have q-register stores with -mstrict-align.
---
gcc/testsuite/gcc.target/aarch64/pr71727.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
[-- Attachment #2: 0009-aarch64-testsuite-Fix-up-pr71727.c.patch --]
[-- Type: text/x-patch, Size: 493 bytes --]
diff --git a/gcc/testsuite/gcc.target/aarch64/pr71727.c b/gcc/testsuite/gcc.target/aarch64/pr71727.c
index 41fa72bc67e..226258a76fe 100644
--- a/gcc/testsuite/gcc.target/aarch64/pr71727.c
+++ b/gcc/testsuite/gcc.target/aarch64/pr71727.c
@@ -30,4 +30,4 @@ _start (void)
}
/* { dg-final { scan-assembler-times "mov\tx" 5 {target lp64} } } */
-/* { dg-final { scan-assembler-not "add\tx0, x0, :" {target lp64} } } */
+/* { dg-final { scan-assembler-not {st[rp]\tq[0-9]+} {target lp64} } } */
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH 09/11] aarch64, testsuite: Fix up pr71727.c
2023-10-17 20:49 [PATCH 09/11] aarch64, testsuite: Fix up pr71727.c Alex Coplan
@ 2023-10-18 18:13 ` Richard Sandiford
0 siblings, 0 replies; 2+ messages in thread
From: Richard Sandiford @ 2023-10-18 18:13 UTC (permalink / raw)
To: Alex Coplan; +Cc: gcc-patches, Richard Earnshaw, Kyrylo Tkachov
Alex Coplan <alex.coplan@arm.com> writes:
> The test is trying to check that we don't use q-register stores with
> -mstrict-align, so actually check specifically for that.
>
> This is a prerequisite to avoid regressing:
>
> scan-assembler-not "add\tx0, x0, :"
>
> with the upcoming ldp fusion pass, as we change where the ldps are
> formed such that a register is used rather than a symbolic (lo_sum)
> address for the first load.
>
> Bootstrapped/regtested as a series on aarch64-linux-gnu, OK for trunk?
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/aarch64/pr71727.c: Adjust scan-assembler-not to
> make sure we don't have q-register stores with -mstrict-align.
OK, thanks.
Richard
> ---
> gcc/testsuite/gcc.target/aarch64/pr71727.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/gcc/testsuite/gcc.target/aarch64/pr71727.c b/gcc/testsuite/gcc.target/aarch64/pr71727.c
> index 41fa72bc67e..226258a76fe 100644
> --- a/gcc/testsuite/gcc.target/aarch64/pr71727.c
> +++ b/gcc/testsuite/gcc.target/aarch64/pr71727.c
> @@ -30,4 +30,4 @@ _start (void)
> }
>
> /* { dg-final { scan-assembler-times "mov\tx" 5 {target lp64} } } */
> -/* { dg-final { scan-assembler-not "add\tx0, x0, :" {target lp64} } } */
> +/* { dg-final { scan-assembler-not {st[rp]\tq[0-9]+} {target lp64} } } */
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