From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 6C6C73858C78 for ; Wed, 28 Dec 2022 11:47:57 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 6C6C73858C78 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 73E592F4; Wed, 28 Dec 2022 03:48:38 -0800 (PST) Received: from localhost (e121540-lin.manchester.arm.com [10.32.99.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 465A93F71A; Wed, 28 Dec 2022 03:47:56 -0800 (PST) From: Richard Sandiford To: Jeff Law via Gcc-patches Mail-Followup-To: Jeff Law via Gcc-patches ,"juzhe.zhong" , Jeff Law , "kito.cheng\@gmail.com" , "palmer\@dabbelt.com" , richard.sandiford@arm.com Cc: "juzhe.zhong" , Jeff Law , "kito.cheng\@gmail.com" , "palmer\@dabbelt.com" Subject: Re: [PATCH] RISC-V: Fix ICE of visiting non-existing block in CFG. References: <20221224030800.221397-1-juzhe.zhong@rivai.ai> <91200E8AE78D17FA+15C0DC8B-584B-48FB-B92F-6932C4CCEB51@rivai.ai> <30b1c78f-42ab-a634-67bf-7a54b0012a0e@gmail.com> Date: Wed, 28 Dec 2022 11:47:55 +0000 In-Reply-To: <30b1c78f-42ab-a634-67bf-7a54b0012a0e@gmail.com> (Jeff Law via Gcc-patches's message of "Tue, 27 Dec 2022 17:06:02 -0700") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-32.1 required=5.0 tests=BAYES_00,KAM_DMARC_NONE,KAM_DMARC_STATUS,KAM_LAZY_DOMAIN_SECURITY,SPF_HELO_NONE,SPF_NONE,TXREP autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Jeff Law via Gcc-patches writes: > On 12/27/22 16:11, juzhe.zhong wrote: >> You mean only change to this form you suggested in this patch=EF=BC=9F S= ince in=20 >> all other places of this PASS=EF=BC=8CI use RTL_SSA framework to iterate= =20 >> instructions and blocks. I use RTL_SSA framework to iterate blocks here= =20 >> to make codes look more consistent even though they are same here. > The FOR_EACH_BB is used far more widely than the C++ style found in=20 > RTL-SSA so I'd slightly prefer that style. I can see where you're coming from, but what the patch does is preferred for RTL-SSA passes. There is some additional information in rtl_ssa::bb_info compared to the underlying basic_block, and even if this particular loop doesn't use that information, IMO it would be better to avoid mixing styles within a pass. Also, the list that the patch iterates over is in reverse postorder, whereas FOR_EACH_BB doesn't guarantee a particular order. Again, that might not be important here, but it seems better to stick to the =E2=80=9Cnative=E2=80=9D RTL-SSA approach. Thanks, Richard