From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 9A1DE3858038 for ; Sun, 27 Jun 2021 08:43:04 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 9A1DE3858038 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 331AD11B3; Sun, 27 Jun 2021 01:43:04 -0700 (PDT) Received: from localhost (e121540-lin.manchester.arm.com [10.32.98.126]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 420DB3F694; Sun, 27 Jun 2021 01:43:03 -0700 (PDT) From: Richard Sandiford To: "H.J. Lu" Mail-Followup-To: "H.J. Lu" , gcc-patches@gcc.gnu.org, Uros Bizjak , Jakub Jelinek , Hongtao Liu , Richard Biener , richard.sandiford@arm.com Cc: gcc-patches@gcc.gnu.org, Uros Bizjak , Jakub Jelinek , Hongtao Liu , Richard Biener Subject: Re: [PATCH v5 2/2] x86: Add vec_duplicate expander References: <20210626200223.1371358-1-hjl.tools@gmail.com> <20210626200223.1371358-3-hjl.tools@gmail.com> Date: Sun, 27 Jun 2021 09:43:02 +0100 In-Reply-To: <20210626200223.1371358-3-hjl.tools@gmail.com> (H. J. Lu's message of "Sat, 26 Jun 2021 13:02:23 -0700") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-Spam-Status: No, score=-12.4 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 27 Jun 2021 08:43:06 -0000 "H.J. Lu" writes: > 1. Update vec_duplicate to allow to fail so that backend can only allow > broadcasting an integer constant to a vector when broadcast instruction > is available. This can be used by memset expander to avoid vec_duplicate > when loading from constant pool is more efficient. I don't see any changes in target-independent code though, other than the doc update. It's still the case that (existing) uses of vec_duplicate_optab do not allow it to fail. Thanks, Richard > 2. Add vec_duplicate expander and enable vec_duplicate from a > non-standard SSE constant integer only if vector broadcast is available. > > * config/i386/i386-expand.c (ix86_expand_integer_vec_duplicate): > New function. > * config/i386/i386-protos.h (ix86_expand_integer_vec_duplicat): > New prototype. > * config/i386/sse.md (INT_BROADCAST_MODE): New mode iterator. > (vec_duplicate): New expander. > * doc/md.texi: Update vec_duplicate. > --- > gcc/config/i386/i386-expand.c | 24 ++++++++++++++++++++++++ > gcc/config/i386/i386-protos.h | 1 + > gcc/config/i386/sse.md | 28 ++++++++++++++++++++++++++++ > gcc/doc/md.texi | 2 -- > 4 files changed, 53 insertions(+), 2 deletions(-) > > diff --git a/gcc/config/i386/i386-expand.c b/gcc/config/i386/i386-expand.c > index e9e89c82764..75c160d4349 100644 > --- a/gcc/config/i386/i386-expand.c > +++ b/gcc/config/i386/i386-expand.c > @@ -15742,6 +15742,30 @@ ix86_expand_vector_extract (bool mmx_ok, rtx target, rtx vec, int elt) > } > } > > +/* Expand integer vec_duplicate. Return true if successful. */ > + > +bool > +ix86_expand_integer_vec_duplicate (rtx *operands) > +{ > + /* Enable VEC_DUPLICATE from a non-standard SSE constant integer only > + if vector broadcast is available. */ > + machine_mode mode = GET_MODE (operands[0]); > + if (CONST_INT_P (operands[1]) > + && (!(TARGET_AVX2 > + || (TARGET_AVX > + && (GET_MODE_INNER (mode) == SImode > + || GET_MODE_INNER (mode) == DImode))) > + || standard_sse_constant_p (operands[1], mode))) > + return false; > + > + bool ok = ix86_expand_vector_init_duplicate (false, mode, > + operands[0], > + operands[1]); > + gcc_assert (ok); > + > + return true; > +} > + > /* Generate code to copy vector bits i / 2 ... i - 1 from vector SRC > to bits 0 ... i / 2 - 1 of vector DEST, which has the same mode. > The upper bits of DEST are undefined, though they shouldn't cause > diff --git a/gcc/config/i386/i386-protos.h b/gcc/config/i386/i386-protos.h > index 71745b9a1ea..a6cc09bb75b 100644 > --- a/gcc/config/i386/i386-protos.h > +++ b/gcc/config/i386/i386-protos.h > @@ -258,6 +258,7 @@ extern void ix86_expand_mul_widen_hilo (rtx, rtx, rtx, bool, bool); > extern void ix86_expand_sse2_mulv4si3 (rtx, rtx, rtx); > extern void ix86_expand_sse2_mulvxdi3 (rtx, rtx, rtx); > extern void ix86_expand_sse2_abs (rtx, rtx); > +extern bool ix86_expand_integer_vec_duplicate (rtx *); > > /* In i386-c.c */ > extern void ix86_target_macros (void); > diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md > index e4f01e64bc1..53a703fb466 100644 > --- a/gcc/config/i386/sse.md > +++ b/gcc/config/i386/sse.md > @@ -24640,3 +24640,31 @@ (define_insn "*aesu8" > "TARGET_WIDEKL" > "aes\t{%0}" > [(set_attr "type" "other")]) > + > +;; Modes handled by broadcast patterns. NB: Allow V64QI and V32HI with > +;; TARGET_AVX512F since ix86_expand_integer_vec_duplicate can expand > +;; without TARGET_AVX512BW which is used by memset vector broadcast > +;; expander to XI with: > +;; vmovd %edi, %xmm15 > +;; vpbroadcastb %xmm15, %ymm15 > +;; vinserti64x4 $0x1, %ymm15, %zmm15, %zmm15 > + > +(define_mode_iterator INT_BROADCAST_MODE > + [(V64QI "TARGET_AVX512F") (V32QI "TARGET_AVX") V16QI > + (V32HI "TARGET_AVX512F") (V16HI "TARGET_AVX") V8HI > + (V16SI "TARGET_AVX512F") (V8SI "TARGET_AVX") V4SI > + (V8DI "TARGET_AVX512F && TARGET_64BIT") > + (V4DI "TARGET_AVX && TARGET_64BIT") (V2DI "TARGET_64BIT")]) > + > +;; Broadcast from an integer. NB: Enable broadcast only if we can move > +;; from GPR to SSE register directly. > +(define_expand "vec_duplicate" > + [(set (match_operand:INT_BROADCAST_MODE 0 "register_operand") > + (vec_duplicate:INT_BROADCAST_MODE > + (match_operand: 1 "general_operand")))] > + "TARGET_SSE2 && TARGET_INTER_UNIT_MOVES_TO_VEC" > +{ > + if (!ix86_expand_integer_vec_duplicate (operands)) > + FAIL; > + DONE; > +}) > diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi > index 1b918144330..a892c94d163 100644 > --- a/gcc/doc/md.texi > +++ b/gcc/doc/md.texi > @@ -5077,8 +5077,6 @@ the mode appropriate for one element of @var{m}. > This pattern only handles duplicates of non-constant inputs. Constant > vectors go through the @code{mov@var{m}} pattern instead. > > -This pattern is not allowed to @code{FAIL}. > - > @cindex @code{vec_series@var{m}} instruction pattern > @item @samp{vec_series@var{m}} > Initialize vector output operand 0 so that element @var{i} is equal to