From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 4E967385842A for ; Wed, 14 Feb 2024 21:27:31 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 4E967385842A Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=arm.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 4E967385842A Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1707946052; cv=none; b=nH5YRJZ8ylzez0k7mXe2zDRy7Tq8YP48d48qp4QaSa/jWV2korPzxH9qRggEJvhltfhkdh+w68BRrDjP6HhqdktLxy4YVnVX6LNzr8qrLwnnOGnWFb96tEdCn6papZHhJ8KeefNQnSs6k6i8q+lk2a4mfK8XzAwjCXq0jOE1UDc= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1707946052; c=relaxed/simple; bh=nr+18zcBOocfekyIoBDTx5MAPOzpVYc7l6ETajEGZzs=; h=From:To:Subject:Date:Message-ID:MIME-Version; b=fsfWhCGLmwGkuu1/xO5PWLHReGMzZKbTMfPyVV1Oz2qL605oizaDA6Kytiikv8lqn5A2JZnlT5hihWH1n44JAn3TjQXzOQSvwEA+nDUIrXKWSMGonUUqri2C9KRFV598K2Rhwv3LvvUX3q/Zl0UvMMFiWIMsd+5fEgSmqHfDaCU= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D70E01FB; Wed, 14 Feb 2024 13:28:11 -0800 (PST) Received: from localhost (e121540-lin.manchester.arm.com [10.32.110.72]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 6248F3F7B4; Wed, 14 Feb 2024 13:27:30 -0800 (PST) From: Richard Sandiford To: Andrew Pinski Mail-Followup-To: Andrew Pinski ,, richard.sandiford@arm.com Cc: Subject: Re: [PATCH] aarch64: Use vec_perm_indices::new_shrunk_vector in aarch64_evpc_reencode References: <20240213032129.3744441-1-quic_apinski@quicinc.com> Date: Wed, 14 Feb 2024 21:27:29 +0000 In-Reply-To: <20240213032129.3744441-1-quic_apinski@quicinc.com> (Andrew Pinski's message of "Mon, 12 Feb 2024 19:21:29 -0800") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-Spam-Status: No, score=-21.0 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_NONE,KAM_DMARC_STATUS,KAM_LAZY_DOMAIN_SECURITY,SPF_HELO_NONE,SPF_NONE,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Andrew Pinski writes: > While working on PERM related stuff, I can across that aarch64_evpc_reencode > was manually figuring out if we shrink the perm indices instead of > using vec_perm_indices::new_shrunk_vector; shrunk was added after reencode > was added. > > Built and tested for aarch64-linux-gnu with no regressions. > > gcc/ChangeLog: > > PR target/113822 > * config/aarch64/aarch64.cc (aarch64_evpc_reencode): Use > vec_perm_indices::new_shrunk_vector instead of manually > going through the indices. Good spot! OK for stage 1, thanks. Richard > > Signed-off-by: Andrew Pinski > --- > gcc/config/aarch64/aarch64.cc | 24 +++++------------------- > 1 file changed, 5 insertions(+), 19 deletions(-) > > diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc > index 32eae49d4e9..f4ed8b86532 100644 > --- a/gcc/config/aarch64/aarch64.cc > +++ b/gcc/config/aarch64/aarch64.cc > @@ -25431,7 +25431,6 @@ static bool > aarch64_evpc_reencode (struct expand_vec_perm_d *d) > { > expand_vec_perm_d newd; > - unsigned HOST_WIDE_INT nelt; > > if (d->vec_flags != VEC_ADVSIMD) > return false; > @@ -25446,24 +25445,10 @@ aarch64_evpc_reencode (struct expand_vec_perm_d *d) > if (new_mode == word_mode) > return false; > > - /* to_constant is safe since this routine is specific to Advanced SIMD > - vectors. */ > - nelt = d->perm.length ().to_constant (); > - > - vec_perm_builder newpermconst; > - newpermconst.new_vector (nelt / 2, nelt / 2, 1); > + vec_perm_indices newpermindices; > > - /* Convert the perm constant if we can. Require even, odd as the pairs. */ > - for (unsigned int i = 0; i < nelt; i += 2) > - { > - poly_int64 elt0 = d->perm[i]; > - poly_int64 elt1 = d->perm[i + 1]; > - poly_int64 newelt; > - if (!multiple_p (elt0, 2, &newelt) || maybe_ne (elt0 + 1, elt1)) > - return false; > - newpermconst.quick_push (newelt.to_constant ()); > - } > - newpermconst.finalize (); > + if (!newpermindices.new_shrunk_vector (d->perm, 2)) > + return false; > > newd.vmode = new_mode; > newd.vec_flags = VEC_ADVSIMD; > @@ -25475,7 +25460,8 @@ aarch64_evpc_reencode (struct expand_vec_perm_d *d) > newd.testing_p = d->testing_p; > newd.one_vector_p = d->one_vector_p; > > - newd.perm.new_vector (newpermconst, newd.one_vector_p ? 1 : 2, nelt / 2); > + newd.perm.new_vector (newpermindices.encoding (), newd.one_vector_p ? 1 : 2, > + newpermindices.nelts_per_input ()); > return aarch64_expand_vec_perm_const_1 (&newd); > }