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From: Richard Sandiford <richard.sandiford@arm.com>
To: "Andre Vieira \(lists\)" <andre.simoesdiasvieira@arm.com>
Cc: "gcc-patches\@gcc.gnu.org" <gcc-patches@gcc.gnu.org>,
	 "jakub\@redhat.com" <jakub@redhat.com>,
	 Richard Biener <rguenther@suse.de>
Subject: Re: [RFC 0/X] Implement GCC support for AArch64 libmvec
Date: Fri, 21 Apr 2023 10:54:51 +0100	[thread overview]
Message-ID: <mptbkjha7bo.fsf@arm.com> (raw)
In-Reply-To: <f70ca0bb-1ef1-6f36-b3a0-359d336f0482@arm.com> (Andre Vieira's message of "Fri, 21 Apr 2023 10:28:43 +0100")

"Andre Vieira (lists)" <andre.simoesdiasvieira@arm.com> writes:
> On 20/04/2023 17:13, Richard Sandiford wrote:
>> "Andre Vieira (lists)" <andre.simoesdiasvieira@arm.com> writes:
>>> On 20/04/2023 15:51, Richard Sandiford wrote:
>>>> "Andre Vieira (lists)" <andre.simoesdiasvieira@arm.com> writes:
>>>>> Hi all,
>>>>>
>>>>> This is a series of patches/RFCs to implement support in GCC to be able
>>>>> to target AArch64's libmvec functions that will be/are being added to glibc.
>>>>> We have chosen to use the omp pragma '#pragma omp declare variant ...'
>>>>> with a simd construct as the way for glibc to inform GCC what functions
>>>>> are available.
>>>>>
>>>>> For example, if we would like to supply a vector version of the scalar
>>>>> 'cosf' we would have an include file with something like:
>>>>> typedef __attribute__((__neon_vector_type__(4))) float __f32x4_t;
>>>>> typedef __attribute__((__neon_vector_type__(2))) float __f32x2_t;
>>>>> typedef __SVFloat32_t __sv_f32_t;
>>>>> typedef __SVBool_t __sv_bool_t;
>>>>> __f32x4_t _ZGVnN4v_cosf (__f32x4_t);
>>>>> __f32x2_t _ZGVnN2v_cosf (__f32x2_t);
>>>>> __sv_f32_t _ZGVsMxv_cosf (__sv_f32_t, __sv_bool_t);
>>>>> #pragma omp declare variant(_ZGVnN4v_cosf) \
>>>>>        match(construct = {simd(notinbranch, simdlen(4))}, device =
>>>>> {isa("simd")})
>>>>> #pragma omp declare variant(_ZGVnN2v_cosf) \
>>>>>        match(construct = {simd(notinbranch, simdlen(2))}, device =
>>>>> {isa("simd")})
>>>>> #pragma omp declare variant(_ZGVsMxv_cosf) \
>>>>>        match(construct = {simd(inbranch)}, device = {isa("sve")})
>>>>> extern float cosf (float);
>>>>>
>>>>> The BETA ABI can be found in the vfabia64 subdir of
>>>>> https://github.com/ARM-software/abi-aa/
>>>>> This currently disagrees with how this patch series implements 'omp
>>>>> declare simd' for SVE and I also do not see a need for the 'omp declare
>>>>> variant' scalable extension constructs. I will make changes to the ABI
>>>>> once we've finalized the co-design of the ABI and this implementation.
>>>>
>>>> I don't see a good reason for dropping the extension("scalable").
>>>> The problem is that since the base spec requires a simdlen clause,
>>>> GCC should in general raise an error if simdlen is omitted.
>>> Where can you find this in the specs? I tried to find it but couldn't.
>>>
>>> Leaving out simdlen in a 'omp declare simd' I assume is OK, our vector
>>> ABI defines behaviour for this. But I couldn't find what it meant for a
>>> omp declare variant, obviously can't be the same as for declare simd, as
>>> that is defined to mean 'define a set of clones' and only one clone can
>>> be associated to a declare variant.
>> 
>> I was going from https://www.openmp.org/spec-html/5.0/openmpsu25.html ,
>> which says:
>> 
>>    The simd trait can be further defined with properties that match the
>>    clauses accepted by the declare simd directive with the same name and
>>    semantics. The simd trait must define at least the simdlen property and
>>    one of the inbranch or notinbranch properties.
>> 
>> (probably best to read it in the original -- it's almost incomprehensible
>> without markup)
>> 
> I'm guessing the keyword here is 'trait' which I'm guessing is different 
> from a omp declare simd directive, which is why it's not required to 
> have a simdlen clause in an omp declare simd (see Jakub's comment).

Sure.  The thread above is about whether we need extension("scalable")
or should drop it.  And extension("scalable") is only used in omp
declare variant.  This was in response to "I also do not see a need
for the 'omp declare variant' scalable extension constructs".

Not having a simdlen on an omp declare simd is of course OK (and the
VFABI defines behaviour for that case).

Richard

  reply	other threads:[~2023-04-21  9:54 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-08 16:17 Andre Vieira (lists)
2023-03-08 16:20 ` [PATCH 1/X] omp: Replace simd_clone_subparts with TYPE_VECTOR_SUBPARTS Andre Vieira (lists)
2023-04-20 15:20   ` Richard Sandiford
2023-03-08 16:21 ` [PATCH 2/X] parloops: Copy target and optimizations when creating a function clone Andre Vieira (lists)
2023-03-08 16:23 ` [PATCH 3/X] parloops: Allow poly number of iterations Andre Vieira (lists)
2023-03-08 16:25 ` [RFC 4/X] omp, aarch64: Add SVE support for 'omp declare simd' [PR 96342] Andre Vieira (lists)
2023-03-08 16:26 ` [RFC 5/X] omp: Create simd clones from 'omp declare variant's Andre Vieira (lists)
2023-03-08 16:28 ` [RFC 6/X] omp: Allow creation of simd clones from omp declare variant with -fopenmp-simd flag Andre Vieira (lists)
2023-04-20 14:51 ` [RFC 0/X] Implement GCC support for AArch64 libmvec Richard Sandiford
2023-04-20 15:22   ` Andre Vieira (lists)
2023-04-20 16:02     ` Jakub Jelinek
2023-04-20 16:13     ` Richard Sandiford
2023-04-21  9:28       ` Andre Vieira (lists)
2023-04-21  9:54         ` Richard Sandiford [this message]
2023-04-21 10:28           ` Jakub Jelinek

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