From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 54067 invoked by alias); 17 Sep 2019 16:58:58 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 54046 invoked by uid 89); 17 Sep 2019 16:58:58 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-4.3 required=5.0 tests=AWL,BAYES_00,SPF_PASS autolearn=ham version=3.3.1 spammy=H*i:sk:7ca8832, H*f:sk:7ca8832, states X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.110.172) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 17 Sep 2019 16:58:57 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7F68C28; Tue, 17 Sep 2019 09:58:55 -0700 (PDT) Received: from localhost (dashpi.manchester.arm.com [10.32.98.126]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 70A203F575; Tue, 17 Sep 2019 09:58:54 -0700 (PDT) From: Richard Sandiford To: "Richard Earnshaw \(lists\)" Mail-Followup-To: "Richard Earnshaw \(lists\)" ,gcc-patches@gcc.gnu.org, james.greenhalgh@arm.com, marcus.shawcroft@arm.com, nickc@redhat.com, ramana.radhakrishnan@arm.com, kyrylo.tkachov@arm.com, richard.sandiford@arm.com Cc: gcc-patches@gcc.gnu.org, james.greenhalgh@arm.com, marcus.shawcroft@arm.com, nickc@redhat.com, ramana.radhakrishnan@arm.com, kyrylo.tkachov@arm.com Subject: Re: [arm][aarch64] Make no_insn issue to nothing References: <7ca8832e-0daf-5515-c11c-dbe48536ef67@arm.com> Date: Tue, 17 Sep 2019 16:58:00 -0000 In-Reply-To: <7ca8832e-0daf-5515-c11c-dbe48536ef67@arm.com> (Richard Earnshaw's message of "Tue, 17 Sep 2019 16:38:09 +0100") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.1 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-IsSubscribed: yes X-SW-Source: 2019-09/txt/msg01019.txt.bz2 "Richard Earnshaw (lists)" writes: > On 17/09/2019 15:57, Richard Sandiford wrote: >> no_insn is documented as: >> >> an insn which does not represent an instruction in the final output, >> thus having no impact on scheduling. >> >> and is used in that way by the arm port (e.g. for define_insns that >> expand to comments). However, most scheduling descriptions instead >> assigned units to no_insn patterns, in some cases treating them as more >> expensive than a plain move. >> >> This patch removes the no_insn handling from individual scheduling >> descriptions and uses a common define_insn_reservation for all CPUs. >> >> Tested on aarch64-linux-gnu and armeab-none-eabi. OK to install? >> > > OK. > > Out of interest, does this affect the number of atomata states > significantly? No, it's a very minor improvement, but not one we'll notice: @@ -5,7 +5,7 @@ 15 minimal DFA states, 113 minimal DFA arcs 629 all insns 14 insn equivalence classes 0 locked states - 145 transition comb vector els, 210 trans table els: use simple vect + 142 transition comb vector els, 210 trans table els: use simple vect 210 min delay table els, compression factor 4 Automaton `cortex_a53_advsimd' @@ -243,7 +243,7 @@ 35 min delay table els, compression factor 4 13689 all allocated states, 38825 all allocated arcs -43554 all allocated alternative states -45768 all transition comb vector els, 91862 all trans table els +43473 all allocated alternative states +45765 all transition comb vector els, 91862 all trans table els 91862 all min delay table els 0 all locked states Thanks, Richard