From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id BC3EC3858D28 for ; Mon, 24 Apr 2023 09:32:26 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org BC3EC3858D28 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 46611D75; Mon, 24 Apr 2023 02:33:10 -0700 (PDT) Received: from localhost (e121540-lin.manchester.arm.com [10.32.110.72]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C140A3F5A1; Mon, 24 Apr 2023 02:32:25 -0700 (PDT) From: Richard Sandiford To: Prathamesh Kulkarni Mail-Followup-To: Prathamesh Kulkarni ,Richard Biener , gcc Patches , richard.sandiford@arm.com Cc: Richard Biener , gcc Patches Subject: Re: [match.pd] [SVE] Add pattern to transform svrev(svrev(v)) --> v References: Date: Mon, 24 Apr 2023 10:32:24 +0100 In-Reply-To: (Prathamesh Kulkarni's message of "Sun, 23 Apr 2023 11:41:19 +0530") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-Spam-Status: No, score=-30.5 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_NONE,KAM_DMARC_STATUS,KAM_LAZY_DOMAIN_SECURITY,KAM_SHORT,SPF_HELO_NONE,SPF_NONE,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Prathamesh Kulkarni writes: > gcc/ChangeLog: > * tree-ssa-forwprop.cc (is_combined_permutation_identity): Try to > simplify two successive VEC_PERM_EXPRs with single operand and same > mask, where mask chooses elements in reverse order. > > gcc/testesuite/ChangeLog: > * gcc.target/aarch64/sve/acle/general/rev-1.c: New test. > > diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/rev-1.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/rev-1.c > new file mode 100644 > index 00000000000..e57ee67d716 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/rev-1.c > @@ -0,0 +1,12 @@ > +/* { dg-do compile } */ > +/* { dg-options "-O3 -fdump-tree-optimized" } */ > + > +#include > + > +svint32_t f(svint32_t v) > +{ > + return svrev_s32 (svrev_s32 (v)); > +} > + > +/* { dg-final { scan-tree-dump "return v_1\\(D\\)" "optimized" } } */ > +/* { dg-final { scan-tree-dump-not "VEC_PERM_EXPR" "optimized" } } */ > diff --git a/gcc/tree-ssa-forwprop.cc b/gcc/tree-ssa-forwprop.cc > index 9b567440ba4..61df7efe82c 100644 > --- a/gcc/tree-ssa-forwprop.cc > +++ b/gcc/tree-ssa-forwprop.cc > @@ -2541,6 +2541,27 @@ is_combined_permutation_identity (tree mask1, tree mask2) > > gcc_checking_assert (TREE_CODE (mask1) == VECTOR_CST > && TREE_CODE (mask2) == VECTOR_CST); > + > + /* For VLA masks, check for the following pattern: > + v1 = VEC_PERM_EXPR (v0, v0, mask1) > + v2 = VEC_PERM_EXPR (v1, v1, mask2) Maybe blank out the second operands using "...": v1 = VEC_PERM_EXPR (v0, ..., mask1) v2 = VEC_PERM_EXPR (v1, ..., mask2) to make it clear that they don't matter. OK with that change, thanks. Richard > + --> > + v2 = v0 > + if mask1 == mask2 == {nelts - 1, nelts - 2, ...}. */ > + > + if (operand_equal_p (mask1, mask2, 0) > + && !VECTOR_CST_NELTS (mask1).is_constant ()) > + { > + vec_perm_builder builder; > + if (tree_to_vec_perm_builder (&builder, mask1)) > + { > + poly_uint64 nelts = TYPE_VECTOR_SUBPARTS (TREE_TYPE (mask1)); > + vec_perm_indices sel (builder, 1, nelts); > + if (sel.series_p (0, 1, nelts - 1, -1)) > + return 1; > + } > + } > + > mask = fold_ternary (VEC_PERM_EXPR, TREE_TYPE (mask1), mask1, mask1, mask2); > if (mask == NULL_TREE || TREE_CODE (mask) != VECTOR_CST) > return 0;