From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 8C56D3858D28 for ; Wed, 3 Nov 2021 19:57:03 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 8C56D3858D28 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1CE9DD6E; Wed, 3 Nov 2021 12:57:03 -0700 (PDT) Received: from localhost (unknown [10.32.98.88]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 61E573F7B4; Wed, 3 Nov 2021 12:57:02 -0700 (PDT) From: Richard Sandiford To: Philipp Tomsich Mail-Followup-To: Philipp Tomsich , gcc-patches@gcc.gnu.org, Kevin Smith , JiangNing Liu , richard.sandiford@arm.com Cc: gcc-patches@gcc.gnu.org, Kevin Smith , JiangNing Liu Subject: Re: [PATCH v1] aarch64: enable Ampere-1 CPU References: <20211101163625.6795-1-philipp.tomsich@vrull.eu> Date: Wed, 03 Nov 2021 19:57:01 +0000 In-Reply-To: (Philipp Tomsich's message of "Wed, 3 Nov 2021 19:01:33 +0100") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-Spam-Status: No, score=-6.4 required=5.0 tests=BAYES_00, KAM_DMARC_STATUS, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 03 Nov 2021 19:57:04 -0000 Philipp Tomsich writes: > Richard, > > On Wed, 3 Nov 2021 at 10:08, Richard Sandiford > wrote: >> >> Philipp Tomsich writes: >> > This adds support and a basic tuning model for the Ampere Computing >> > "Ampere-1" CPU. >> > >> > The Ampere-1 implements the ARMv8.6 architecture in A64 mode and is >> > modelled as a 4-wide issue (as with all modern micro-architectures, >> > the chosen issue rate is a compromise between the maximum dispatch >> > rate and the maximum rate of uops issued to the scheduler). >> > >> > This adds the -mcpu=ampere1 command-line option and the relevant cost >> > information/tuning tables for the Ampere-1. >> > >> > gcc/ChangeLog: >> > >> > * config/aarch64/aarch64-cores.def (AARCH64_CORE): New Ampere-1 >> > core. >> > * config/aarch64/aarch64-tune.md: Regenerate. >> > * config/aarch64/aarch64-cost-tables.h: Add extra costs for >> > Ampere-1. >> > * config/aarch64/aarch64.c: Add tuning structures for Ampere-1. >> >> OK, thanks. > > Would this be eligible for a backport to gcc-11 as well to ensure > commandline-compatibility? Yeah, that's fine. I think patches like this are OK to backport to all open release branches (although they'll need adjustment for GCC 10 and GCC 9, due to differences in the cost structures). Thanks, Richard