From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id E161B38515DF for ; Wed, 11 Aug 2021 09:28:35 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org E161B38515DF Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9052D113E; Wed, 11 Aug 2021 02:28:35 -0700 (PDT) Received: from localhost (e121540-lin.manchester.arm.com [10.32.98.126]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 00B5E3F70D; Wed, 11 Aug 2021 02:28:34 -0700 (PDT) From: Richard Sandiford To: Richard Biener Mail-Followup-To: Richard Biener , Jojo R , GCC Patches , richard.sandiford@arm.com Cc: Jojo R , GCC Patches Subject: Re: [PATCH] Adding target hook allows to reject initialization of register References: <20210810083222.51212-1-rjiejie@linux.alibaba.com> Date: Wed, 11 Aug 2021 10:28:33 +0100 In-Reply-To: (Richard Biener's message of "Tue, 10 Aug 2021 13:03:09 +0200") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-Spam-Status: No, score=-6.4 required=5.0 tests=BAYES_00, KAM_DMARC_STATUS, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 11 Aug 2021 09:28:37 -0000 Richard Biener writes: > On Tue, Aug 10, 2021 at 10:33 AM Jojo R via Gcc-patches > wrote: >> >> Some target like RISC-V allow to group vector register as a whole, >> and only operate part of it in fact, but the 'init-regs' pass will add initialization >> for uninitialized registers. Add this hook to reject this action for reducing instruction. > > Are these groups "visible"? That is, are the pseudos multi-reg > pseudos? I wonder > if there's a more generic way to tame down initregs w/o introducing a new target > hook. > > Btw, initregs is a red herring - it ideally should go away. See PR61810. > > So instead of adding to it can you see whether disabling the pass for RISC-V > works w/o fallout (and add a comment to the PR)? Maybe some more RTL > literate (in particular DF literate) can look at the remaining issue. > Richard, did you > ever have a look into the "issue" that initregs covers up (whatever > that exactly is)? No, sorry. I don't really understand what it would be from the comment in the code: [...] papers over some problems on the arm and other processors where certain isa constraints cannot be handled by gcc. These are of the form where two operands to an insn my not be the same. The ra will only make them the same if they do not interfere, and this can only happen if one is not initialized. That would definitely be an RA bug if true, since the constraints need to be applied independently of dataflow information. But the comment and code predate LRA and maybe no-one fancied poking around in reload (hard to believe). I'd be very surprised if LRA gets this wrong. Thanks, Richard