[PATCH v2] aarch64: Add cpu cost tables for A64FX

[PATCH v2] aarch64: Add cpu cost tables for A64FX

[Qian Jianhua]

This patch add cost tables for A64FX.

ChangeLog:
2021-01-08 Qian jianhua <qianjh@cn.fujitsu.com>

gcc/
	* config/aarch64/aarch64-cost-tables.h (a64fx_extra_costs): New.
	* config/aarch64/aarch64.c (a64fx_addrcost_table): New.
	(a64fx_regmove_cost, a64fx_vector_cost): New.
	(a64fx_tunings): Use the new added cost tables.

Test Results:
* Bootstrap on aarch64 ------------------------------- [OK]
* Regression tests ----------------------------------- [OK]
* Compile with -mcpu=a64fx --------------------------- [OK]

Regards!
---
 gcc/config/aarch64/aarch64-cost-tables.h | 103 +++++++++++++++++++++++
 gcc/config/aarch64/aarch64.c             |  72 +++++++++++++++-
 2 files changed, 171 insertions(+), 4 deletions(-)

diff --git a/gcc/config/aarch64/aarch64-cost-tables.h b/gcc/config/aarch64/aarch64-cost-tables.h
index 8a98bf4278c..c6805717f6e 100644
--- a/gcc/config/aarch64/aarch64-cost-tables.h
+++ b/gcc/config/aarch64/aarch64-cost-tables.h
@@ -541,4 +541,107 @@ const struct cpu_cost_table tsv110_extra_costs =
   }
 };
 
+const struct cpu_cost_table a64fx_extra_costs =
+{
+  /* ALU */
+  {
+    0,                 /* arith.  */
+    0,                 /* logical.  */
+    0,                 /* shift.  */
+    0,                 /* shift_reg.  */
+    COSTS_N_INSNS (1), /* arith_shift.  */
+    COSTS_N_INSNS (1), /* arith_shift_reg.  */
+    COSTS_N_INSNS (1), /* log_shift.  */
+    COSTS_N_INSNS (1), /* log_shift_reg.  */
+    0,                 /* extend.  */
+    COSTS_N_INSNS (1), /* extend_arith.  */
+    0,                 /* bfi.  */
+    0,                 /* bfx.  */
+    0,                 /* clz.  */
+    0,                 /* rev.  */
+    0,                 /* non_exec.  */
+    true               /* non_exec_costs_exec.  */
+  },
+  {
+    /* MULT SImode */
+    {
+      COSTS_N_INSNS (4),       /* simple.  */
+      COSTS_N_INSNS (4),       /* flag_setting.  */
+      COSTS_N_INSNS (4),       /* extend.  */
+      COSTS_N_INSNS (5),       /* add.  */
+      COSTS_N_INSNS (5),       /* extend_add.  */
+      COSTS_N_INSNS (18)       /* idiv.  */
+    },
+    /* MULT DImode */
+    {
+      COSTS_N_INSNS (4),       /* simple.  */
+      0,                       /* flag_setting (N/A).  */
+      COSTS_N_INSNS (4),       /* extend.  */
+      COSTS_N_INSNS (5),       /* add.  */
+      COSTS_N_INSNS (5),       /* extend_add.  */
+      COSTS_N_INSNS (26)       /* idiv.  */
+    }
+  },
+  /* LD/ST */
+  {
+    COSTS_N_INSNS (4),         /* load.  */
+    COSTS_N_INSNS (4),         /* load_sign_extend.  */
+    COSTS_N_INSNS (5),         /* ldrd.  */
+    COSTS_N_INSNS (4),         /* ldm_1st.  */
+    1,                         /* ldm_regs_per_insn_1st.  */
+    2,                         /* ldm_regs_per_insn_subsequent.  */
+    COSTS_N_INSNS (4),         /* loadf.  */
+    COSTS_N_INSNS (4),         /* loadd.  */
+    COSTS_N_INSNS (5),         /* load_unaligned.  */
+    0,                         /* store.  */
+    0,                         /* strd.  */
+    0,                         /* stm_1st.  */
+    1,                         /* stm_regs_per_insn_1st.  */
+    2,                         /* stm_regs_per_insn_subsequent.  */
+    0,                         /* storef.  */
+    0,                         /* stored.  */
+    0,                         /* store_unaligned.  */
+    COSTS_N_INSNS (1),         /* loadv.  */
+    COSTS_N_INSNS (1)          /* storev.  */
+  },
+  {
+    /* FP SFmode */
+    {
+      COSTS_N_INSNS (6),      /* div.  */
+      COSTS_N_INSNS (1),       /* mult.  */
+      COSTS_N_INSNS (1),       /* mult_addsub.  */
+      COSTS_N_INSNS (2),       /* fma.  */
+      COSTS_N_INSNS (1),       /* addsub.  */
+      COSTS_N_INSNS (1),       /* fpconst.  */
+      COSTS_N_INSNS (1),       /* neg.  */
+      COSTS_N_INSNS (1),       /* compare.  */
+      COSTS_N_INSNS (2),       /* widen.  */
+      COSTS_N_INSNS (2),       /* narrow.  */
+      COSTS_N_INSNS (2),       /* toint.  */
+      COSTS_N_INSNS (2),       /* fromint.  */
+      COSTS_N_INSNS (2)        /* roundint.  */
+    },
+    /* FP DFmode */
+    {
+      COSTS_N_INSNS (11),      /* div.  */
+      COSTS_N_INSNS (1),       /* mult.  */
+      COSTS_N_INSNS (1),       /* mult_addsub.  */
+      COSTS_N_INSNS (2),       /* fma.  */
+      COSTS_N_INSNS (1),       /* addsub.  */
+      COSTS_N_INSNS (1),       /* fpconst.  */
+      COSTS_N_INSNS (1),       /* neg.  */
+      COSTS_N_INSNS (1),       /* compare.  */
+      COSTS_N_INSNS (2),       /* widen.  */
+      COSTS_N_INSNS (2),       /* narrow.  */
+      COSTS_N_INSNS (2),       /* toint.  */
+      COSTS_N_INSNS (2),       /* fromint.  */
+      COSTS_N_INSNS (2)        /* roundint.  */
+    }
+  },
+  /* Vector */
+  {
+    COSTS_N_INSNS (1)  /* alu.  */
+  }
+};
+
 #endif
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 70ddd70556f..0bab5a3f3b8 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -464,6 +464,22 @@ static const struct cpu_addrcost_table qdf24xx_addrcost_table =
   2, /* imm_offset  */
 };
 
+static const struct cpu_addrcost_table a64fx_addrcost_table =
+{
+    {
+      1, /* hi  */
+      1, /* si  */
+      1, /* di  */
+      2, /* ti  */
+    },
+  0, /* pre_modify  */
+  0, /* post_modify  */
+  2, /* register_offset  */
+  3, /* register_sextend  */
+  3, /* register_zextend  */
+  0, /* imm_offset  */
+};
+
 static const struct cpu_regmove_cost generic_regmove_cost =
 {
   1, /* GP2GP  */
@@ -559,6 +575,16 @@ static const struct cpu_regmove_cost tsv110_regmove_cost =
   2  /* FP2FP  */
 };
 
+static const struct cpu_regmove_cost a64fx_regmove_cost =
+{
+  1, /* GP2GP  */
+  /* Avoid the use of slow int<->fp moves for spilling by setting
+     their cost higher than memmov_cost.  */
+  5, /* GP2FP  */
+  7, /* FP2GP  */
+  2 /* FP2FP  */
+};
+
 /* Generic costs for Advanced SIMD vector operations.   */
 static const advsimd_vec_cost generic_advsimd_vector_cost =
 {
@@ -600,6 +626,44 @@ static const struct cpu_vector_cost generic_vector_cost =
   &generic_sve_vector_cost /* sve */
 };
 
+static const advsimd_vec_cost a64fx_advsimd_vector_cost =
+{
+  2, /* int_stmt_cost  */
+  5, /* fp_stmt_cost  */
+  3, /* permute_cost  */
+  13, /* vec_to_scalar_cost  */
+  4, /* scalar_to_vec_cost  */
+  6, /* align_load_cost  */
+  6, /* unalign_load_cost  */
+  1, /* unalign_store_cost  */
+  1  /* store_cost  */
+};
+
+static const sve_vec_cost a64fx_sve_vector_cost =
+{
+  2, /* int_stmt_cost  */
+  5, /* fp_stmt_cost  */
+  3, /* permute_cost  */
+  13, /* vec_to_scalar_cost  */
+  4, /* scalar_to_vec_cost  */
+  6, /* align_load_cost  */
+  6, /* unalign_load_cost  */
+  1, /* unalign_store_cost  */
+  1  /* store_cost  */
+};
+
+static const struct cpu_vector_cost a64fx_vector_cost =
+{
+  1, /* scalar_int_stmt_cost  */
+  5, /* scalar_fp_stmt_cost  */
+  4, /* scalar_load_cost  */
+  1, /* scalar_store_cost  */
+  3, /* cond_taken_branch_cost  */
+  1, /* cond_not_taken_branch_cost  */
+  &a64fx_advsimd_vector_cost, /* advsimd  */
+  &a64fx_sve_vector_cost /* sve  */
+};
+
 static const advsimd_vec_cost qdf24xx_advsimd_vector_cost =
 {
   1, /* int_stmt_cost  */
@@ -1460,10 +1524,10 @@ static const struct tune_params neoversen2_tunings =
 
 static const struct tune_params a64fx_tunings =
 {
-  &generic_extra_costs,
-  &generic_addrcost_table,
-  &generic_regmove_cost,
-  &generic_vector_cost,
+  &a64fx_extra_costs,
+  &a64fx_addrcost_table,
+  &a64fx_regmove_cost,
+  &a64fx_vector_cost,
   &generic_branch_cost,
   &generic_approx_modes,
   SVE_512, /* sve_width  */
-- 
2.17.1

Re: [PATCH v2] aarch64: Add cpu cost tables for A64FX

[Richard Sandiford]

Qian Jianhua <qianjh@cn.fujitsu.com> writes:
> This patch add cost tables for A64FX.
>
> ChangeLog:
> 2021-01-08 Qian jianhua <qianjh@cn.fujitsu.com>
>
> gcc/
> 	* config/aarch64/aarch64-cost-tables.h (a64fx_extra_costs): New.
> 	* config/aarch64/aarch64.c (a64fx_addrcost_table): New.
> 	(a64fx_regmove_cost, a64fx_vector_cost): New.
> 	(a64fx_tunings): Use the new added cost tables.

OK for trunk, thanks.  The v1 patch is OK for branches that support
-mcpu=a64fx.

Would you like commit access, so that you can commit it yourself?
If so, please fill out the form mentioned at the beginning of
https://gcc.gnu.org/gitwrite.html listing me as sponsor.

Alternatively, if you'd rather not for any reason, I'm happy to apply
it for you.

Thanks,
Richard

RE: [PATCH v2] aarch64: Add cpu cost tables for A64FX

[Qian, Jianhua]

Hi Richard

> -----Original Message-----
> From: Richard Sandiford <richard.sandiford@arm.com>
> Sent: Friday, January 8, 2021 7:04 PM
> To: Qian, Jianhua/钱 建华 <qianjh@cn.fujitsu.com>
> Cc: gcc-patches@gcc.gnu.org
> Subject: Re: [PATCH v2] aarch64: Add cpu cost tables for A64FX
> 
> Qian Jianhua <qianjh@cn.fujitsu.com> writes:
> > This patch add cost tables for A64FX.
> >
> > ChangeLog:
> > 2021-01-08 Qian jianhua <qianjh@cn.fujitsu.com>
> >
> > gcc/
> > 	* config/aarch64/aarch64-cost-tables.h (a64fx_extra_costs): New.
> > 	* config/aarch64/aarch64.c (a64fx_addrcost_table): New.
> > 	(a64fx_regmove_cost, a64fx_vector_cost): New.
> > 	(a64fx_tunings): Use the new added cost tables.
> 
> OK for trunk, thanks.  The v1 patch is OK for branches that support
> -mcpu=a64fx.
> 
> Would you like commit access, so that you can commit it yourself?
> If so, please fill out the form mentioned at the beginning of
> https://gcc.gnu.org/gitwrite.html listing me as sponsor.
> 
It‘s my pleasure. I've applied it.
Thank you so much.

I don't quite know the process of gcc source committing.
If I have the commit access, how will process be different?
And which branch, which range(aarch64?) could I commit patches to?

Regards,
Qian

> Alternatively, if you'd rather not for any reason, I'm happy to apply it for you.
> 
> Thanks,
> Richard
> 

Re: [PATCH v2] aarch64: Add cpu cost tables for A64FX

[Richard Sandiford]

"Qian, Jianhua" <qianjh@cn.fujitsu.com> writes:
> Hi Richard
>
>> -----Original Message-----
>> From: Richard Sandiford <richard.sandiford@arm.com>
>> Sent: Friday, January 8, 2021 7:04 PM
>> To: Qian, Jianhua/钱 建华 <qianjh@cn.fujitsu.com>
>> Cc: gcc-patches@gcc.gnu.org
>> Subject: Re: [PATCH v2] aarch64: Add cpu cost tables for A64FX
>> 
>> Qian Jianhua <qianjh@cn.fujitsu.com> writes:
>> > This patch add cost tables for A64FX.
>> >
>> > ChangeLog:
>> > 2021-01-08 Qian jianhua <qianjh@cn.fujitsu.com>
>> >
>> > gcc/
>> > 	* config/aarch64/aarch64-cost-tables.h (a64fx_extra_costs): New.
>> > 	* config/aarch64/aarch64.c (a64fx_addrcost_table): New.
>> > 	(a64fx_regmove_cost, a64fx_vector_cost): New.
>> > 	(a64fx_tunings): Use the new added cost tables.
>> 
>> OK for trunk, thanks.  The v1 patch is OK for branches that support
>> -mcpu=a64fx.
>> 
>> Would you like commit access, so that you can commit it yourself?
>> If so, please fill out the form mentioned at the beginning of
>> https://gcc.gnu.org/gitwrite.html listing me as sponsor.
>> 
> It‘s my pleasure. I've applied it.

Great!

> Thank you so much.
>
> I don't quite know the process of gcc source committing.
> If I have the commit access, how will process be different?

The patch submission process is pretty much the same: patches need
to be sent to the list and most patches need to be approved by a
reviewer or maintainer.  The main differences are:

- If a patch is “obviously correct”, you can apply it without going
  through the approval process.  (Please still send the patch to the
  list though.)

- Once a patch has been approved, you can commit the patch yourself,
  rather than rely on someone else to do it for you.  The main benefits
  of this are:

  - You can commit from the tree that you actually tested.

  - You can deal with any merge conflicts caused by other people's
    patches without having to go through another review cycle.  (Most
    merge conflict resolutions are “obvious” and so don't need approval.)

  - A typical workflow is to test a patch on trunk, post it for review,
    and ask for approval to apply the patch to both trunk and whichever
    branches are appropriate.  If the patch is approved, you can later
    test the patch on the approved branches (at your own pace) and
    apply it if the tests pass.

In terms of the mechanics of committing, just “git push” should work.
The server hooks will check for things like a well-formed changelog.

https://gcc.gnu.org/gitwrite.html has more info about the process
in general.  Quoting from that page, the next step is:

  Check out a tree using the instructions below and add yourself to the
  MAINTAINERS file. Note: Your first and last names must be exactly the
  same between your account on gcc.gnu.org and the MAINTAINERS file.
  Place your name in the correct section following the conventions
  specified in the file (e.g. "Write After Approval" is "last name
  alphabetical order").

  Then produce a diff to that file and circulate it to the gcc-patches
  list, whilst also checking in your change to test write access
  (approval from the mailing list is not needed in this one case). For
  all other changes, please be sure to follow the write access policies
  below.

> And which branch, which range(aarch64?) could I commit patches to?

This patch should go to master.  The v1 patch should go to
releases/gcc-10 and releases/gcc-9.

You might need to remove some lines from the cost tables when
backporting to gcc-10 and gcc-9 (I haven't checked).  If so, that kind
of change counts as “obviously correct” and so doesn't need approval.

Hope this helps.  Please let me know if you have any questions.

Thanks,
Richard

RE: [PATCH v2] aarch64: Add cpu cost tables for A64FX

[Qian, Jianhua]

Hi Richard

> >> > ChangeLog:
> >> > 2021-01-08 Qian jianhua <qianjh@cn.fujitsu.com>
> >> >
> >> > gcc/
> >> > 	* config/aarch64/aarch64-cost-tables.h (a64fx_extra_costs): New.
> >> > 	* config/aarch64/aarch64.c (a64fx_addrcost_table): New.
> >> > 	(a64fx_regmove_cost, a64fx_vector_cost): New.
> >> > 	(a64fx_tunings): Use the new added cost tables.
> >>
> >> OK for trunk, thanks.  The v1 patch is OK for branches that support
> >> -mcpu=a64fx.
> >>
> >> Would you like commit access, so that you can commit it yourself?
> >> If so, please fill out the form mentioned at the beginning of
> >> https://gcc.gnu.org/gitwrite.html listing me as sponsor.
> >>
> > It‘s my pleasure. I've applied it.
> 
> Great!
> 
> > Thank you so much.
> >
> > I don't quite know the process of gcc source committing.
> > If I have the commit access, how will process be different?
> 
> The patch submission process is pretty much the same: patches need to be
> sent to the list and most patches need to be approved by a reviewer or
> maintainer.  The main differences are:
> 
> - If a patch is “obviously correct”, you can apply it without going
>   through the approval process.  (Please still send the patch to the
>   list though.)
> 
> - Once a patch has been approved, you can commit the patch yourself,
>   rather than rely on someone else to do it for you.  The main benefits
>   of this are:
> 
>   - You can commit from the tree that you actually tested.
> 
>   - You can deal with any merge conflicts caused by other people's
>     patches without having to go through another review cycle.  (Most
>     merge conflict resolutions are “obvious” and so don't need approval.)
> 
>   - A typical workflow is to test a patch on trunk, post it for review,
>     and ask for approval to apply the patch to both trunk and whichever
>     branches are appropriate.  If the patch is approved, you can later
>     test the patch on the approved branches (at your own pace) and
>     apply it if the tests pass.
> 
> In terms of the mechanics of committing, just “git push” should work.
> The server hooks will check for things like a well-formed changelog.
> 

Thanks for detailed information. I understood.

> https://gcc.gnu.org/gitwrite.html has more info about the process in general.
> Quoting from that page, the next step is:
> 
>   Check out a tree using the instructions below and add yourself to the
>   MAINTAINERS file. Note: Your first and last names must be exactly the
>   same between your account on gcc.gnu.org and the MAINTAINERS file.
>   Place your name in the correct section following the conventions
>   specified in the file (e.g. "Write After Approval" is "last name
>   alphabetical order").
> 

I've already added myself to MAINTAINERS file.

>   Then produce a diff to that file and circulate it to the gcc-patches
>   list, whilst also checking in your change to test write access
>   (approval from the mailing list is not needed in this one case). For
>   all other changes, please be sure to follow the write access policies
>   below.
> 
> > And which branch, which range(aarch64?) could I commit patches to?
> 
> This patch should go to master.  The v1 patch should go to
> releases/gcc-10 and releases/gcc-9.
> 
> You might need to remove some lines from the cost tables when backporting to
> gcc-10 and gcc-9 (I haven't checked).  If so, that kind of change counts as
> “obviously correct” and so doesn't need approval.
> 

I will commit this patch to master tomorrow.
Then make some changes, and push to gcc-10 and gcc-9. 

> Hope this helps.  Please let me know if you have any questions.
> 

Thanks again.

Regards,
Qian

> Thanks,
> Richard
>