From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id BFEF63857354 for ; Mon, 22 May 2023 08:48:58 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org BFEF63857354 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8699211FB; Mon, 22 May 2023 01:49:43 -0700 (PDT) Received: from localhost (e121540-lin.manchester.arm.com [10.32.110.72]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 191053F6C4; Mon, 22 May 2023 01:48:57 -0700 (PDT) From: Richard Sandiford To: Prathamesh Kulkarni Mail-Followup-To: Prathamesh Kulkarni ,gcc Patches , richard.sandiford@arm.com Cc: gcc Patches Subject: Re: [aarch64] Code-gen for vector initialization involving constants References: Date: Mon, 22 May 2023 09:48:56 +0100 In-Reply-To: (Prathamesh Kulkarni's message of "Fri, 19 May 2023 16:26:09 +0530") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-Spam-Status: No, score=-28.9 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_NONE,KAM_DMARC_STATUS,KAM_LAZY_DOMAIN_SECURITY,SPF_HELO_NONE,SPF_NONE,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Prathamesh Kulkarni writes: > Hi Richard, > Thanks for the suggestions. Does the attached patch look OK ? > Boostrap+test in progress on aarch64-linux-gnu. Like I say, please wait for the tests to complete before sending an RFA. It saves a review cycle if the tests don't in fact pass. > diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc > index 29dbacfa917..e611a7cca25 100644 > --- a/gcc/config/aarch64/aarch64.cc > +++ b/gcc/config/aarch64/aarch64.cc > @@ -22332,6 +22332,43 @@ aarch64_unzip_vector_init (machine_mode mode, rtx vals, bool even_p) > return gen_rtx_PARALLEL (new_mode, vec); > } > > +/* Return true if INSN is a scalar move. */ > + > +static bool > +scalar_move_insn_p (const rtx_insn *insn) > +{ > + rtx set = single_set (insn); > + if (!set) > + return false; > + rtx src = SET_SRC (set); > + rtx dest = SET_DEST (set); > + return is_a(GET_MODE (dest)) > + && aarch64_mov_operand_p (src, GET_MODE (src)); Formatting: return (is_a(GET_MODE (dest)) && aarch64_mov_operand_p (src, GET_MODE (src))); OK with that change if the tests pass, thanks. Richard