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From: Richard Sandiford <richard.sandiford@arm.com>
To: Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
Mail-Followup-To: Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>,
 gcc Patches <gcc-patches@gcc.gnu.org>, richard.sandiford@arm.com
Cc: gcc Patches <gcc-patches@gcc.gnu.org>
Subject: Re: [1/9] AArch64 changes to adjust vec_perm_const hook
References: <CAAgBjMkGcW=irsDFm+k1+rzFNCDP1DBcF64S5tYHyozgN+RpaQ@mail.gmail.com>
Date: Wed, 18 May 2022 12:59:36 +0100
In-Reply-To: <CAAgBjMkGcW=irsDFm+k1+rzFNCDP1DBcF64S5tYHyozgN+RpaQ@mail.gmail.com>
 (Prathamesh Kulkarni's message of "Wed, 18 May 2022 12:37:21 +0530")
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Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> writes:
> Hi,
> The attached patch adjusts vec_perm_const hook to accommodate the new parameter.
> For now, it bails out if vmode != op_mode, in follow-up patch to
> PR96463, I will add dup
> as exception.
> Bootstrapped+tested on aarch64-linux-gnu.
> Does it look OK ?

OK, thanks.

> Thanks,
> Prathamesh
>
> diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
> index f4d2a800f39..e6a24a0f9e1 100644
> --- a/gcc/config/aarch64/aarch64.cc
> +++ b/gcc/config/aarch64/aarch64.cc
> @@ -24145,9 +24145,13 @@ aarch64_expand_vec_perm_const_1 (struct expand_vec_perm_d *d)
>  /* Implement TARGET_VECTORIZE_VEC_PERM_CONST.  */
>  
>  static bool
> -aarch64_vectorize_vec_perm_const (machine_mode vmode, rtx target, rtx op0,
> -				  rtx op1, const vec_perm_indices &sel)
> +aarch64_vectorize_vec_perm_const (machine_mode vmode, machine_mode op_mode,
> +				  rtx target, rtx op0, rtx op1,
> +				  const vec_perm_indices &sel)
>  {
> +  if (vmode != op_mode)
> +    return false;
> +
>    struct expand_vec_perm_d d;
>  
>    /* Check whether the mask can be applied to a single vector.  */