From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 115397 invoked by alias); 10 Jul 2019 10:07:00 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 115377 invoked by uid 89); 10 Jul 2019 10:06:58 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-10.0 required=5.0 tests=AWL,BAYES_00,GIT_PATCH_1,GIT_PATCH_2,GIT_PATCH_3,KAM_ASCII_DIVIDERS,KAM_NUMSUBJECT autolearn=ham version=3.3.1 spammy=neighboring, HX-Languages-Length:4875 X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.110.172) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 10 Jul 2019 10:06:57 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 433BA344; Wed, 10 Jul 2019 03:06:55 -0700 (PDT) Received: from localhost (e121540-lin.manchester.arm.com [10.32.98.39]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A4AB23F246; Wed, 10 Jul 2019 03:06:54 -0700 (PDT) From: Richard Sandiford To: Christophe Lyon Mail-Followup-To: Christophe Lyon ,gcc Patches , kyrylo.tkachov@arm.com, richard.sandiford@arm.com Cc: gcc Patches , kyrylo.tkachov@arm.com Subject: Re: [PATCH][armeb] PR 91060 gcc.c-torture/execute/scal-to-vec1.c fails since r272843 References: Date: Wed, 10 Jul 2019 10:20:00 -0000 In-Reply-To: (Christophe Lyon's message of "Mon, 8 Jul 2019 11:09:58 +0200") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.1 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-SW-Source: 2019-07/txt/msg00783.txt.bz2 Christophe Lyon writes: > On Mon, 8 Jul 2019 at 11:04, Richard Sandiford > wrote: >> >> Christophe Lyon writes: >> > Hi, >> > >> > This patch fixes PR 91060 where the lane ordering was no longer the >> > right one (GCC's vs architecture's). >> >> Sorry, we clashed :-) >> >> I'd prefer to go with the version I attached to bugzilla just now. > > Yes just saw that, thanks! The bugzilla version didn't properly adjust vec_setv2di_internal. Fixed with the version below, tested on armeb-eabi. Besides gcc.c-torture/execute/scal-to-vec*.c, the patch also fixes: c-c++-common/torture/vector-compare-1.c gcc.target/arm/pr69614.c g++.dg/ext/vector37.C OK for trunk? Richard 2019-07-10 Richard Sandiford gcc/ PR target/91060 * config/arm/iterators.md (V2DI_ONLY): New mode iterator. * config/arm/neon.md (vec_set_internal): Add a '@' prefix. (vec_setv2di_internal): Reexpress as... (@vec_set_internal): ...this. * config/arm/arm.c (neon_expand_vector_init): Use gen_vec_set_internal rather than gen_neon_vset_lane. Index: gcc/config/arm/iterators.md =================================================================== --- gcc/config/arm/iterators.md 2019-06-18 09:35:55.377865698 +0100 +++ gcc/config/arm/iterators.md 2019-07-10 11:01:57.990749932 +0100 @@ -186,6 +186,9 @@ (define_mode_iterator VX [V8QI V4HI V16Q ;; Modes with 8-bit elements. (define_mode_iterator VE [V8QI V16QI]) +;; V2DI only (for use with @ patterns). +(define_mode_iterator V2DI_ONLY [V2DI]) + ;; Modes with 64-bit elements only. (define_mode_iterator V64 [DI V2DI]) Index: gcc/config/arm/neon.md =================================================================== --- gcc/config/arm/neon.md 2019-07-01 09:37:07.220524486 +0100 +++ gcc/config/arm/neon.md 2019-07-10 11:01:57.990749932 +0100 @@ -319,7 +319,7 @@ (define_insn "*movmisalign_neon_lo "vld1.\t{%q0}, %A1" [(set_attr "type" "neon_load1_1reg")]) -(define_insn "vec_set_internal" +(define_insn "@vec_set_internal" [(set (match_operand:VD_LANE 0 "s_register_operand" "=w,w") (vec_merge:VD_LANE (vec_duplicate:VD_LANE @@ -340,7 +340,7 @@ (define_insn "vec_set_internal" } [(set_attr "type" "neon_load1_all_lanes,neon_from_gp")]) -(define_insn "vec_set_internal" +(define_insn "@vec_set_internal" [(set (match_operand:VQ2 0 "s_register_operand" "=w,w") (vec_merge:VQ2 (vec_duplicate:VQ2 @@ -369,12 +369,12 @@ (define_insn "vec_set_internal" [(set_attr "type" "neon_load1_all_lanes,neon_from_gp")] ) -(define_insn "vec_setv2di_internal" - [(set (match_operand:V2DI 0 "s_register_operand" "=w,w") - (vec_merge:V2DI - (vec_duplicate:V2DI +(define_insn "@vec_set_internal" + [(set (match_operand:V2DI_ONLY 0 "s_register_operand" "=w,w") + (vec_merge:V2DI_ONLY + (vec_duplicate:V2DI_ONLY (match_operand:DI 1 "nonimmediate_operand" "Um,r")) - (match_operand:V2DI 3 "s_register_operand" "0,0") + (match_operand:V2DI_ONLY 3 "s_register_operand" "0,0") (match_operand:SI 2 "immediate_operand" "i,i")))] "TARGET_NEON" { Index: gcc/config/arm/arm.c =================================================================== --- gcc/config/arm/arm.c 2019-07-01 09:37:07.220524486 +0100 +++ gcc/config/arm/arm.c 2019-07-10 11:01:57.990749932 +0100 @@ -12471,7 +12471,7 @@ neon_expand_vector_init (rtx target, rtx if (n_var == 1) { rtx copy = copy_rtx (vals); - rtx index = GEN_INT (one_var); + rtx merge_mask = GEN_INT (1 << one_var); /* Load constant part of vector, substitute neighboring value for varying element. */ @@ -12480,38 +12480,7 @@ neon_expand_vector_init (rtx target, rtx /* Insert variable. */ x = copy_to_mode_reg (inner_mode, XVECEXP (vals, 0, one_var)); - switch (mode) - { - case E_V8QImode: - emit_insn (gen_neon_vset_lanev8qi (target, x, target, index)); - break; - case E_V16QImode: - emit_insn (gen_neon_vset_lanev16qi (target, x, target, index)); - break; - case E_V4HImode: - emit_insn (gen_neon_vset_lanev4hi (target, x, target, index)); - break; - case E_V8HImode: - emit_insn (gen_neon_vset_lanev8hi (target, x, target, index)); - break; - case E_V2SImode: - emit_insn (gen_neon_vset_lanev2si (target, x, target, index)); - break; - case E_V4SImode: - emit_insn (gen_neon_vset_lanev4si (target, x, target, index)); - break; - case E_V2SFmode: - emit_insn (gen_neon_vset_lanev2sf (target, x, target, index)); - break; - case E_V4SFmode: - emit_insn (gen_neon_vset_lanev4sf (target, x, target, index)); - break; - case E_V2DImode: - emit_insn (gen_neon_vset_lanev2di (target, x, target, index)); - break; - default: - gcc_unreachable (); - } + emit_insn (gen_vec_set_internal (mode, target, x, merge_mask, target)); return; }