From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id CA4D63858D1E for ; Mon, 26 Jun 2023 20:54:59 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org CA4D63858D1E Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 95F3F2F4; Mon, 26 Jun 2023 13:55:43 -0700 (PDT) Received: from localhost (e121540-lin.manchester.arm.com [10.32.110.72]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B4D8C3F64C; Mon, 26 Jun 2023 13:54:58 -0700 (PDT) From: Richard Sandiford To: Oluwatamilore Adebayo Mail-Followup-To: Oluwatamilore Adebayo ,, , richard.sandiford@arm.com Cc: , Subject: Re: [PATCH 2/2] AArch64: New RTL for ABDL References: <20230626153454.42824-1-oluwatamilore.adebayo@arm.com> Date: Mon, 26 Jun 2023 21:54:57 +0100 In-Reply-To: <20230626153454.42824-1-oluwatamilore.adebayo@arm.com> (Oluwatamilore Adebayo's message of "Mon, 26 Jun 2023 16:34:54 +0100") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-27.2 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_NONE,KAM_DMARC_STATUS,KAM_LAZY_DOMAIN_SECURITY,KAM_LOTSOFHASH,KAM_SHORT,SPF_HELO_NONE,SPF_NONE,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Oluwatamilore Adebayo writes: > From: oluade01 > > This patch adds new RTL for ABDL (sabdl, sabdl2, uabdl, uabdl2). > > gcc/ChangeLog: > > * config/aarch64/aarch64-simd.md > (vec_widen_abdl_lo_, vec_widen_abdl_hi_): > Expansions for abd vec widen optabs. > (aarch64_abdl_insn): VQW based abdl RTL. > * config/aarch64/iterators.md (USMAX_EXT): Code attributes > that give the appropriate extend RTL for the max RTL. > > gcc/testsuite/ChangeLog: > > * gcc.target/aarch64/abd_2.c: Added ABDL testcases. > * gcc.target/aarch64/abd_3.c: Added ABDL testcases. > * gcc.target/aarch64/abd_4.c: Added ABDL testcases. > * gcc.target/aarch64/abd_none_2.c: Added ABDL testcases. > * gcc.target/aarch64/abd_none_3.c: Added ABDL testcases. > * gcc.target/aarch64/abd_none_4.c: Added ABDL testcases. > * gcc.target/aarch64/abd_run_1.c: Added ABDL testcases. > * gcc.target/aarch64/sve/abd_1.c: Added ABDL testcases. > * gcc.target/aarch64/sve/abd_2.c: Added ABDL testcases. > * gcc.target/aarch64/sve/abd_none_1.c: Added ABDL testcases. > * gcc.target/aarch64/sve/abd_none_2.c: Added ABDL testcases. > --- > gcc/config/aarch64/aarch64-simd.md | 70 ++++++++++++++++ > gcc/config/aarch64/iterators.md | 3 + > gcc/testsuite/gcc.target/aarch64/abd_2.c | 62 ++++++++++++-- > gcc/testsuite/gcc.target/aarch64/abd_3.c | 63 ++++++++++++-- > gcc/testsuite/gcc.target/aarch64/abd_4.c | 47 +++++++++-- > gcc/testsuite/gcc.target/aarch64/abd_none_2.c | 73 ++++++++++++++++ > gcc/testsuite/gcc.target/aarch64/abd_none_3.c | 73 ++++++++++++++++ > gcc/testsuite/gcc.target/aarch64/abd_none_4.c | 84 +++++++++++++++++++ > gcc/testsuite/gcc.target/aarch64/abd_run_1.c | 29 +++++++ > gcc/testsuite/gcc.target/aarch64/sve/abd_1.c | 67 +++++++++++++-- > gcc/testsuite/gcc.target/aarch64/sve/abd_2.c | 53 ++++++++++-- > .../gcc.target/aarch64/sve/abd_none_1.c | 73 ++++++++++++++++ > .../gcc.target/aarch64/sve/abd_none_2.c | 80 ++++++++++++++++++ > 13 files changed, 749 insertions(+), 28 deletions(-) > > diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarc= h64-simd.md > index bf90202ba2ad3f62f2020486d21256f083effb07..36fefd0a96801479fbf6469a3= fbcef4a0b8cad6f 100644 > --- a/gcc/config/aarch64/aarch64-simd.md > +++ b/gcc/config/aarch64/aarch64-simd.md > @@ -975,6 +975,76 @@ (define_expand "aarch64_abdl2" > } > ) >=20=20 > +(define_insn "aarch64_abdl_hi_internal" > + [(set (match_operand: 0 "register_operand" "=3Dw") > + (minus: > + (USMAX: > + (: > + (vec_select: > + (match_operand:VQW 1 "register_operand" "w") > + (match_operand:VQW 3 "vect_par_cnst_hi_half" ""))) > + (: > + (vec_select: > + (match_operand:VQW 2 "register_operand" "w") > + (match_dup 3)))) > + (: > + (: > + (vec_select: (match_dup 1) (match_dup 3))) > + (: > + (vec_select: (match_dup 2) (match_dup 3))))))] > + "TARGET_SIMD" > + "abdl2\t%0., %1., %2." > + [(set_attr "type" "neon_abd_long")] > +) We don't need the (minus (max=E2=80=A6) (min=E2=80=A6)) thing when widening= is involved. It should be enough to do something like: (abs: (minus: (ANY_EXTEND: (vec_select:=E2=80=A6)) (ANY_EXTEND: (vec_select:=E2=80=A6)))) > + > +(define_insn "aarch64_abdl_lo_internal" > + [(set (match_operand: 0 "register_operand" "=3Dw") > + (minus: > + (USMAX: > + (: (vec_select: > + (match_operand:VQW 1 "register_operand" "w") > + (match_operand:VQW 3 "vect_par_cnst_lo_half" ""))) > + (: (vec_select: > + (match_operand:VQW 2 "register_operand" "w") > + (match_dup 3)))) > + (: > + (: (vec_select: > + (match_dup 1) > + (match_dup 3))) > + (: (vec_select: > + (match_dup 2) > + (match_dup 3))))))] > + "TARGET_SIMD" > + "abdl\t%0., %1., %2." > + [(set_attr "type" "neon_abd_long")] > +) > + > +(define_expand "vec_widen_abd_hi_" > + [(match_operand: 0 "register_operand") > + (ANY_EXTEND: (match_operand:VQW 1 "register_operand")) > + (ANY_EXTEND: (match_operand:VQW 2 "register_operand"))] > + "TARGET_SIMD" > + { > + rtx p =3D aarch64_simd_vect_par_cnst_half (mode, , tru= e); > + emit_insn (gen_aarch64_abdl_hi_internal (operands[0], oper= ands[1], > + operands[2], p)); > + DONE; > + } > +) > + > +(define_expand "vec_widen_abd_lo_" > + [(match_operand: 0 "register_operand") > + (ANY_EXTEND: (match_operand:VQW 1 "register_operand")) > + (ANY_EXTEND: (match_operand:VQW 2 "register_operand"))] > + "TARGET_SIMD" > + { > + rtx p =3D aarch64_simd_vect_par_cnst_half (mode, , fal= se); > + emit_insn (gen_aarch64_abdl_lo_internal (operands[0], oper= ands[1], > + operands[2], p)); > + DONE; > + } > +) > + > (define_insn "aarch64_abal" > [(set (match_operand: 0 "register_operand" "=3Dw") > (plus: > diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterato= rs.md > index d9c7354730ac5870c0042f1e30fb1140a117d110..1385842d0a51b3f4a0871af4d= 0bbbeeeee5299d4 100644 > --- a/gcc/config/aarch64/iterators.md > +++ b/gcc/config/aarch64/iterators.md > @@ -1984,6 +1984,9 @@ (define_code_attr max_opp [(smax "smin") (umax "umi= n")]) > ;; Same as above, but louder. > (define_code_attr MAX_OPP [(smax "SMIN") (umax "UMIN")]) >=20=20 > +;; Map smax and umax to sign_extend and zero_extend > +(define_code_attr USMAX_EXT [(smax "sign_extend") (umax "zero_extend")]) > + > ;; The number of subvectors in an SVE_STRUCT. > (define_mode_attr vector_count [(VNx32QI "2") (VNx16HI "2") > (VNx8SI "2") (VNx4DI "2") > diff --git a/gcc/testsuite/gcc.target/aarch64/abd_2.c b/gcc/testsuite/gcc= .target/aarch64/abd_2.c > index c0d41fb7ef99baf95b0f6a2e68a88f6748482af3..b86a3923fa8c6c20da52098bf= b8ab8e230c894e5 100644 > --- a/gcc/testsuite/gcc.target/aarch64/abd_2.c > +++ b/gcc/testsuite/gcc.target/aarch64/abd_2.c > @@ -13,23 +13,75 @@ TEST1(signed, char) >=20=20 > TEST2(signed, char, short) > TEST2(signed, char, int) > +TEST2(signed, char, long) > TEST2(signed, short, int) > +TEST2(signed, short, long) > +TEST2(signed, int, long) > + > +TEST2(signed, int, short) > +TEST2(signed, int, char) > +TEST2(signed, short, char) >=20=20 > -TEST3(signed, char, int, short) > TEST3(signed, char, short, int) > +TEST3(signed, char, int, short) > +TEST3(signed, char, short, long) > +TEST3(signed, char, int, long) > +TEST3(signed, char, short, char) > +TEST3(signed, char, int, char) > + > +TEST3(signed, short, char, int) > +TEST3(signed, short, int, char) > +TEST3(signed, short, char, long) > +TEST3(signed, short, int, long) > +TEST3(signed, short, char, short) > +TEST3(signed, short, int, short) > + > +TEST3(signed, int, char, short) > +TEST3(signed, int, short, char) > +TEST3(signed, int, char, long) > +TEST3(signed, int, short, long) > +TEST3(signed, int, char, int) > +TEST3(signed, int, short, int) >=20=20 > TEST1(unsigned, short) > TEST1(unsigned, char) >=20=20 > TEST2(unsigned, char, short) > TEST2(unsigned, char, int) > +TEST2(unsigned, char, long) > +TEST2(unsigned, short, int) > +TEST2(unsigned, short, long) > + > +TEST2(unsigned, short, char) >=20=20 > TEST3(unsigned, char, short, int) > +TEST3(unsigned, char, short, long) > +TEST3(unsigned, char, short, char) > + > +TEST3(unsigned, short, char, int) > +TEST3(unsigned, short, char, long) > +TEST3(unsigned, short, char, short) > + > +/* { dg-final { scan-assembler-times "sabd\\tv\[0-9\]+\.4s, v\[0-9\]+\.4= s, v\[0-9\]+\.4s" 35 } } */ > +/* { dg-final { scan-assembler-times "sabd\\tv\[0-9\]+\.8h, v\[0-9\]+\.8= h, v\[0-9\]+\.8h" 3 } } */ > +/* { dg-final { scan-assembler-times "sabd\\tv\[0-9\]+\.16b, v\[0-9\]+\.= 16b, v\[0-9\]+\.16b" 1 } } */ >=20=20 > -/* { dg-final { scan-assembler-times "sabd\\tv\[0-9\]+\.4s, v\[0-9\]+\.4= s, v\[0-9\]+\.4s" 5 } } */ > -/* { dg-final { scan-assembler-times "sabd\\tv\[0-9\]+\.8h, v\[0-9\]+\.8= h, v\[0-9\]+\.8h" 4 } } */ > -/* { dg-final { scan-assembler-times "sabd\\tv\[0-9\]+\.16b, v\[0-9\]+\.= 16b, v\[0-9\]+\.16b" 3 } } */ > +/* { dg-final { scan-assembler-times "sabdl\\tv\[0-9\]+\.2d, v\[0-9\]+\.= 2s, v\[0-9\]+\.2s" 13 } } */ > +/* { dg-final { scan-assembler-times "sabdl2\\tv\[0-9\]+\.2d, v\[0-9\]+\= .4s, v\[0-9\]+\.4s" 13 } } */ > +/* { dg-final { scan-assembler-times "sabdl\\tv\[0-9\]+\.4s, v\[0-9\]+\.= 4h, v\[0-9\]+\.4h" 14 } } */ > +/* { dg-final { scan-assembler-times "sabdl2\\tv\[0-9\]+\.4s, v\[0-9\]+\= .8h, v\[0-9\]+\.8h" 14 } } */ > +/* { dg-final { scan-assembler-times "sabdl\\tv\[0-9\]+\.8h, v\[0-9\]+\.= 8b, v\[0-9\]+\.8b" 3 } } */ > +/* { dg-final { scan-assembler-times "sabdl2\\tv\[0-9\]+\.8h, v\[0-9\]+\= .16b, v\[0-9\]+\.16b" 3 } } */ > + > +/* { dg-final { scan-assembler-times "uabd\\tv\[0-9\]+\.4s, v\[0-9\]+\.4= s, v\[0-9\]+\.4s" 0 } } */ > /* { dg-final { scan-assembler-times "uabd\\tv\[0-9\]+\.8h, v\[0-9\]+\.8= h, v\[0-9\]+\.8h" 3 } } */ > -/* { dg-final { scan-assembler-times "uabd\\tv\[0-9\]+\.16b, v\[0-9\]+\.= 16b, v\[0-9\]+\.16b" 3 } } */ > +/* { dg-final { scan-assembler-times "uabd\\tv\[0-9\]+\.16b, v\[0-9\]+\.= 16b, v\[0-9\]+\.16b" 1 } } */ > + > +/* { dg-final { scan-assembler-times "uabdl\\tv\[0-9\]+\.2d, v\[0-9\]+\.= 2s, v\[0-9\]+\.2s" 0 } } */ > +/* { dg-final { scan-assembler-times "uabdl2\\tv\[0-9\]+\.2d, v\[0-9\]+\= .4s, v\[0-9\]+\.4s" 0 } } */ > +/* { dg-final { scan-assembler-times "uabdl\\tv\[0-9\]+\.4s, v\[0-9\]+\.= 4h, v\[0-9\]+\.4h" 14 } } */ > +/* { dg-final { scan-assembler-times "uabdl2\\tv\[0-9\]+\.4s, v\[0-9\]+\= .8h, v\[0-9\]+\.8h" 14 } } */ > +/* { dg-final { scan-assembler-times "uabdl\\tv\[0-9\]+\.8h, v\[0-9\]+\.= 8b, v\[0-9\]+\.8b" 3 } } */ > +/* { dg-final { scan-assembler-times "uabdl2\\tv\[0-9\]+\.8h, v\[0-9\]+\= .16b, v\[0-9\]+\.16b" 3 } } */ >=20=20 > /* { dg-final { scan-assembler-not {\tabs\t} } } */ Sorry to be awkward, but could you put the widening cases in a separate file? It's not very easy as things stand to work out which tests are matched against widening ops and which aren't. Thanks, Richard > diff --git a/gcc/testsuite/gcc.target/aarch64/abd_3.c b/gcc/testsuite/gcc= .target/aarch64/abd_3.c > index 4873c64f34885b3993010beafa01087569336dec..471602a51c4538965ce4a292f= 75a4ecc7e118b1b 100644 > --- a/gcc/testsuite/gcc.target/aarch64/abd_3.c > +++ b/gcc/testsuite/gcc.target/aarch64/abd_3.c > @@ -13,24 +13,75 @@ TEST1(signed, char) >=20=20 > TEST2(signed, char, short) > TEST2(signed, char, int) > +TEST2(signed, char, long) > TEST2(signed, short, int) > +TEST2(signed, short, long) > +TEST2(signed, int, long) > + > +TEST2(signed, int, short) > +TEST2(signed, int, char) > +TEST2(signed, short, char) >=20=20 > -TEST3(signed, char, int, short) > TEST3(signed, char, short, int) > +TEST3(signed, char, int, short) > +TEST3(signed, char, short, long) > +TEST3(signed, char, int, long) > +TEST3(signed, char, short, char) > +TEST3(signed, char, int, char) > + > +TEST3(signed, short, char, int) > +TEST3(signed, short, int, char) > +TEST3(signed, short, char, long) > +TEST3(signed, short, int, long) > +TEST3(signed, short, char, short) > +TEST3(signed, short, int, short) > + > +TEST3(signed, int, char, short) > +TEST3(signed, int, short, char) > +TEST3(signed, int, char, long) > +TEST3(signed, int, short, long) > +TEST3(signed, int, char, int) > +TEST3(signed, int, short, int) >=20=20 > TEST1(unsigned, short) > TEST1(unsigned, char) >=20=20 > TEST2(unsigned, char, short) > TEST2(unsigned, char, int) > +TEST2(unsigned, char, long) > TEST2(unsigned, short, int) > +TEST2(unsigned, short, long) > + > +TEST2(unsigned, short, char) >=20=20 > TEST3(unsigned, char, short, int) > +TEST3(unsigned, char, short, long) > +TEST3(unsigned, char, short, char) > + > +TEST3(unsigned, short, char, int) > +TEST3(unsigned, short, char, long) > +TEST3(unsigned, short, char, short) > + > +/* { dg-final { scan-assembler-times "sabd\\tv\[0-9\]+\.4s, v\[0-9\]+\.4= s, v\[0-9\]+\.4s" 35 } } */ > +/* { dg-final { scan-assembler-times "sabd\\tv\[0-9\]+\.8h, v\[0-9\]+\.8= h, v\[0-9\]+\.8h" 3 } } */ > +/* { dg-final { scan-assembler-times "sabd\\tv\[0-9\]+\.16b, v\[0-9\]+\.= 16b, v\[0-9\]+\.16b" 1 } } */ > + > +/* { dg-final { scan-assembler-times "sabdl\\tv\[0-9\]+\.2d, v\[0-9\]+\.= 2s, v\[0-9\]+\.2s" 13 } } */ > +/* { dg-final { scan-assembler-times "sabdl2\\tv\[0-9\]+\.2d, v\[0-9\]+\= .4s, v\[0-9\]+\.4s" 13 } } */ > +/* { dg-final { scan-assembler-times "sabdl\\tv\[0-9\]+\.4s, v\[0-9\]+\.= 4h, v\[0-9\]+\.4h" 14 } } */ > +/* { dg-final { scan-assembler-times "sabdl2\\tv\[0-9\]+\.4s, v\[0-9\]+\= .8h, v\[0-9\]+\.8h" 14 } } */ > +/* { dg-final { scan-assembler-times "sabdl\\tv\[0-9\]+\.8h, v\[0-9\]+\.= 8b, v\[0-9\]+\.8b" 3 } } */ > +/* { dg-final { scan-assembler-times "sabdl2\\tv\[0-9\]+\.8h, v\[0-9\]+\= .16b, v\[0-9\]+\.16b" 3 } } */ > + > +/* { dg-final { scan-assembler-times "uabd\\tv\[0-9\]+\.4s, v\[0-9\]+\.4= s, v\[0-9\]+\.4s" 0 } } */ > +/* { dg-final { scan-assembler-times "uabd\\tv\[0-9\]+\.8h, v\[0-9\]+\.8= h, v\[0-9\]+\.8h" 3 } } */ > +/* { dg-final { scan-assembler-times "uabd\\tv\[0-9\]+\.16b, v\[0-9\]+\.= 16b, v\[0-9\]+\.16b" 1 } } */ >=20=20 > -/* { dg-final { scan-assembler-times "sabd\\tv\[0-9\]+\.4s, v\[0-9\]+\.4= s, v\[0-9\]+\.4s" 5 } } */ > -/* { dg-final { scan-assembler-times "sabd\\tv\[0-9\]+\.8h, v\[0-9\]+\.8= h, v\[0-9\]+\.8h" 4 } } */ > -/* { dg-final { scan-assembler-times "sabd\\tv\[0-9\]+\.16b, v\[0-9\]+\.= 16b, v\[0-9\]+\.16b" 3 } } */ > -/* { dg-final { scan-assembler-times "uabd\\tv\[0-9\]+\.8h, v\[0-9\]+\.8= h, v\[0-9\]+\.8h" 4 } } */ > -/* { dg-final { scan-assembler-times "uabd\\tv\[0-9\]+\.16b, v\[0-9\]+\.= 16b, v\[0-9\]+\.16b" 3 } } */ > +/* { dg-final { scan-assembler-times "uabdl\\tv\[0-9\]+\.2d, v\[0-9\]+\.= 2s, v\[0-9\]+\.2s" 0 } } */ > +/* { dg-final { scan-assembler-times "uabdl2\\tv\[0-9\]+\.2d, v\[0-9\]+\= .4s, v\[0-9\]+\.4s" 0 } } */ > +/* { dg-final { scan-assembler-times "uabdl\\tv\[0-9\]+\.4s, v\[0-9\]+\.= 4h, v\[0-9\]+\.4h" 14 } } */ > +/* { dg-final { scan-assembler-times "uabdl2\\tv\[0-9\]+\.4s, v\[0-9\]+\= .8h, v\[0-9\]+\.8h" 14 } } */ > +/* { dg-final { scan-assembler-times "uabdl\\tv\[0-9\]+\.8h, v\[0-9\]+\.= 8b, v\[0-9\]+\.8b" 3 } } */ > +/* { dg-final { scan-assembler-times "uabdl2\\tv\[0-9\]+\.8h, v\[0-9\]+\= .16b, v\[0-9\]+\.16b" 3 } } */ >=20=20 > /* { dg-final { scan-assembler-not {\tabs\t} } } */ > diff --git a/gcc/testsuite/gcc.target/aarch64/abd_4.c b/gcc/testsuite/gcc= .target/aarch64/abd_4.c > index 98aa730d6aad700e3a9a712e14adc08c9fb546c2..364762283e99c1375e44ab416= 20d571f54050ce6 100644 > --- a/gcc/testsuite/gcc.target/aarch64/abd_4.c > +++ b/gcc/testsuite/gcc.target/aarch64/abd_4.c > @@ -11,20 +11,57 @@ TEST1(signed, int) >=20=20 > TEST2(signed, char, short) > TEST2(signed, char, int) > +TEST2(signed, char, long) > TEST2(signed, short, int) > +TEST2(signed, short, long) > +TEST2(signed, int, long) >=20=20 > TEST3(signed, char, short, int) > +TEST3(signed, char, short, long) > +TEST3(signed, char, int, long) > + > +TEST3(signed, short, char, int) > +TEST3(signed, short, char, long) > +TEST3(signed, short, int, long) > + > +TEST3(signed, int, char, long) > +TEST3(signed, int, short, long) > +TEST3(signed, int, char, int) > +TEST3(signed, int, short, int) >=20=20 > TEST2(unsigned, char, short) > TEST2(unsigned, char, int) > +TEST2(unsigned, char, long) > TEST2(unsigned, short, int) > +TEST2(unsigned, short, long) >=20=20 > TEST3(unsigned, char, short, int) > +TEST3(unsigned, char, short, long) > + > +TEST3(unsigned, short, char, int) > +TEST3(unsigned, short, char, long) > + > +/* { dg-final { scan-assembler-times "sabd\\tv\[0-9\]+\.4s, v\[0-9\]+\.4= s, v\[0-9\]+\.4s" 7 } } */ > +/* { dg-final { scan-assembler-times "sabd\\tv\[0-9\]+\.8h, v\[0-9\]+\.8= h, v\[0-9\]+\.8h" 0 } } */ > +/* { dg-final { scan-assembler-times "sabd\\tv\[0-9\]+\.16b, v\[0-9\]+\.= 16b, v\[0-9\]+\.16b" 0 } } */ > + > +/* { dg-final { scan-assembler-times "sabdl\\tv\[0-9\]+\.2d, v\[0-9\]+\.= 2s, v\[0-9\]+\.2s" 13 } } */ > +/* { dg-final { scan-assembler-times "sabdl2\\tv\[0-9\]+\.2d, v\[0-9\]+\= .4s, v\[0-9\]+\.4s" 13 } } */ > +/* { dg-final { scan-assembler-times "sabdl\\tv\[0-9\]+\.4s, v\[0-9\]+\.= 4h, v\[0-9\]+\.4h" 10 } } */ > +/* { dg-final { scan-assembler-times "sabdl2\\tv\[0-9\]+\.4s, v\[0-9\]+\= .8h, v\[0-9\]+\.8h" 10 } } */ > +/* { dg-final { scan-assembler-times "sabdl\\tv\[0-9\]+\.8h, v\[0-9\]+\.= 8b, v\[0-9\]+\.8b" 3 } } */ > +/* { dg-final { scan-assembler-times "sabdl2\\tv\[0-9\]+\.8h, v\[0-9\]+\= .16b, v\[0-9\]+\.16b" 3 } } */ > + > +/* { dg-final { scan-assembler-times "uabd\\tv\[0-9\]+\.4s, v\[0-9\]+\.4= s, v\[0-9\]+\.4s" 0 } } */ > +/* { dg-final { scan-assembler-times "uabd\\tv\[0-9\]+\.8h, v\[0-9\]+\.8= h, v\[0-9\]+\.8h" 0 } } */ > +/* { dg-final { scan-assembler-times "uabd\\tv\[0-9\]+\.16b, v\[0-9\]+\.= 16b, v\[0-9\]+\.16b" 0:w > + } } */ >=20=20 > -/* { dg-final { scan-assembler-times "sabd\\tv\[0-9\]+\.4s, v\[0-9\]+\.4= s, v\[0-9\]+\.4s" 1 } } */ > -/* { dg-final { scan-assembler-times "sabd\\tv\[0-9\]+\.8h, v\[0-9\]+\.8= h, v\[0-9\]+\.8h" 3 } } */ > -/* { dg-final { scan-assembler-times "sabd\\tv\[0-9\]+\.16b, v\[0-9\]+\.= 16b, v\[0-9\]+\.16b" 2 } } */ > -/* { dg-final { scan-assembler-times "uabd\\tv\[0-9\]+\.8h, v\[0-9\]+\.8= h, v\[0-9\]+\.8h" 3 } } */ > -/* { dg-final { scan-assembler-times "uabd\\tv\[0-9\]+\.16b, v\[0-9\]+\.= 16b, v\[0-9\]+\.16b" 2 } } */ > +/* { dg-final { scan-assembler-times "uabdl\\tv\[0-9\]+\.2d, v\[0-9\]+\.= 2s, v\[0-9\]+\.2s" 0 } } */ > +/* { dg-final { scan-assembler-times "uabdl2\\tv\[0-9\]+\.2d, v\[0-9\]+\= .4s, v\[0-9\]+\.4s" 0 } } */ > +/* { dg-final { scan-assembler-times "uabdl\\tv\[0-9\]+\.4s, v\[0-9\]+\.= 4h, v\[0-9\]+\.4h" 10 } } */ > +/* { dg-final { scan-assembler-times "uabdl2\\tv\[0-9\]+\.4s, v\[0-9\]+\= .8h, v\[0-9\]+\.8h" 10 } } */ > +/* { dg-final { scan-assembler-times "uabdl\\tv\[0-9\]+\.8h, v\[0-9\]+\.= 8b, v\[0-9\]+\.8b" 3 } } */ > +/* { dg-final { scan-assembler-times "uabdl2\\tv\[0-9\]+\.8h, v\[0-9\]+\= .16b, v\[0-9\]+\.16b" 3 } } */ >=20=20 > /* { dg-final { scan-assembler-not {\tabs\t} } } */ > diff --git a/gcc/testsuite/gcc.target/aarch64/abd_none_2.c b/gcc/testsuit= e/gcc.target/aarch64/abd_none_2.c > index 658e7426965ead945d0cad68ef721f176fb41665..d7ef2c1417b5461f8c4315d8d= 4911ca9f57c592c 100644 > --- a/gcc/testsuite/gcc.target/aarch64/abd_none_2.c > +++ b/gcc/testsuite/gcc.target/aarch64/abd_none_2.c > @@ -7,8 +7,81 @@ > #define ABD_ABS > #include "abd.h" >=20=20 > +TEST1(signed, long) > + > +TEST2(signed, long, char) > +TEST2(signed, long, short) > +TEST2(signed, long, int) > + > +TEST3(signed, char, long, short) > +TEST3(signed, char, long, int) > +TEST3(signed, char, long, char) > + > +TEST3(signed, short, long, char) > +TEST3(signed, short, long, int) > +TEST3(signed, short, long, short) > + > +TEST3(signed, int, long, char) > +TEST3(signed, int, long, short) > +TEST3(signed, int, long, int) > + > +TEST3(signed, long, char, short) > +TEST3(signed, long, short, char) > +TEST3(signed, long, char, int) > +TEST3(signed, long, int, char) > +TEST3(signed, long, short, int) > +TEST3(signed, long, int, short) > +TEST3(signed, long, char, long) > +TEST3(signed, long, short, long) > +TEST3(signed, long, int, long) > + > TEST1(unsigned, int) > +TEST1(unsigned, long) > + > +TEST2(unsigned, int, long) > + > +TEST2(unsigned, long, char) > +TEST2(unsigned, long, short) > +TEST2(unsigned, long, int) > +TEST2(unsigned, int, short) > +TEST2(unsigned, int, char) > + > TEST3(unsigned, char, int, short) > +TEST3(unsigned, char, long, short) > +TEST3(unsigned, char, int, long) > +TEST3(unsigned, char, long, int) > +TEST3(unsigned, char, int, char) > + > +TEST3(unsigned, short, int, char) > +TEST3(unsigned, short, long, char) > +TEST3(unsigned, short, int, long) > +TEST3(unsigned, short, long, int) > +TEST3(unsigned, short, int, short) > +TEST3(unsigned, short, long, short) > + > +TEST3(unsigned, int, char, short) > +TEST3(unsigned, int, short, char) > +TEST3(unsigned, int, char, long) > +TEST3(unsigned, int, long, char) > +TEST3(unsigned, int, short, long) > +TEST3(unsigned, int, long, short) > +TEST3(unsigned, int, char, int) > +TEST3(unsigned, int, short, int) > +TEST3(unsigned, int, long, int) > + > +TEST3(unsigned, long, char, short) > +TEST3(unsigned, long, short, char) > +TEST3(unsigned, long, char, int) > +TEST3(unsigned, long, int, char) > +TEST3(unsigned, long, short, int) > +TEST3(unsigned, long, int, short) > +TEST3(unsigned, long, char, long) > +TEST3(unsigned, long, short, long) > +TEST3(unsigned, long, int, long) >=20=20 > /* { dg-final { scan-assembler-not {\tsabd\t} } } */ > +/* { dg-final { scan-assembler-not {\tsabdl\t} } } */ > +/* { dg-final { scan-assembler-not {\tsabdl2\t} } } */ > /* { dg-final { scan-assembler-not {\tuabd\t} } } */ > +/* { dg-final { scan-assembler-not {\tuabdl\t} } } */ > +/* { dg-final { scan-assembler-not {\tuabdl2\t} } } */ > diff --git a/gcc/testsuite/gcc.target/aarch64/abd_none_3.c b/gcc/testsuit= e/gcc.target/aarch64/abd_none_3.c > index 14cfdcbde6998b527989326ff8848d071a4774e8..f23dd7d06e7facff1116a9c78= 303993a178b1c0b 100644 > --- a/gcc/testsuite/gcc.target/aarch64/abd_none_3.c > +++ b/gcc/testsuite/gcc.target/aarch64/abd_none_3.c > @@ -7,8 +7,81 @@ > #define ABD_ABS > #include "abd.h" >=20=20 > +TEST1(signed, long) > + > +TEST2(signed, long, char) > +TEST2(signed, long, short) > +TEST2(signed, long, int) > + > +TEST3(signed, char, long, short) > +TEST3(signed, char, long, int) > +TEST3(signed, char, long, char) > + > +TEST3(signed, short, long, char) > +TEST3(signed, short, long, int) > +TEST3(signed, short, long, short) > + > +TEST3(signed, int, long, char) > +TEST3(signed, int, long, short) > +TEST3(signed, int, long, int) > + > +TEST3(signed, long, char, short) > +TEST3(signed, long, short, char) > +TEST3(signed, long, char, int) > +TEST3(signed, long, int, char) > +TEST3(signed, long, short, int) > +TEST3(signed, long, int, short) > +TEST3(signed, long, char, long) > +TEST3(signed, long, short, long) > +TEST3(signed, long, int, long) > + > TEST1(unsigned, int) > +TEST1(unsigned, long) > + > +TEST2(unsigned, int, long) > + > +TEST2(unsigned, long, char) > +TEST2(unsigned, long, short) > +TEST2(unsigned, long, int) > +TEST2(unsigned, int, short) > +TEST2(unsigned, int, char) > + > TEST3(unsigned, char, int, short) > +TEST3(unsigned, char, long, short) > +TEST3(unsigned, char, int, long) > +TEST3(unsigned, char, long, int) > +TEST3(unsigned, char, int, char) > + > +TEST3(unsigned, short, int, char) > +TEST3(unsigned, short, long, char) > +TEST3(unsigned, short, int, long) > +TEST3(unsigned, short, long, int) > +TEST3(unsigned, short, int, short) > +TEST3(unsigned, short, long, short) > + > +TEST3(unsigned, int, char, short) > +TEST3(unsigned, int, short, char) > +TEST3(unsigned, int, char, long) > +TEST3(unsigned, int, long, char) > +TEST3(unsigned, int, short, long) > +TEST3(unsigned, int, long, short) > +TEST3(unsigned, int, char, int) > +TEST3(unsigned, int, short, int) > +TEST3(unsigned, int, long, int) > + > +TEST3(unsigned, long, char, short) > +TEST3(unsigned, long, short, char) > +TEST3(unsigned, long, char, int) > +TEST3(unsigned, long, int, char) > +TEST3(unsigned, long, short, int) > +TEST3(unsigned, long, int, short) > +TEST3(unsigned, long, char, long) > +TEST3(unsigned, long, short, long) > +TEST3(unsigned, long, int, long) >=20=20 > /* { dg-final { scan-assembler-not {\tsabd\t} } } */ > +/* { dg-final { scan-assembler-not {\tsabdl\t} } } */ > +/* { dg-final { scan-assembler-not {\tsabdl2\t} } } */ > /* { dg-final { scan-assembler-not {\tuabd\t} } } */ > +/* { dg-final { scan-assembler-not {\tuabdl\t} } } */ > +/* { dg-final { scan-assembler-not {\tuabdl2\t} } } */ > diff --git a/gcc/testsuite/gcc.target/aarch64/abd_none_4.c b/gcc/testsuit= e/gcc.target/aarch64/abd_none_4.c > index d612216b98bf5484783489cc48b4417ad1914b1d..f5cfc5dd73d0e4008318b7f2a= 9a143c98b12c88f 100644 > --- a/gcc/testsuite/gcc.target/aarch64/abd_none_4.c > +++ b/gcc/testsuite/gcc.target/aarch64/abd_none_4.c > @@ -9,14 +9,98 @@ >=20=20 > TEST1(signed, short) > TEST1(signed, char) > +TEST1(signed, long) > + > +TEST2(signed, long, char) > +TEST2(signed, long, short) > +TEST2(signed, long, int) > +TEST2(signed, int, short) > +TEST2(signed, int, char) > +TEST2(signed, short, char) >=20=20 > TEST3(signed, char, int, short) > +TEST3(signed, char, long, short) > +TEST3(signed, char, long, int) > +TEST3(signed, char, short, char) > +TEST3(signed, char, int, char) > +TEST3(signed, char, long, char) > + > +TEST3(signed, short, int, char) > +TEST3(signed, short, long, char) > +TEST3(signed, short, long, int) > +TEST3(signed, short, char, short) > +TEST3(signed, short, int, short) > +TEST3(signed, short, long, short) > + > +TEST3(signed, int, char, short) > +TEST3(signed, int, short, char) > +TEST3(signed, int, long, char) > +TEST3(signed, int, long, short) > +TEST3(signed, int, long, int) > + > +TEST3(signed, long, char, short) > +TEST3(signed, long, short, char) > +TEST3(signed, long, char, int) > +TEST3(signed, long, int, char) > +TEST3(signed, long, short, int) > +TEST3(signed, long, int, short) > +TEST3(signed, long, char, long) > +TEST3(signed, long, short, long) > +TEST3(signed, long, int, long) >=20=20 > TEST1(unsigned, int) > TEST1(unsigned, short) > TEST1(unsigned, char) > +TEST1(unsigned, long) > + > +TEST2(unsigned, int, long) > + > +TEST2(unsigned, long, char) > +TEST2(unsigned, long, short) > +TEST2(unsigned, long, int) > +TEST2(unsigned, int, short) > +TEST2(unsigned, int, char) > +TEST2(unsigned, short, char) >=20=20 > TEST3(unsigned, char, int, short) > +TEST3(unsigned, char, long, short) > +TEST3(unsigned, char, int, long) > +TEST3(unsigned, char, long, int) > +TEST3(unsigned, char, short, char) > +TEST3(unsigned, char, int, char) > +TEST3(unsigned, char, long, char) > + > +TEST3(unsigned, short, int, char) > +TEST3(unsigned, short, long, char) > +TEST3(unsigned, short, int, long) > +TEST3(unsigned, short, long, int) > +TEST3(unsigned, short, char, short) > +TEST3(unsigned, short, int, short) > +TEST3(unsigned, short, long, short) > + > +TEST3(unsigned, int, char, short) > +TEST3(unsigned, int, short, char) > +TEST3(unsigned, int, char, long) > +TEST3(unsigned, int, long, char) > +TEST3(unsigned, int, short, long) > +TEST3(unsigned, int, long, short) > +TEST3(unsigned, int, char, int) > +TEST3(unsigned, int, short, int) > +TEST3(unsigned, int, long, int) > + > +TEST3(unsigned, long, char, short) > +TEST3(unsigned, long, short, char) > +TEST3(unsigned, long, char, int) > +TEST3(unsigned, long, int, char) > +TEST3(unsigned, long, short, int) > +TEST3(unsigned, long, int, short) > +TEST3(unsigned, long, char, long) > +TEST3(unsigned, long, short, long) > +TEST3(unsigned, long, int, long) >=20=20 > /* { dg-final { scan-assembler-not {\tsabd\t} } } */ > +/* { dg-final { scan-assembler-not {\tsabdl\t} } } */ > +/* { dg-final { scan-assembler-not {\tsabdl2\t} } } */ > /* { dg-final { scan-assembler-not {\tuabd\t} } } */ > +/* { dg-final { scan-assembler-not {\tuabdl\t} } } */ > +/* { dg-final { scan-assembler-not {\tuabdl2\t} } } */ > diff --git a/gcc/testsuite/gcc.target/aarch64/abd_run_1.c b/gcc/testsuite= /gcc.target/aarch64/abd_run_1.c > index 7bb0a801415ffeab235bd636032112228255e836..1bfd6aca157db47b0874af730= 8a5fa8d61f71da2 100644 > --- a/gcc/testsuite/gcc.target/aarch64/abd_run_1.c > +++ b/gcc/testsuite/gcc.target/aarch64/abd_run_1.c > @@ -11,10 +11,17 @@ TEST1(signed, int) > TEST1(signed, short) > TEST1(signed, char) >=20=20 > +TEST2(signed, char, short) > +TEST2(signed, short, int) > +TEST2(signed, int, long) > + > TEST1(unsigned, int) > TEST1(unsigned, short) > TEST1(unsigned, char) >=20=20 > +TEST2(unsigned, char, short) > +TEST2(unsigned, short, int) > + > #define EMPTY { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } > #define sA { -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50,= -50, -50, -50, -50 } > #define uA { 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100,= 100, 100, 100, 100 } > @@ -27,6 +34,8 @@ typedef signed short s16; > typedef unsigned short u16; > typedef signed int s32; > typedef unsigned int u32; > +typedef signed long s64; > +typedef unsigned long u64; >=20=20 > s8 sc_out[] =3D EMPTY; > u8 uc_out[] =3D EMPTY; > @@ -34,6 +43,8 @@ s16 ss_out[] =3D EMPTY; > u16 us_out[] =3D EMPTY; > s32 si_out[] =3D EMPTY; > u32 ui_out[] =3D EMPTY; > +s64 sl_out[] =3D EMPTY; > +u64 ul_out[] =3D EMPTY; >=20=20 > s8 sc_A[] =3D sA; > s8 sc_B[] =3D B; > @@ -56,6 +67,8 @@ s16 ss_gold[] =3D GOLD; > u16 us_gold[] =3D GOLD; > s32 si_gold[] =3D GOLD; > u32 ui_gold[] =3D GOLD; > +s64 sl_gold[] =3D GOLD; > +u64 ul_gold[] =3D GOLD; >=20=20 > extern void abort (void); >=20=20 > @@ -88,6 +101,22 @@ int main () > fn_unsigned_int (ui_A, ui_B, ui_out); > COMPARE (ui_out, ui_gold); >=20=20 > + > + fn_signed_char_char_short (sc_B, sc_A, ss_out); > + COMPARE(ss_gold, ss_out);=20 > + > + fn_signed_short_short_int (ss_A, ss_B, si_out); > + COMPARE(si_gold, si_out);=20 > + > + fn_signed_int_int_long (si_B, si_A, sl_out); > + COMPARE(sl_gold, sl_out); > + > + fn_unsigned_char_char_short (uc_B, uc_A, us_out); > + COMPARE(us_gold, us_out);=20 > + > + fn_unsigned_short_short_int (us_A, us_B, ui_out); > + COMPARE(ui_gold, ui_out);=20 > + > return 0; > } >=20=20 > diff --git a/gcc/testsuite/gcc.target/aarch64/sve/abd_1.c b/gcc/testsuite= /gcc.target/aarch64/sve/abd_1.c > index e49006f90b22040f890c279ec19c490a655abd63..364741ea1bfb981f61676128e= fad1e43586e8eb8 100644 > --- a/gcc/testsuite/gcc.target/aarch64/sve/abd_1.c > +++ b/gcc/testsuite/gcc.target/aarch64/sve/abd_1.c > @@ -10,26 +10,79 @@ TEST1(signed, int) > TEST1(signed, short) > TEST1(signed, char) >=20=20 > -TEST2(signed, char, int) > TEST2(signed, char, short) > +TEST2(signed, char, int) > +TEST2(signed, char, long) > TEST2(signed, short, int) > +TEST2(signed, short, long) > +TEST2(signed, int, long) > + > +TEST2(signed, int, short) > +TEST2(signed, int, char) > +TEST2(signed, short, char) >=20=20 > -TEST3(signed, char, int, short) > TEST3(signed, char, short, int) > +TEST3(signed, char, int, short) > +TEST3(signed, char, short, long) > +TEST3(signed, char, int, long) > +TEST3(signed, char, short, char) > +TEST3(signed, char, int, char) > + > +TEST3(signed, short, char, int) > +TEST3(signed, short, int, char) > +TEST3(signed, short, char, long) > +TEST3(signed, short, int, long) > +TEST3(signed, short, char, short) > +TEST3(signed, short, int, short) > + > +TEST3(signed, int, char, short) > +TEST3(signed, int, short, char) > +TEST3(signed, int, char, long) > +TEST3(signed, int, short, long) > +TEST3(signed, int, char, int) > +TEST3(signed, int, short, int) >=20=20 > TEST1(unsigned, short) > TEST1(unsigned, char) >=20=20 > TEST2(unsigned, char, short) > TEST2(unsigned, char, int) > +TEST2(unsigned, char, long) > TEST2(unsigned, short, int) > +TEST2(unsigned, short, long) > + > +TEST2(unsigned, short, char) >=20=20 > TEST3(unsigned, char, short, int) > +TEST3(unsigned, char, short, long) > +TEST3(unsigned, char, short, char) > + > +TEST3(unsigned, short, char, int) > +TEST3(unsigned, short, char, long) > +TEST3(unsigned, short, char, short) > + > +/* { dg-final { scan-assembler-times "sabd\\tz\[0-9\]+\.d, p\[0-9\]/m, z= \[0-9\]+\.d, z\[0-9\]+\.d" 0 } } */ > +/* { dg-final { scan-assembler-times "sabd\\tz\[0-9\]+\.s, p\[0-9\]/m, z= \[0-9\]+\.s, z\[0-9\]+\.s" 16 } } */ > +/* { dg-final { scan-assembler-times "sabd\\tz\[0-9\]+\.h, p\[0-9\]/m, z= \[0-9\]+\.h, z\[0-9\]+\.h" 2 } } */ > +/* { dg-final { scan-assembler-times "sabd\\tz\[0-9\]+\.b, p\[0-9\]/m, z= \[0-9\]+\.b, z\[0-9\]+\.b" 4 } } */ > + > +/* { dg-final { scan-assembler-times "sabdl\\tv\[0-9\]+\.2d, v\[0-9\]+\.= 2s, v\[0-9\]+\.2s" 0 } } */ > +/* { dg-final { scan-assembler-times "sabdl2\\tv\[0-9\]+\.2d, v\[0-9\]+\= .4s, v\[0-9\]+\.4s" 0 } } */ > +/* { dg-final { scan-assembler-times "sabdl\\tv\[0-9\]+\.4s, v\[0-9\]+\.= 4h, v\[0-9\]+\.4h" 14 } } */ > +/* { dg-final { scan-assembler-times "sabdl2\\tv\[0-9\]+\.4s, v\[0-9\]+\= .8h, v\[0-9\]+\.8h" 14 } } */ > +/* { dg-final { scan-assembler-times "sabdl\\tv\[0-9\]+\.8h, v\[0-9\]+\.= 8b, v\[0-9\]+\.8b" 0 } } */ > +/* { dg-final { scan-assembler-times "sabdl2\\tv\[0-9\]+\.8h, v\[0-9\]+\= .16b, v\[0-9\]+\.16b" 0 } } */ > + > +/* { dg-final { scan-assembler-times "uabd\\tz\[0-9\]+\.d, p\[0-9\]/m, z= \[0-9\]+\.d, z\[0-9\]+\.d" 0 } } */ > +/* { dg-final { scan-assembler-times "uabd\\tz\[0-9\]+\.s, p\[0-9\]/m, z= \[0-9\]+\.s, z\[0-9\]+\.s" 0 } } */ > +/* { dg-final { scan-assembler-times "uabd\\tz\[0-9\]+\.h, p\[0-9\]/m, z= \[0-9\]+\.h, z\[0-9\]+\.h" 2 } } */ > +/* { dg-final { scan-assembler-times "uabd\\tz\[0-9\]+\.b, p\[0-9\]/m, z= \[0-9\]+\.b, z\[0-9\]+\.b" 4 } } */ >=20=20 > -/* { dg-final { scan-assembler-times "sabd\\tz\[0-9\]+\.s, p\[0-9\]/m, z= \[0-9\]+\.s, z\[0-9\]+\.s" 2 } } */ > -/* { dg-final { scan-assembler-times "sabd\\tz\[0-9\]+\.h, p\[0-9\]/m, z= \[0-9\]+\.h, z\[0-9\]+\.h" 3 } } */ > -/* { dg-final { scan-assembler-times "sabd\\tz\[0-9\]+\.b, p\[0-9\]/m, z= \[0-9\]+\.b, z\[0-9\]+\.b" 3 } } */ > -/* { dg-final { scan-assembler-times "uabd\\tz\[0-9\]+\.h, p\[0-9\]/m, z= \[0-9\]+\.h, z\[0-9\]+\.h" 3 } } */ > -/* { dg-final { scan-assembler-times "uabd\\tz\[0-9\]+\.b, p\[0-9\]/m, z= \[0-9\]+\.b, z\[0-9\]+\.b" 3 } } */ > +/* { dg-final { scan-assembler-times "uabdl\\tv\[0-9\]+\.2d, v\[0-9\]+\.= 2s, v\[0-9\]+\.2s" 0 } } */ > +/* { dg-final { scan-assembler-times "uabdl2\\tv\[0-9\]+\.2d, v\[0-9\]+\= .4s, v\[0-9\]+\.4s" 0 } } */ > +/* { dg-final { scan-assembler-times "uabdl\\tv\[0-9\]+\.4s, v\[0-9\]+\.= 4h, v\[0-9\]+\.4h" 14 } } */ > +/* { dg-final { scan-assembler-times "uabdl2\\tv\[0-9\]+\.4s, v\[0-9\]+\= .8h, v\[0-9\]+\.8h" 14 } } */ > +/* { dg-final { scan-assembler-times "uabdl\\tv\[0-9\]+\.8h, v\[0-9\]+\.= 8b, v\[0-9\]+\.8b" 0 } } */ > +/* { dg-final { scan-assembler-times "uabdl2\\tv\[0-9\]+\.8h, v\[0-9\]+\= .16b, v\[0-9\]+\.16b" 0 } } */ >=20=20 > /* { dg-final { scan-assembler-not {\tabs\t} } } */ > diff --git a/gcc/testsuite/gcc.target/aarch64/sve/abd_2.c b/gcc/testsuite= /gcc.target/aarch64/sve/abd_2.c > index ea64fa837b1025933ab6c339b86f0db06ffbe0e4..02e0ef09b72a3802fd32c93bf= 43035787ed5553b 100644 > --- a/gcc/testsuite/gcc.target/aarch64/sve/abd_2.c > +++ b/gcc/testsuite/gcc.target/aarch64/sve/abd_2.c > @@ -7,23 +7,66 @@ > #include "../abd.h" >=20=20 > TEST1(signed, int) > +TEST1(signed, long) >=20=20 > -TEST2(signed, char, int) > TEST2(signed, char, short) > +TEST2(signed, char, int) > +TEST2(signed, char, long) > TEST2(signed, short, int) > +TEST2(signed, short, long) > +TEST2(signed, int, long) >=20=20 > TEST3(signed, char, short, int) > +TEST3(signed, char, short, long) > +TEST3(signed, char, int, long) > + > +TEST3(signed, short, char, int) > +TEST3(signed, short, char, long) > +TEST3(signed, short, int, long) > + > +TEST3(signed, int, char, long) > +TEST3(signed, int, short, long) > +TEST3(signed, int, char, int) > +TEST3(signed, int, short, int) > + > +TEST3(signed, long, char, long) > +TEST3(signed, long, short, long) > +TEST3(signed, long, int, long) >=20=20 > -TEST2(unsigned, char, int) > TEST2(unsigned, char, short) > +TEST2(unsigned, char, int) > +TEST2(unsigned, char, long) > TEST2(unsigned, short, int) > +TEST2(unsigned, short, long) >=20=20 > TEST3(unsigned, char, short, int) > +TEST3(unsigned, char, short, long) > + > +TEST3(unsigned, short, char, int) > +TEST3(unsigned, short, char, long) >=20=20 > -/* { dg-final { scan-assembler-times "sabd\\tz\[0-9\]+\.s, p\[0-9\]/m, z= \[0-9\]+\.s, z\[0-9\]+\.s" 1 } } */ > -/* { dg-final { scan-assembler-times "sabd\\tz\[0-9\]+\.h, p\[0-9\]/m, z= \[0-9\]+\.h, z\[0-9\]+\.h" 2 } } */ > +/* { dg-final { scan-assembler-times "sabd\\tz\[0-9\]+\.d, p\[0-9\]/m, z= \[0-9\]+\.d, z\[0-9\]+\.d" 4 } } */ > +/* { dg-final { scan-assembler-times "sabd\\tz\[0-9\]+\.s, p\[0-9\]/m, z= \[0-9\]+\.s, z\[0-9\]+\.s" 8 } } */ > +/* { dg-final { scan-assembler-times "sabd\\tz\[0-9\]+\.h, p\[0-9\]/m, z= \[0-9\]+\.h, z\[0-9\]+\.h" 0 } } */ > /* { dg-final { scan-assembler-times "sabd\\tz\[0-9\]+\.b, p\[0-9\]/m, z= \[0-9\]+\.b, z\[0-9\]+\.b" 2 } } */ > -/* { dg-final { scan-assembler-times "uabd\\tz\[0-9\]+\.h, p\[0-9\]/m, z= \[0-9\]+\.h, z\[0-9\]+\.h" 2 } } */ > + > +/* { dg-final { scan-assembler-times "sabdl\\tv\[0-9\]+\.2d, v\[0-9\]+\.= 2s, v\[0-9\]+\.2s" 0 } } */ > +/* { dg-final { scan-assembler-times "sabdl2\\tv\[0-9\]+\.2d, v\[0-9\]+\= .4s, v\[0-9\]+\.4s" 0 } } */ > +/* { dg-final { scan-assembler-times "sabdl\\tv\[0-9\]+\.4s, v\[0-9\]+\.= 4h, v\[0-9\]+\.4h" 10 } } */ > +/* { dg-final { scan-assembler-times "sabdl2\\tv\[0-9\]+\.4s, v\[0-9\]+\= .8h, v\[0-9\]+\.8h" 10 } } */ > +/* { dg-final { scan-assembler-times "sabdl\\tv\[0-9\]+\.8h, v\[0-9\]+\.= 8b, v\[0-9\]+\.8b" 1 } } */ > +/* { dg-final { scan-assembler-times "sabdl2\\tv\[0-9\]+\.8h, v\[0-9\]+\= .16b, v\[0-9\]+\.16b" 1 } } */ > + > +/* { dg-final { scan-assembler-times "uabd\\tz\[0-9\]+\.d, p\[0-9\]/m, z= \[0-9\]+\.d, z\[0-9\]+\.d" 0 } } */ > +/* { dg-final { scan-assembler-times "uabd\\tz\[0-9\]+\.s, p\[0-9\]/m, z= \[0-9\]+\.s, z\[0-9\]+\.s" 0 } } */ > +/* { dg-final { scan-assembler-times "uabd\\tz\[0-9\]+\.h, p\[0-9\]/m, z= \[0-9\]+\.h, z\[0-9\]+\.h" 0 } } */ > /* { dg-final { scan-assembler-times "uabd\\tz\[0-9\]+\.b, p\[0-9\]/m, z= \[0-9\]+\.b, z\[0-9\]+\.b" 2 } } */ >=20=20 > +/* { dg-final { scan-assembler-times "uabdl\\tv\[0-9\]+\.2d, v\[0-9\]+\.= 2s, v\[0-9\]+\.2s" 0 } } */ > +/* { dg-final { scan-assembler-times "uabdl2\\tv\[0-9\]+\.2d, v\[0-9\]+\= .4s, v\[0-9\]+\.4s" 0 } } */ > +/* { dg-final { scan-assembler-times "uabdl\\tv\[0-9\]+\.4s, v\[0-9\]+\.= 4h, v\[0-9\]+\.4h" 10 } } */ > +/* { dg-final { scan-assembler-times "uabdl2\\tv\[0-9\]+\.4s, v\[0-9\]+\= .8h, v\[0-9\]+\.8h" 10 } } */ > +/* { dg-final { scan-assembler-times "uabdl\\tv\[0-9\]+\.8h, v\[0-9\]+\.= 8b, v\[0-9\]+\.8b" 1 } } */ > +/* { dg-final { scan-assembler-times "uabdl2\\tv\[0-9\]+\.8h, v\[0-9\]+\= .16b, v\[0-9\]+\.16b" 1 } } */ > + > /* { dg-final { scan-assembler-not {\tabs\t} } } */ > diff --git a/gcc/testsuite/gcc.target/aarch64/sve/abd_none_1.c b/gcc/test= suite/gcc.target/aarch64/sve/abd_none_1.c > index a4c2053c50e235e6ea6ad8bfb124889556be1657..1fb58b38474796bb6ed66fb09= 8372ac81446d572 100644 > --- a/gcc/testsuite/gcc.target/aarch64/sve/abd_none_1.c > +++ b/gcc/testsuite/gcc.target/aarch64/sve/abd_none_1.c > @@ -6,8 +6,81 @@ > #define ABD_ABS > #include "../abd.h" >=20=20 > +TEST1(signed, long) > + > +TEST2(signed, long, char) > +TEST2(signed, long, short) > +TEST2(signed, long, int) > + > +TEST3(signed, char, long, short) > +TEST3(signed, char, long, int) > +TEST3(signed, char, long, char) > + > +TEST3(signed, short, long, char) > +TEST3(signed, short, long, int) > +TEST3(signed, short, long, short) > + > +TEST3(signed, int, long, char) > +TEST3(signed, int, long, short) > +TEST3(signed, int, long, int) > + > +TEST3(signed, long, char, short) > +TEST3(signed, long, short, char) > +TEST3(signed, long, char, int) > +TEST3(signed, long, int, char) > +TEST3(signed, long, short, int) > +TEST3(signed, long, int, short) > +TEST3(signed, long, char, long) > +TEST3(signed, long, short, long) > +TEST3(signed, long, int, long) > + > TEST1(unsigned, int) > +TEST1(unsigned, long) > + > +TEST2(unsigned, int, long) > + > +TEST2(unsigned, long, char) > +TEST2(unsigned, long, short) > +TEST2(unsigned, long, int) > +TEST2(unsigned, int, short) > +TEST2(unsigned, int, char) > + > TEST3(unsigned, char, int, short) > +TEST3(unsigned, char, long, short) > +TEST3(unsigned, char, int, long) > +TEST3(unsigned, char, long, int) > +TEST3(unsigned, char, int, char) > + > +TEST3(unsigned, short, int, char) > +TEST3(unsigned, short, long, char) > +TEST3(unsigned, short, int, long) > +TEST3(unsigned, short, long, int) > +TEST3(unsigned, short, int, short) > +TEST3(unsigned, short, long, short) > + > +TEST3(unsigned, int, char, short) > +TEST3(unsigned, int, short, char) > +TEST3(unsigned, int, char, long) > +TEST3(unsigned, int, long, char) > +TEST3(unsigned, int, short, long) > +TEST3(unsigned, int, long, short) > +TEST3(unsigned, int, char, int) > +TEST3(unsigned, int, short, int) > +TEST3(unsigned, int, long, int) > + > +TEST3(unsigned, long, char, short) > +TEST3(unsigned, long, short, char) > +TEST3(unsigned, long, char, int) > +TEST3(unsigned, long, int, char) > +TEST3(unsigned, long, short, int) > +TEST3(unsigned, long, int, short) > +TEST3(unsigned, long, char, long) > +TEST3(unsigned, long, short, long) > +TEST3(unsigned, long, int, long) >=20=20 > /* { dg-final { scan-assembler-not {\tsabd\t} } } */ > +/* { dg-final { scan-assembler-not {\tsabdl\t} } } */ > +/* { dg-final { scan-assembler-not {\tsabdl2\t} } } */ > /* { dg-final { scan-assembler-not {\tuabd\t} } } */ > +/* { dg-final { scan-assembler-not {\tuabdl\t} } } */ > +/* { dg-final { scan-assembler-not {\tuabdl2\t} } } */ > diff --git a/gcc/testsuite/gcc.target/aarch64/sve/abd_none_2.c b/gcc/test= suite/gcc.target/aarch64/sve/abd_none_2.c > index 4862db93a81e890637ee8e02dcc9de9e0e613e91..a9465b56bab9aad5a6bea6505= 5e7d928c7aabe39 100644 > --- a/gcc/testsuite/gcc.target/aarch64/sve/abd_none_2.c > +++ b/gcc/testsuite/gcc.target/aarch64/sve/abd_none_2.c > @@ -9,13 +9,93 @@ > TEST1(signed, short) > TEST1(signed, char) >=20=20 > +TEST2(signed, long, char) > +TEST2(signed, long, short) > +TEST2(signed, long, int) > +TEST2(signed, int, short) > +TEST2(signed, int, char) > +TEST2(signed, short, char) > + > TEST3(signed, char, int, short) > +TEST3(signed, char, long, short) > +TEST3(signed, char, long, int) > +TEST3(signed, char, short, char) > +TEST3(signed, char, int, char) > +TEST3(signed, char, long, char) > + > +TEST3(signed, short, int, char) > +TEST3(signed, short, long, char) > +TEST3(signed, short, long, int) > +TEST3(signed, short, char, short) > +TEST3(signed, short, int, short) > +TEST3(signed, short, long, short) > + > +TEST3(signed, int, char, short) > +TEST3(signed, int, short, char) > +TEST3(signed, int, long, char) > +TEST3(signed, int, long, short) > +TEST3(signed, int, long, int) > + > +TEST3(signed, long, char, short) > +TEST3(signed, long, short, char) > +TEST3(signed, long, char, int) > +TEST3(signed, long, int, char) > +TEST3(signed, long, short, int) > +TEST3(signed, long, int, short) >=20=20 > TEST1(unsigned, int) > TEST1(unsigned, short) > TEST1(unsigned, char) > +TEST1(unsigned, long) > + > +TEST2(unsigned, int, long) > + > +TEST2(unsigned, long, char) > +TEST2(unsigned, long, short) > +TEST2(unsigned, long, int) > +TEST2(unsigned, int, short) > +TEST2(unsigned, int, char) > +TEST2(unsigned, short, char) >=20=20 > TEST3(unsigned, char, int, short) > +TEST3(unsigned, char, long, short) > +TEST3(unsigned, char, int, long) > +TEST3(unsigned, char, long, int) > +TEST3(unsigned, char, short, char) > +TEST3(unsigned, char, int, char) > +TEST3(unsigned, char, long, char) > + > +TEST3(unsigned, short, int, char) > +TEST3(unsigned, short, long, char) > +TEST3(unsigned, short, int, long) > +TEST3(unsigned, short, long, int) > +TEST3(unsigned, short, char, short) > +TEST3(unsigned, short, int, short) > +TEST3(unsigned, short, long, short) > + > +TEST3(unsigned, int, char, short) > +TEST3(unsigned, int, short, char) > +TEST3(unsigned, int, char, long) > +TEST3(unsigned, int, long, char) > +TEST3(unsigned, int, short, long) > +TEST3(unsigned, int, long, short) > +TEST3(unsigned, int, char, int) > +TEST3(unsigned, int, short, int) > +TEST3(unsigned, int, long, int) > + > +TEST3(unsigned, long, char, short) > +TEST3(unsigned, long, short, char) > +TEST3(unsigned, long, char, int) > +TEST3(unsigned, long, int, char) > +TEST3(unsigned, long, short, int) > +TEST3(unsigned, long, int, short) > +TEST3(unsigned, long, char, long) > +TEST3(unsigned, long, short, long) > +TEST3(unsigned, long, int, long) >=20=20 > /* { dg-final { scan-assembler-not {\tsabd\t} } } */ > +/* { dg-final { scan-assembler-not {\tsabdl\t} } } */ > +/* { dg-final { scan-assembler-not {\tsabdl2\t} } } */ > /* { dg-final { scan-assembler-not {\tuabd\t} } } */ > +/* { dg-final { scan-assembler-not {\tuabdl\t} } } */ > +/* { dg-final { scan-assembler-not {\tuabdl2\t} } } */