From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 141EF3858C53 for ; Thu, 2 Feb 2023 14:55:41 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 141EF3858C53 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E4F7DC14 for ; Thu, 2 Feb 2023 06:56:22 -0800 (PST) Received: from localhost (e121540-lin.manchester.arm.com [10.32.99.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 6900C3F64C for ; Thu, 2 Feb 2023 06:55:40 -0800 (PST) From: Richard Sandiford To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, richard.sandiford@arm.com Subject: [pushed] rtl-ssa: Extend m_num_defs to a full unsigned int [PR108086] Date: Thu, 02 Feb 2023 14:55:39 +0000 Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-Spam-Status: No, score=-36.1 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_NONE,KAM_DMARC_STATUS,KAM_LAZY_DOMAIN_SECURITY,SPF_HELO_NONE,SPF_NONE,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: insn_info tried to save space by storing the number of definitions in a 16-bit bitfield. The justification was: // ... FIRST_PSEUDO_REGISTER + 1 // is the maximum number of accesses to hard registers and memory, and // MAX_RECOG_OPERANDS is the maximum number of pseudos that can be // defined by an instruction, so the number of definitions should fit // easily in 16 bits. But while that reasoning holds (I think) for real instructions, it doesn't hold for artificial instructions. I don't think there's any sensible higher limit we can use, so this patch goes for a full unsigned int. Tested on aarch64-linux-gnu. Pushed (as obvious) to trunk so far, will backport to GCC 12 and GCC 11 too. Richard gcc/ PR rtl-optimization/108086 * rtl-ssa/insns.h (insn_info): Make m_num_defs a full unsigned int. Adjust size-related commentary accordingly. --- gcc/rtl-ssa/insns.h | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/gcc/rtl-ssa/insns.h b/gcc/rtl-ssa/insns.h index ffaf22d4b8e..a604fe295cd 100644 --- a/gcc/rtl-ssa/insns.h +++ b/gcc/rtl-ssa/insns.h @@ -141,7 +141,7 @@ using insn_call_clobbers_tree = default_splay_tree; // of "notes", a bit like REG_NOTES for the underlying RTL insns. class insn_info { - // Size: 8 LP64 words. + // Size: 9 LP64 words. friend class ebb_info; friend class function_info; @@ -401,10 +401,11 @@ private: // The number of definitions and the number uses. FIRST_PSEUDO_REGISTER + 1 // is the maximum number of accesses to hard registers and memory, and // MAX_RECOG_OPERANDS is the maximum number of pseudos that can be - // defined by an instruction, so the number of definitions should fit - // easily in 16 bits. + // defined by an instruction, so the number of definitions in a real + // instruction should fit easily in 16 bits. However, there are no + // limits on the number of definitions in artifical instructions. unsigned int m_num_uses; - unsigned int m_num_defs : 16; + unsigned int m_num_defs; // Flags returned by the accessors above. unsigned int m_is_debug_insn : 1; @@ -414,7 +415,7 @@ private: unsigned int m_has_volatile_refs : 1; // For future expansion. - unsigned int m_spare : 11; + unsigned int m_spare : 27; // The program point at which the instruction occurs. // @@ -431,6 +432,9 @@ private: // instruction. mutable int m_cost_or_uid; + // On LP64 systems, there's a gap here that could be used for future + // expansion. + // The list of notes that have been attached to the instruction. insn_note *m_first_note; }; -- 2.25.1