From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 7BEC33858C60 for ; Wed, 1 Dec 2021 13:25:08 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 7BEC33858C60 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 18B776D; Wed, 1 Dec 2021 05:25:08 -0800 (PST) Received: from localhost (e121540-lin.manchester.arm.com [10.32.98.88]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 969C33F5A1; Wed, 1 Dec 2021 05:25:07 -0800 (PST) From: Richard Sandiford To: Richard Biener via Gcc-patches Mail-Followup-To: Richard Biener via Gcc-patches , Richard Biener , richard.sandiford@arm.com Subject: Re: [PATCH] vect: Tighten check for SLP memory groups [PR103517] References: Date: Wed, 01 Dec 2021 13:25:06 +0000 In-Reply-To: (Richard Biener via Gcc-patches's message of "Wed, 1 Dec 2021 14:14:32 +0100") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-Spam-Status: No, score=-12.4 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 01 Dec 2021 13:25:10 -0000 Richard Biener via Gcc-patches writes: > On Wed, Dec 1, 2021 at 11:56 AM Richard Sandiford via Gcc-patches > wrote: >> >> When checking for compatible stmts, vect_build_slp_tree_1 did: >> >> && !(STMT_VINFO_GROUPED_ACCESS (stmt_info) >> && (first_stmt_code == ARRAY_REF >> || first_stmt_code == BIT_FIELD_REF >> || first_stmt_code == INDIRECT_REF >> || first_stmt_code == COMPONENT_REF >> || first_stmt_code == MEM_REF))) >> >> That is, it allowed any rhs_code as long as the first_stmt_code >> looked valid. This had the effect of allowing IFN_MASK_LOAD >> to be paired with an earlier non-call code (but didn't allow >> the reverse). >> >> This patch makes the check symmetrical. >> >> Still testing on x86_64-linux-gnu. OK if testing passes, or doesn't >> this seem like the right approach? > > It's indeed a too weak comparison of the classification of the first > and the followup operands, some larger refactoring is probably > needed to improve here (note how we compare STMT_VINFO_GROUPED_ACCESS > of the followup against the tree codes of the first stmt but also later > compare first_stmt_load_p against load_p). > > The proposed patch looks reasonable (but then we could drop > the STMT_VINFO_GROUPED_ACCESS (stmt_info) part of the check?), Yeah, was wondering about that. Seemed safer to keep it, since without it we might pair non-memory BIT_FIELD_REFs with other things. I guess the same goes for the first stmt though, and the mismatch ought to be caught later anyway. > so OK. Thanks, Richard > Thanks, > Richard. > >> Richard >> >> >> gcc/ >> PR tree-optimization/103517 >> * tree-vect-slp.c (vect_build_slp_tree_1): When allowing two >> different component references, check the codes of both them, >> rather than just the first. >> >> gcc/testsuite/ >> PR tree-optimization/103517 >> * gcc.dg/vect/pr103517.c: New test. >> --- >> gcc/testsuite/gcc.dg/vect/pr103517.c | 13 +++++++++++++ >> gcc/tree-vect-slp.c | 7 ++++++- >> 2 files changed, 19 insertions(+), 1 deletion(-) >> create mode 100644 gcc/testsuite/gcc.dg/vect/pr103517.c >> >> diff --git a/gcc/testsuite/gcc.dg/vect/pr103517.c b/gcc/testsuite/gcc.dg/vect/pr103517.c >> new file mode 100644 >> index 00000000000..de87fc48f84 >> --- /dev/null >> +++ b/gcc/testsuite/gcc.dg/vect/pr103517.c >> @@ -0,0 +1,13 @@ >> +/* { dg-do compile } */ >> +/* { dg-additional-options "-march=skylake-avx512" { target x86_64-*-* i?86-*-* } } */ >> + >> +int a; >> +short b, c; >> +extern short d[]; >> +void e() { >> + for (short f = 1; f < (short)a; f += 2) >> + if (d[f + 1]) { >> + b = d[f]; >> + c = d[f + 1]; >> + } >> +} >> diff --git a/gcc/tree-vect-slp.c b/gcc/tree-vect-slp.c >> index 7bff5118bd0..bc22ffeed82 100644 >> --- a/gcc/tree-vect-slp.c >> +++ b/gcc/tree-vect-slp.c >> @@ -1121,7 +1121,12 @@ vect_build_slp_tree_1 (vec_info *vinfo, unsigned char *swap, >> || first_stmt_code == BIT_FIELD_REF >> || first_stmt_code == INDIRECT_REF >> || first_stmt_code == COMPONENT_REF >> - || first_stmt_code == MEM_REF))) >> + || first_stmt_code == MEM_REF) >> + && (rhs_code == ARRAY_REF >> + || rhs_code == BIT_FIELD_REF >> + || rhs_code == INDIRECT_REF >> + || rhs_code == COMPONENT_REF >> + || rhs_code == MEM_REF))) >> || first_stmt_load_p != load_p >> || first_stmt_phi_p != phi_p) >> { >> -- >> 2.25.1 >>