From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id DA61B3858C2A for ; Sun, 2 Jul 2023 08:58:02 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org DA61B3858C2A Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 333E32F4; Sun, 2 Jul 2023 01:58:45 -0700 (PDT) Received: from localhost (e121540-lin.manchester.arm.com [10.32.110.72]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id AAA1B3F64C; Sun, 2 Jul 2023 01:58:01 -0700 (PDT) From: Richard Sandiford To: Kewen Lin Mail-Followup-To: Kewen Lin ,gcc-patches@gcc.gnu.org, richard.guenther@gmail.com, segher@kernel.crashing.org, bergner@linux.ibm.com, richard.sandiford@arm.com Cc: gcc-patches@gcc.gnu.org, richard.guenther@gmail.com, segher@kernel.crashing.org, bergner@linux.ibm.com Subject: Re: [PATCH 4/9] vect: Adjust vectorizable_load costing on VMAT_ELEMENTWISE and VMAT_STRIDED_SLP References: <0281a2a022869efe379130aea6e0782e4827ef61.1686573640.git.linkw@linux.ibm.com> Date: Sun, 02 Jul 2023 09:58:00 +0100 In-Reply-To: <0281a2a022869efe379130aea6e0782e4827ef61.1686573640.git.linkw@linux.ibm.com> (Kewen Lin's message of "Mon, 12 Jun 2023 21:03:25 -0500") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-Spam-Status: No, score=-21.2 required=5.0 tests=BAYES_00,KAM_DMARC_NONE,KAM_DMARC_STATUS,KAM_LAZY_DOMAIN_SECURITY,SPF_HELO_NONE,SPF_NONE,TXREP,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Kewen Lin writes: > @@ -9743,11 +9739,23 @@ vectorizable_load (vec_info *vinfo, > unsigned int n_groups = 0; > for (j = 0; j < ncopies; j++) > { > - if (nloads > 1) > + if (nloads > 1 && !costing_p) > vec_alloc (v, nloads); > gimple *new_stmt = NULL; > for (i = 0; i < nloads; i++) > { > + if (costing_p) > + { > + if (VECTOR_TYPE_P (ltype)) > + vect_get_load_cost (vinfo, stmt_info, 1, > + alignment_support_scheme, misalignment, > + false, &inside_cost, nullptr, cost_vec, > + cost_vec, true); > + else > + inside_cost += record_stmt_cost (cost_vec, 1, scalar_load, > + stmt_info, 0, vect_body); > + continue; > + } Just a note that this might make life harder for AArch64 costing. Strided SLP loads are still equivalent to vector loads for AArch64, since they happen on the FPR/vector side even if they have integral modes. But I agree this is more accurate from a general target-independent POV, especially given the relatively coarse-grain costing enum. So I think that's just something AArch64 will need to account for. Thanks, Richard