From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id ACCC83861030 for ; Wed, 23 Sep 2020 18:33:45 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org ACCC83861030 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=richard.sandiford@arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4F9E2113E; Wed, 23 Sep 2020 11:33:45 -0700 (PDT) Received: from localhost (e121540-lin.manchester.arm.com [10.32.98.126]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 7B7F13F718; Wed, 23 Sep 2020 11:33:44 -0700 (PDT) From: Richard Sandiford To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, nickc@redhat.com, richard.earnshaw@arm.com, ramana.radhakrishnan@arm.com, kyrylo.tkachov@arm.com, richard.sandiford@arm.com Cc: nickc@redhat.com, richard.earnshaw@arm.com, ramana.radhakrishnan@arm.com, kyrylo.tkachov@arm.com Subject: [PATCH] arm: Add a couple of extra stack-protector tests Date: Wed, 23 Sep 2020 19:33:42 +0100 Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 23 Sep 2020 18:33:47 -0000 These tests were inspired by the corresponding aarch64 ones that I just committed. They already pass. Tested on arm-linux-gnueabi, arm-linux-gnueabihf and armeb-eabi. OK for trunk? Richard gcc/testsuite/ * gcc.target/arm/stack-protector-5.c: New test. * gcc.target/arm/stack-protector-6.c: Likewise. --- .../gcc.target/arm/stack-protector-5.c | 21 +++++++++++++++++++ .../gcc.target/arm/stack-protector-6.c | 8 +++++++ 2 files changed, 29 insertions(+) create mode 100644 gcc/testsuite/gcc.target/arm/stack-protector-5.c create mode 100644 gcc/testsuite/gcc.target/arm/stack-protector-6.c diff --git a/gcc/testsuite/gcc.target/arm/stack-protector-5.c b/gcc/testsuite/gcc.target/arm/stack-protector-5.c new file mode 100644 index 00000000000..b808b11aa3d --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/stack-protector-5.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-fstack-protector-all -O2" } */ + +void __attribute__ ((noipa)) +f (void) +{ + volatile int x; + asm volatile ("" ::: + "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", + "r8", "r9", "r10", "r11", "r12", "r14"); +} + +/* The register clobbers above should not generate any single LDRs or STRs; + all registers should be pushed and popped using register lists. The only + STRs should therefore be those associated with the stack protector tests + themselves. + + Make sure the address of the canary is not spilled and reloaded, + since that would give the attacker an opportunity to change the + canary value. */ +/* { dg-final { scan-assembler-times {\tstr\t} 1 } } */ diff --git a/gcc/testsuite/gcc.target/arm/stack-protector-6.c b/gcc/testsuite/gcc.target/arm/stack-protector-6.c new file mode 100644 index 00000000000..f8eec878bd6 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/stack-protector-6.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target fpic } */ +/* { dg-options "-fstack-protector-all -O2 -fpic" } */ + +#include "stack-protector-5.c" + +/* See the comment in stack-protector-5.c. */ +/* { dg-final { scan-assembler-times {\tstr\t} 1 } } */