From 4af98a21e10547679a643eed85d51aa5d7d2510b Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Wed, 5 Aug 2020 12:56:41 +0100 Subject: [PATCH] aarch64: Add missing %z prefixes to LDP/STP patterns For LDP/STP Q, the memory operand might not be valid for "m", so we need to use %z instead of % in the asm template. This patch does that for all Ump LDP/STP patterns, regardless of whether it's strictly needed. This is needed to unbreak bootstrap. 2020-08-05 Richard Sandiford gcc/ * config/aarch64/aarch64.md (load_pair_sw_) (load_pair_dw_, load_pair_dw_tftf) (store_pair_sw_) (store_pair_dw_, store_pair_dw_tftf) (*load_pair_extendsidi2_aarch64) (*load_pair_zero_extendsidi2_aarch64): Use %z for the memory operand. * config/aarch64/aarch64-simd.md (load_pair) (vec_store_pair, load_pair) (vec_store_pair): Likewise. --- gcc/config/aarch64/aarch64-simd.md | 8 ++++---- gcc/config/aarch64/aarch64.md | 26 +++++++++++++------------- 2 files changed, 17 insertions(+), 17 deletions(-) diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md index 11ebf5b93c4..381a702eba0 100644 --- a/gcc/config/aarch64/aarch64-simd.md +++ b/gcc/config/aarch64/aarch64-simd.md @@ -187,7 +187,7 @@ (define_insn "load_pair" plus_constant (Pmode, XEXP (operands[1], 0), GET_MODE_SIZE (mode)))" - "ldp\\t%d0, %d2, %1" + "ldp\\t%d0, %d2, %z1" [(set_attr "type" "neon_ldp")] ) @@ -201,7 +201,7 @@ (define_insn "vec_store_pair" plus_constant (Pmode, XEXP (operands[0], 0), GET_MODE_SIZE (mode)))" - "stp\\t%d1, %d3, %0" + "stp\\t%d1, %d3, %z0" [(set_attr "type" "neon_stp")] ) @@ -215,7 +215,7 @@ (define_insn "load_pair" plus_constant (Pmode, XEXP (operands[1], 0), GET_MODE_SIZE (mode)))" - "ldp\\t%q0, %q2, %1" + "ldp\\t%q0, %q2, %z1" [(set_attr "type" "neon_ldp_q")] ) @@ -228,7 +228,7 @@ (define_insn "vec_store_pair" plus_constant (Pmode, XEXP (operands[0], 0), GET_MODE_SIZE (mode)))" - "stp\\t%q1, %q3, %0" + "stp\\t%q1, %q3, %z0" [(set_attr "type" "neon_stp_q")] ) diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index df780b86370..25d77256b96 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -1574,8 +1574,8 @@ (define_insn "load_pair_sw_" XEXP (operands[1], 0), GET_MODE_SIZE (mode)))" "@ - ldp\\t%w0, %w2, %1 - ldp\\t%s0, %s2, %1" + ldp\\t%w0, %w2, %z1 + ldp\\t%s0, %s2, %z1" [(set_attr "type" "load_8,neon_load1_2reg") (set_attr "arch" "*,fp")] ) @@ -1591,8 +1591,8 @@ (define_insn "load_pair_dw_" XEXP (operands[1], 0), GET_MODE_SIZE (mode)))" "@ - ldp\\t%x0, %x2, %1 - ldp\\t%d0, %d2, %1" + ldp\\t%x0, %x2, %z1 + ldp\\t%d0, %d2, %z1" [(set_attr "type" "load_16,neon_load1_2reg") (set_attr "arch" "*,fp")] ) @@ -1607,7 +1607,7 @@ (define_insn "load_pair_dw_tftf" plus_constant (Pmode, XEXP (operands[1], 0), GET_MODE_SIZE (TFmode)))" - "ldp\\t%q0, %q2, %1" + "ldp\\t%q0, %q2, %z1" [(set_attr "type" "neon_ldp_q") (set_attr "fp" "yes")] ) @@ -1624,8 +1624,8 @@ (define_insn "store_pair_sw_" XEXP (operands[0], 0), GET_MODE_SIZE (mode)))" "@ - stp\\t%w1, %w3, %0 - stp\\t%s1, %s3, %0" + stp\\t%w1, %w3, %z0 + stp\\t%s1, %s3, %z0" [(set_attr "type" "store_8,neon_store1_2reg") (set_attr "arch" "*,fp")] ) @@ -1641,8 +1641,8 @@ (define_insn "store_pair_dw_" XEXP (operands[0], 0), GET_MODE_SIZE (mode)))" "@ - stp\\t%x1, %x3, %0 - stp\\t%d1, %d3, %0" + stp\\t%x1, %x3, %z0 + stp\\t%d1, %d3, %z0" [(set_attr "type" "store_16,neon_store1_2reg") (set_attr "arch" "*,fp")] ) @@ -1657,7 +1657,7 @@ (define_insn "store_pair_dw_tftf" plus_constant (Pmode, XEXP (operands[0], 0), GET_MODE_SIZE (TFmode)))" - "stp\\t%q1, %q3, %0" + "stp\\t%q1, %q3, %z0" [(set_attr "type" "neon_stp_q") (set_attr "fp" "yes")] ) @@ -1790,7 +1790,7 @@ (define_insn "*load_pair_extendsidi2_aarch64" plus_constant (Pmode, XEXP (operands[1], 0), GET_MODE_SIZE (SImode)))" - "ldpsw\\t%0, %2, %1" + "ldpsw\\t%0, %2, %z1" [(set_attr "type" "load_8")] ) @@ -1819,8 +1819,8 @@ (define_insn "*load_pair_zero_extendsidi2_aarch64" XEXP (operands[1], 0), GET_MODE_SIZE (SImode)))" "@ - ldp\t%w0, %w2, %1 - ldp\t%s0, %s2, %1" + ldp\t%w0, %w2, %z1 + ldp\t%s0, %s2, %z1" [(set_attr "type" "load_8,neon_load1_2reg") (set_attr "arch" "*,fp")] ) -- 2.17.1