From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 3A0B03860006 for ; Wed, 14 Feb 2024 17:15:48 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 3A0B03860006 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=arm.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 3A0B03860006 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1707930950; cv=none; b=UxfwIj5MgPMqKAgLc9MCAS+hNkGjKlU84W5gVfQQW9NBoELCr3iP9lWH9y81qW0SnGGCNEMJHVR6PZY8vdMiQJVQc+ztYL8DrFaN09ewtsUQ4yDvAm29G49vK/hr3C0+MqVr3zcm0ra3PYZBa+igccIhj1NejCNbVlSwgqa845E= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1707930950; c=relaxed/simple; bh=lWb8qD2ZWHv0Bk3XO092ElU3v0LlEy0jrynuhhYAwzE=; h=From:To:Subject:Date:Message-ID:MIME-Version; b=GK8S7o8m4OaYdbWceVyO1yeaLdvmuxPVVqA71DZuS9Mj/8Jt3y5KCsewkfKHa9bYJH7IG2O4jrPpO/oatl2BMi992pMVLKnUOrovtb5WUWGAZCbOaTPFvLnFUEGKHS05VNh1b811VbfkCLcuSnX3PGhVlo3aBE+evk82EmtSVOc= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DACEA1FB; Wed, 14 Feb 2024 09:16:28 -0800 (PST) Received: from localhost (e121540-lin.manchester.arm.com [10.32.110.72]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A0D523F766; Wed, 14 Feb 2024 09:15:46 -0800 (PST) From: Richard Sandiford To: Ajit Agarwal Mail-Followup-To: Ajit Agarwal ,Alex Coplan , "Kewen.Lin" , Segher Boessenkool , David Edelsohn , Peter Bergner , Michael Meissner , gcc-patches , richard.sandiford@arm.com Cc: Alex Coplan , "Kewen.Lin" , Segher Boessenkool , David Edelsohn , Peter Bergner , Michael Meissner , gcc-patches Subject: Re: [PATCH V2] rs6000: New pass for replacement of adjacent loads fusion (lxv). References: <1043f073-45b7-4e8d-8dac-bba0aa3269c4@linux.ibm.com> Date: Wed, 14 Feb 2024 17:15:45 +0000 In-Reply-To: <1043f073-45b7-4e8d-8dac-bba0aa3269c4@linux.ibm.com> (Ajit Agarwal's message of "Wed, 14 Feb 2024 19:11:27 +0530") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-Spam-Status: No, score=-21.1 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_NONE,KAM_DMARC_STATUS,KAM_LAZY_DOMAIN_SECURITY,SPF_HELO_NONE,SPF_NONE,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Ajit Agarwal writes: >>> diff --git a/gcc/emit-rtl.cc b/gcc/emit-rtl.cc >>> index 1856fa4884f..ffc47a6eaa0 100644 >>> --- a/gcc/emit-rtl.cc >>> +++ b/gcc/emit-rtl.cc >>> @@ -921,7 +921,7 @@ validate_subreg (machine_mode omode, machine_mode imode, >>> return false; >>> >>> /* The subreg offset cannot be outside the inner object. */ >>> - if (maybe_ge (offset, isize)) >>> + if (maybe_gt (offset, isize)) >>> return false; >> >> Can you explain why this change is needed? >> > > This is required in rs6000 target where we generate the subreg > with offset 16 from OO mode (256 bit) to 128 bit vector modes. > Otherwise it segfaults. Could you go into more detail? Why does that subreg lead to a segfault? In itself, a 16-byte subreg at byte offset 16 into a 32-byte pair is pretty standard. AArch64 uses this too for its vector load/store pairs (and for structure pairs more generally). Thanks, Richard