From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id BA0593857C72 for ; Thu, 20 Jan 2022 10:45:56 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org BA0593857C72 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 63C4CED1; Thu, 20 Jan 2022 02:45:56 -0800 (PST) Received: from localhost (unknown [10.32.98.88]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A95B73F774; Thu, 20 Jan 2022 02:45:55 -0800 (PST) From: Richard Sandiford To: "Andre Vieira \(lists\)" Mail-Followup-To: "Andre Vieira \(lists\)" , Christophe Lyon , gcc-patches@gcc.gnu.org, Kyrylo Tkachov , richard.sandiford@arm.com Cc: Christophe Lyon , gcc-patches@gcc.gnu.org, Kyrylo Tkachov Subject: Re: [PATCH v3 06/15] arm: Fix mve_vmvnq_n_ argument mode References: <20220113145645.4077141-1-christophe.lyon@foss.st.com> <20220113145645.4077141-7-christophe.lyon@foss.st.com> Date: Thu, 20 Jan 2022 10:45:54 +0000 In-Reply-To: (Andre Vieira's message of "Wed, 19 Jan 2022 19:03:05 +0000") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-Spam-Status: No, score=-12.4 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 20 Jan 2022 10:45:58 -0000 "Andre Vieira (lists)" writes: > On 13/01/2022 14:56, Christophe Lyon via Gcc-patches wrote: >> The vmvnq_n* intrinsics and have [u]int[16|32]_t arguments, so use >> iterator instead of HI in mve_vmvnq_n_. >> >> 2022-01-13 Christophe Lyon >> >> gcc/ >> * config/arm/mve.md (mve_vmvnq_n_): Use V_elem mode >> for operand 1. >> >> diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md >> index 171dd384133..5c3b34dce3a 100644 >> --- a/gcc/config/arm/mve.md >> +++ b/gcc/config/arm/mve.md >> @@ -617,7 +617,7 @@ (define_insn "mve_vcvtaq_" >> (define_insn "mve_vmvnq_n_" >> [ >> (set (match_operand:MVE_5 0 "s_register_operand" "=w") >> - (unspec:MVE_5 [(match_operand:HI 1 "immediate_operand" "i")] >> + (unspec:MVE_5 [(match_operand: 1 "immediate_operand" "i")] >> VMVNQ_N)) >> ] >> "TARGET_HAVE_MVE" > > While fixing this it might be good to fix the constraint and predicate > inspired by "DL" and "neon_inv_logic_op2" respectively. This would avoid > the compiler generating wrong assembly, and instead it would probably > lead to the compiler using a load literal. FWIW: for cases like this, I think it's better to define a predicate only (not a constraint). By design, the only time that constraints are used independently of predicates is during RA, and there's nothing that RA can/should do for immediate operands. Thanks, Richard