From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id EA5DC3858C60 for ; Fri, 15 Oct 2021 14:50:01 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org EA5DC3858C60 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7B6AA147A; Fri, 15 Oct 2021 07:50:01 -0700 (PDT) Received: from localhost (unknown [10.32.98.88]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0454D3F66F; Fri, 15 Oct 2021 07:50:00 -0700 (PDT) From: Richard Sandiford To: Christophe Lyon via Gcc-patches Mail-Followup-To: Christophe Lyon via Gcc-patches , Christophe Lyon , richard.sandiford@arm.com Subject: Re: [PATCH v2 03/14] arm: Add tests for PR target/101325 References: <20211013101554.2732342-1-christophe.lyon@foss.st.com> <20211013101554.2732342-4-christophe.lyon@foss.st.com> Date: Fri, 15 Oct 2021 15:49:59 +0100 In-Reply-To: <20211013101554.2732342-4-christophe.lyon@foss.st.com> (Christophe Lyon via Gcc-patches's message of "Wed, 13 Oct 2021 12:15:23 +0200") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_NUMSUBJECT, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 15 Oct 2021 14:50:03 -0000 Christophe Lyon via Gcc-patches writes: > These tests are derived from the one provided in the PR: there is a > compile-only test because I did not have access to anything that could > execute MVE code until recently. > I have been able to add an executable test since QEMU supports MVE. > > Instead of adding arm_v8_1m_mve_hw, I update arm_mve_hw so that it > uses add_options_for_arm_v8_1m_mve_fp, like arm_neon_hw does. This > ensures arm_mve_hw passes even if the toolchain does not generate MVE > code by default. > > 2021-10-13 Christophe Lyon > > gcc/testsuite/ > PR target/101325 > * gcc.target/arm/simd/pr101325.c: New. > * gcc.target/arm/simd/pr101325-2.c: New. > * lib/target-supports.exp (check_effective_target_arm_mve_hw): Use > add_options_for_arm_v8_1m_mve_fp. > > add executable test and update check_effective_target_arm_mve_hw > > diff --git a/gcc/testsuite/gcc.target/arm/simd/pr101325-2.c b/gcc/testsuite/gcc.target/arm/simd/pr101325-2.c > new file mode 100644 > index 00000000000..7907a386385 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/arm/simd/pr101325-2.c > @@ -0,0 +1,19 @@ > +/* { dg-do run } */ > +/* { dg-require-effective-target arm_mve_hw } */ > +/* { dg-options "-O3" } */ > +/* { dg-add-options arm_v8_1m_mve } */ > + > +#include > + > + > +__attribute((noinline,noipa)) Very minor, but: noinline is redundant with noipa. Richard > +unsigned foo(int8x16_t v, int8x16_t w) > +{ > + return vcmpeqq (v, w); > +} > + > +int main(void) > +{ > + if (foo (vdupq_n_s8(0), vdupq_n_s8(0)) != 0xffffU) > + __builtin_abort (); > +} > diff --git a/gcc/testsuite/gcc.target/arm/simd/pr101325.c b/gcc/testsuite/gcc.target/arm/simd/pr101325.c > new file mode 100644 > index 00000000000..a466683a0b1 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/arm/simd/pr101325.c > @@ -0,0 +1,14 @@ > +/* { dg-do compile } */ > +/* { dg-require-effective-target arm_v8_1m_mve_ok } */ > +/* { dg-add-options arm_v8_1m_mve } */ > +/* { dg-additional-options "-O3" } */ > + > +#include > + > +unsigned foo(int8x16_t v, int8x16_t w) > +{ > + return vcmpeqq (v, w); > +} > +/* { dg-final { scan-assembler {\tvcmp.i8 eq} } } */ > +/* { dg-final { scan-assembler {\tvmrs\t r[0-9]+, P0} } } */ > +/* { dg-final { scan-assembler {\tuxth} } } */ > diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp > index e030e4f376b..b0e35b602af 100644 > --- a/gcc/testsuite/lib/target-supports.exp > +++ b/gcc/testsuite/lib/target-supports.exp > @@ -4889,6 +4889,7 @@ proc check_effective_target_arm_cmse_hw { } { > } > } "-mcmse -Wl,--section-start,.gnu.sgstubs=0x00400000"] > } > + > # Return 1 if the target supports executing MVE instructions, 0 > # otherwise. > > @@ -4904,7 +4905,7 @@ proc check_effective_target_arm_mve_hw {} { > : "0" (a), "r" (b)); > return (a != 2); > } > - } ""] > + } [add_options_for_arm_v8_1m_mve_fp ""]] > } > > # Return 1 if this is an ARM target where ARMv8-M Security Extensions with