From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 11BAF3858D28 for ; Fri, 24 Nov 2023 12:05:23 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 11BAF3858D28 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=arm.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 11BAF3858D28 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1700827524; cv=none; b=xocp9d4OTVkEhyd4I7dJLYgmv3+7c3/hCEaY0SZ3cS7jT+2yEX49Hli8YhQP5OGsHv74pryw3nMIvDjqtxd0ldRWqIJoMTS7jjdcd2Prz7/0vRt2nXGj1Dgah0uI79Zkmue4FcjPDEzpjmzsjfGotMr9g9dRvoJFO9Avt7ef9Ow= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1700827524; c=relaxed/simple; bh=9DeglVBJdlbEWRRaEs9uMLThlOTmbgjardE+v76KF3Y=; h=From:To:Subject:Date:Message-ID:MIME-Version; b=ny47fn4/gDnN7F3lZhCMy3WM/nhx7WxJrs28MYNFx5VnACppemOXEZAOJ7bQutYgMidH+aCjYXNEyzZkiJSsC5ylQxamEToePDPZQ5gxQq9YfGg/LZVOLhF61DnQvizXOsReRAA7Duq1OKh6VFKeOD35c6I24pPcW7FeFuwseV0= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 453B41063; Fri, 24 Nov 2023 04:06:09 -0800 (PST) Received: from localhost (e121540-lin.manchester.arm.com [10.32.110.72]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 21C3F3F7A6; Fri, 24 Nov 2023 04:05:22 -0800 (PST) From: Richard Sandiford To: Victor Do Nascimento Mail-Followup-To: Victor Do Nascimento ,, , , richard.sandiford@arm.com Cc: , , Subject: Re: [PATCH 4/5] aarch64: rcpc3: add Neon ACLE wrapper functions to `arm_neon.h' References: <20231109141300.3542453-1-victor.donascimento@arm.com> <20231109141300.3542453-5-victor.donascimento@arm.com> Date: Fri, 24 Nov 2023 12:05:20 +0000 In-Reply-To: <20231109141300.3542453-5-victor.donascimento@arm.com> (Victor Do Nascimento's message of "Thu, 9 Nov 2023 14:12:47 +0000") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-Spam-Status: No, score=-22.6 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_NONE,KAM_DMARC_STATUS,KAM_LAZY_DOMAIN_SECURITY,SPF_HELO_NONE,SPF_NONE,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Victor Do Nascimento writes: > Create the necessary mappings from the ACLE-defined Neon intrinsics > names[1] to the internal builtin function names. > > [1] https://arm-software.github.io/acle/neon_intrinsics/advsimd.html > > gcc/ChangeLog: > > * gcc/config/aarch64/arm_neon.h (vldap1_lane_u64): New. > (vldap1q_lane_u64): Likewise. > (vldap1_lane_s64): Likewise. > (vldap1q_lane_s64): Likewise. > (vldap1_lane_f64): Likewise. > (vldap1q_lane_f64): Likewise. > (vldap1_lane_p64): Likewise. > (vldap1q_lane_p64): Likewise. > (vstl1_lane_u64): Likewise. > (vstl1q_lane_u64): Likewise. > (vstl1_lane_s64): Likewise. > (vstl1q_lane_s64): Likewise. > (vstl1_lane_f64): Likewise. > (vstl1q_lane_f64): Likewise. > (vstl1_lane_p64): Likewise. > (vstl1q_lane_p64): Likewise. OK, thanks. Richard > --- > gcc/config/aarch64/arm_neon.h | 129 ++++++++++++++++++++++++++++++++++ > 1 file changed, 129 insertions(+) > > diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h > index 349f3167699..ef0d75e07ce 100644 > --- a/gcc/config/aarch64/arm_neon.h > +++ b/gcc/config/aarch64/arm_neon.h > @@ -13446,6 +13446,135 @@ vld1q_lane_u64 (const uint64_t *__src, uint64x2_t __vec, const int __lane) > return __aarch64_vset_lane_any (*__src, __vec, __lane); > } > > +#pragma GCC push_options > +#pragma GCC target ("+nothing+rcpc3+simd") > + > +/* vldap1_lane. */ > + > +__extension__ extern __inline uint64x1_t > +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > +vldap1_lane_u64 (const uint64_t *__src, uint64x1_t __vec, const int __lane) > +{ > + return __builtin_aarch64_vec_ldap1_lanev1di_usus ( > + (__builtin_aarch64_simd_di *) __src, __vec, __lane); > +} > + > +__extension__ extern __inline uint64x2_t > +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > +vldap1q_lane_u64 (const uint64_t *__src, uint64x2_t __vec, const int __lane) > +{ > + return __builtin_aarch64_vec_ldap1_lanev2di_usus ( > + (__builtin_aarch64_simd_di *) __src, __vec, __lane); > +} > + > +__extension__ extern __inline int64x1_t > +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > +vldap1_lane_s64 (const int64_t *__src, int64x1_t __vec, const int __lane) > +{ > + return __builtin_aarch64_vec_ldap1_lanev1di (__src, __vec, __lane); > +} > + > +__extension__ extern __inline int64x2_t > +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > +vldap1q_lane_s64 (const int64_t *__src, int64x2_t __vec, const int __lane) > +{ > + return __builtin_aarch64_vec_ldap1_lanev2di (__src, __vec, __lane); > +} > + > +__extension__ extern __inline float64x1_t > +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > +vldap1_lane_f64 (const float64_t *__src, float64x1_t __vec, const int __lane) > +{ > + return __builtin_aarch64_vec_ldap1_lanev1df (__src, __vec, __lane); > +} > + > +__extension__ extern __inline float64x2_t > +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > +vldap1q_lane_f64 (const float64_t *__src, float64x2_t __vec, const int __lane) > +{ > + return __builtin_aarch64_vec_ldap1_lanev2df (__src, __vec, __lane); > +} > + > +__extension__ extern __inline poly64x1_t > +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > +vldap1_lane_p64 (const poly64_t *__src, poly64x1_t __vec, const int __lane) > +{ > + return __builtin_aarch64_vec_ldap1_lanev1di_psps ( > + (__builtin_aarch64_simd_di *) __src, __vec, __lane); > +} > + > +__extension__ extern __inline poly64x2_t > +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > +vldap1q_lane_p64 (const poly64_t *__src, poly64x2_t __vec, const int __lane) > +{ > + return __builtin_aarch64_vec_ldap1_lanev2di_psps ( > + (__builtin_aarch64_simd_di *) __src, __vec, __lane); > +} > + > +/* vstl1_lane. */ > + > +__extension__ extern __inline void > +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > +vstl1_lane_u64 (const uint64_t *__src, uint64x1_t __vec, const int __lane) > +{ > + __builtin_aarch64_vec_stl1_lanev1di_sus ((__builtin_aarch64_simd_di *) __src, > + __vec, __lane); > +} > + > +__extension__ extern __inline void > +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > +vstl1q_lane_u64 (uint64_t *__src, uint64x2_t __vec, const int __lane) > +{ > + __builtin_aarch64_vec_stl1_lanev2di_sus ((__builtin_aarch64_simd_di *) __src, > + __vec, __lane); > +} > + > +__extension__ extern __inline void > +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > +vstl1_lane_s64 (int64_t *__src, int64x1_t __vec, const int __lane) > +{ > + __builtin_aarch64_vec_stl1_lanev1di (__src, __vec, __lane); > +} > + > +__extension__ extern __inline void > +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > +vstl1q_lane_s64 (int64_t *__src, int64x2_t __vec, const int __lane) > +{ > + __builtin_aarch64_vec_stl1_lanev2di (__src, __vec, __lane); > +} > + > +__extension__ extern __inline void > +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > +vstl1_lane_f64 (float64_t *__src, float64x1_t __vec, const int __lane) > +{ > + __builtin_aarch64_vec_stl1_lanev1df (__src, __vec, __lane); > +} > + > +__extension__ extern __inline void > +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > +vstl1q_lane_f64 (float64_t *__src, float64x2_t __vec, const int __lane) > +{ > + __builtin_aarch64_vec_stl1_lanev2df (__src, __vec, __lane); > +} > + > +__extension__ extern __inline void > +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > +vstl1_lane_p64 (poly64_t *__src, poly64x1_t __vec, const int __lane) > +{ > + __builtin_aarch64_vec_stl1_lanev1di_sps ((__builtin_aarch64_simd_di *) __src, > + __vec, __lane); > +} > + > +__extension__ extern __inline void > +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > +vstl1q_lane_p64 (poly64_t *__src, poly64x2_t __vec, const int __lane) > +{ > + __builtin_aarch64_vec_stl1_lanev2di_sps ((__builtin_aarch64_simd_di *) __src, > + __vec, __lane); > +} > + > +#pragma GCC pop_options > + > /* vldn */ > > __extension__ extern __inline int64x1x2_t