From: Richard Sandiford <richard.sandiford@arm.com>
To: gcc-patches@gcc.gnu.org
Subject: [PATCH 07/17] aarch64: Remove AARCH64_FL_RCPC8_4 [PR107025]
Date: Thu, 29 Sep 2022 11:40:53 +0100 [thread overview]
Message-ID: <mptv8p6sbt6.fsf@arm.com> (raw)
In-Reply-To: <mptr0zutqgg.fsf@arm.com> (Richard Sandiford's message of "Thu, 29 Sep 2022 11:39:11 +0100")
AARCH64_FL_RCPC8_4 is an odd-one-out in that it has no associated
entry in aarch64-option-extensions.def. This means that, although
it is internally separated from AARCH64_FL_V8_4A, there is no
mechanism for turning it on and off individually, independently
of armv8.4-a.
The only place that the flag was used independently was in the
entry for thunderx3t110, which enabled it alongside V8_3A.
As noted in PR107025, this means that any use of the extension
will fail to assemble.
In the PR trail, Andrew suggested removing the core entry.
That might be best long-term, but since the barrier for removing
command-line options without a deprecation period is very high,
this patch instead just drops the flag from the core entry.
We'll still produce correct code.
gcc/
PR target/107025
* config/aarch64/aarch64.h (oAARCH64_FL_RCPC8_4): Delete.
(AARCH64_FL_FOR_V8_4A): Update accordingly.
(AARCH64_ISA_RCPC8_4): Use AARCH64_FL_V8_4A directly.
* config/aarch64/aarch64-cores.def (thunderx3t110): Remove
AARCH64_FL_RCPC8_4.
---
gcc/config/aarch64/aarch64-cores.def | 2 +-
gcc/config/aarch64/aarch64.h | 5 ++---
2 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def
index 008b0b8c177..cf500d0a981 100644
--- a/gcc/config/aarch64/aarch64-cores.def
+++ b/gcc/config/aarch64/aarch64-cores.def
@@ -133,7 +133,7 @@ AARCH64_CORE("tsv110", tsv110, tsv110, V8_2A, AARCH64_FL_CRYPTO | AARCH64_FL_F
/* ARMv8.3-A Architecture Processors. */
/* Marvell cores (TX3). */
-AARCH64_CORE("thunderx3t110", thunderx3t110, thunderx3t110, V8_3A, AARCH64_FL_CRYPTO | AARCH64_FL_RCPC | AARCH64_FL_SM4 | AARCH64_FL_SHA3 | AARCH64_FL_F16FML | AARCH64_FL_RCPC8_4, thunderx3t110, 0x43, 0x0b8, 0x0a)
+AARCH64_CORE("thunderx3t110", thunderx3t110, thunderx3t110, V8_3A, AARCH64_FL_CRYPTO | AARCH64_FL_RCPC | AARCH64_FL_SM4 | AARCH64_FL_SHA3 | AARCH64_FL_F16FML, thunderx3t110, 0x43, 0x0b8, 0x0a)
/* ARMv8.4-A Architecture Processors. */
diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
index c275548b18e..8ea8e2a3913 100644
--- a/gcc/config/aarch64/aarch64.h
+++ b/gcc/config/aarch64/aarch64.h
@@ -173,7 +173,6 @@
#define AARCH64_FL_SM4 (1 << 17) /* Has ARMv8.4-A SM3 and SM4. */
#define AARCH64_FL_SHA3 (1 << 18) /* Has ARMv8.4-a SHA3 and SHA512. */
#define AARCH64_FL_F16FML (1 << 19) /* Has ARMv8.4-a FP16 extensions. */
-#define AARCH64_FL_RCPC8_4 (1 << 20) /* Has ARMv8.4-a RCPC extensions. */
/* Statistical Profiling extensions. */
#define AARCH64_FL_PROFILE (1 << 21)
@@ -265,7 +264,7 @@
(AARCH64_FL_FOR_V8_2A | AARCH64_FL_V8_3A | AARCH64_FL_PAUTH)
#define AARCH64_FL_FOR_V8_4A \
(AARCH64_FL_FOR_V8_3A | AARCH64_FL_V8_4A | AARCH64_FL_F16FML \
- | AARCH64_FL_DOTPROD | AARCH64_FL_RCPC8_4 | AARCH64_FL_FLAGM)
+ | AARCH64_FL_DOTPROD | AARCH64_FL_FLAGM)
#define AARCH64_FL_FOR_V8_5A \
(AARCH64_FL_FOR_V8_4A | AARCH64_FL_V8_5A \
| AARCH64_FL_SB | AARCH64_FL_SSBS | AARCH64_FL_PREDRES)
@@ -313,7 +312,7 @@
#define AARCH64_ISA_SM4 (aarch64_isa_flags & AARCH64_FL_SM4)
#define AARCH64_ISA_SHA3 (aarch64_isa_flags & AARCH64_FL_SHA3)
#define AARCH64_ISA_F16FML (aarch64_isa_flags & AARCH64_FL_F16FML)
-#define AARCH64_ISA_RCPC8_4 (aarch64_isa_flags & AARCH64_FL_RCPC8_4)
+#define AARCH64_ISA_RCPC8_4 (aarch64_isa_flags & AARCH64_FL_V8_4A)
#define AARCH64_ISA_RNG (aarch64_isa_flags & AARCH64_FL_RNG)
#define AARCH64_ISA_V8_5A (aarch64_isa_flags & AARCH64_FL_V8_5A)
#define AARCH64_ISA_TME (aarch64_isa_flags & AARCH64_FL_TME)
--
2.25.1
next prev parent reply other threads:[~2022-09-29 10:40 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-29 10:39 [PATCH 00/17] Rework aarch64 feature macro definitions Richard Sandiford
2022-09-29 10:39 ` [PATCH 01/17] aarch64: Rename AARCH64_ISA architecture-level macros Richard Sandiford
2022-09-29 10:39 ` [PATCH 02/17] aarch64: Rename AARCH64_FL " Richard Sandiford
2022-09-29 10:40 ` [PATCH 03/17] aarch64: Rename AARCH64_FL_FOR_ARCH macros Richard Sandiford
2022-09-29 10:40 ` [PATCH 04/17] aarch64: Add "V" to aarch64-arches.def names Richard Sandiford
2022-09-29 10:40 ` [PATCH 05/17] aarch64: Small config.gcc cleanups Richard Sandiford
2022-09-29 10:40 ` [PATCH 06/17] aarch64: Avoid redundancy in aarch64-cores.def Richard Sandiford
2022-09-29 10:40 ` Richard Sandiford [this message]
2022-09-29 10:41 ` [PATCH 08/17] aarch64: Fix transitive closure of features Richard Sandiford
2022-09-29 10:41 ` [PATCH 09/17] aarch64: Reorder an entry in aarch64-option-extensions.def Richard Sandiford
2022-09-29 10:41 ` [PATCH 10/17] aarch64: Simplify feature definitions Richard Sandiford
2022-09-29 10:41 ` [PATCH 11/17] aarch64: Simplify generation of .arch strings Richard Sandiford
2022-09-29 10:41 ` [PATCH 12/17] aarch64: Avoid std::string in static data Richard Sandiford
2022-09-29 10:42 ` [PATCH 13/17] aarch64: Tweak constness of option-related data Richard Sandiford
2022-09-29 10:42 ` [PATCH 14/17] aarch64: Make more use of aarch64_feature_flags Richard Sandiford
2022-09-29 10:42 ` [PATCH 15/17] aarch64: Tweak contents of flags_on/off fields Richard Sandiford
2022-09-29 10:42 ` [PATCH 16/17] aarch64: Tweak handling of -mgeneral-regs-only Richard Sandiford
2022-09-29 10:43 ` [PATCH 17/17] aarch64: Remove redundant TARGET_* checks Richard Sandiford
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