From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id F0E97393F832 for ; Mon, 19 Jul 2021 09:34:09 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org F0E97393F832 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 802B56D; Mon, 19 Jul 2021 02:34:09 -0700 (PDT) Received: from localhost (e121540-lin.manchester.arm.com [10.32.98.126]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 083EE3F73D; Mon, 19 Jul 2021 02:34:08 -0700 (PDT) From: Richard Sandiford To: apinski--- via Gcc-patches Mail-Followup-To: apinski--- via Gcc-patches , apinski@marvell.com, richard.sandiford@arm.com Cc: apinski@marvell.com Subject: Re: [PATCH] [AARCH64] Fix PR 101205: csinv does not have an zero_extend version References: <1626543242-32226-1-git-send-email-apinski@marvell.com> Date: Mon, 19 Jul 2021 10:34:07 +0100 In-Reply-To: <1626543242-32226-1-git-send-email-apinski@marvell.com> (apinski's message of "Sat, 17 Jul 2021 10:34:02 -0700") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-Spam-Status: No, score=-12.4 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 19 Jul 2021 09:34:11 -0000 apinski--- via Gcc-patches writes: > From: Andrew Pinski > > So the problem is even though there was a csneg with > a zero_extend in the front, there was not one for csinv. > This fixes it by extending that pattern. > > OK? Bootstrapped and tested on aarch64-linux-gnu with no regressions. > > gcc/ChangeLog: > > PR target/101205 > * config/aarch64/aarch64.md (csneg3_uxtw_insn): Rename to ... > (*cs3_uxtw_insn4): and extend to NEG_NOT. > > gcc/testsuite/ChangeLog: > > PR target/101205 > * gcc.target/aarch64/csinv-neg-1.c: New test. OK, thanks. Richard > --- > gcc/config/aarch64/aarch64.md | 6 +- > .../gcc.target/aarch64/csinv-neg-1.c | 112 ++++++++++++++++++ > 2 files changed, 115 insertions(+), 3 deletions(-) > create mode 100644 gcc/testsuite/gcc.target/aarch64/csinv-neg-1.c > > diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md > index f12a0bebd3d..8cd259fca9c 100644 > --- a/gcc/config/aarch64/aarch64.md > +++ b/gcc/config/aarch64/aarch64.md > @@ -4203,15 +4203,15 @@ (define_insn "*csinv3_insn" > [(set_attr "type" "csel")] > ) > > -(define_insn "csneg3_uxtw_insn" > +(define_insn "*cs3_uxtw_insn4" > [(set (match_operand:DI 0 "register_operand" "=r") > (zero_extend:DI > (if_then_else:SI > (match_operand 1 "aarch64_comparison_operation" "") > - (neg:SI (match_operand:SI 2 "register_operand" "r")) > + (NEG_NOT:SI (match_operand:SI 2 "register_operand" "r")) > (match_operand:SI 3 "aarch64_reg_or_zero" "rZ"))))] > "" > - "csneg\\t%w0, %w3, %w2, %M1" > + "cs\\t%w0, %w3, %w2, %M1" > [(set_attr "type" "csel")] > ) > > diff --git a/gcc/testsuite/gcc.target/aarch64/csinv-neg-1.c b/gcc/testsuite/gcc.target/aarch64/csinv-neg-1.c > new file mode 100644 > index 00000000000..e528883198d > --- /dev/null > +++ b/gcc/testsuite/gcc.target/aarch64/csinv-neg-1.c > @@ -0,0 +1,112 @@ > +/* { dg-do compile } */ > +/* { dg-options "-O2" } */ > + > +/* > +** inv1: > +** cmp w0, 0 > +** csinv w0, w1, w2, ne > +** ret > +*/ > +unsigned long long > +inv1(unsigned a, unsigned b, unsigned c) > +{ > + unsigned t = a ? b : ~c; > + return t; > +} > + > +/* > +** inv1_local: > +** cmp w0, 0 > +** csinv w0, w1, w2, ne > +** ret > +*/ > +unsigned long long > +inv1_local(unsigned a, unsigned b, unsigned c) > +{ > + unsigned d = ~c; > + unsigned t = a ? b : d; > + return t; > +} > + > +/* > +** inv_zero1: > +** cmp w0, 0 > +** csinv w0, wzr, w1, ne > +** ret > +*/ > +unsigned long long > +inv_zero1(unsigned a, unsigned b) > +{ > + unsigned t = a ? 0 : ~b; > + return t; > +} > + > +/* > +** inv_zero2: > +** cmp w0, 0 > +** csinv w0, wzr, w1, eq > +** ret > +*/ > +unsigned long long > +inv_zero2(unsigned a, unsigned b) > +{ > + unsigned t = a ? ~b : 0; > + return t; > +} > + > + > +/* > +** inv2: > +** cmp w0, 0 > +** csinv w0, w2, w1, eq > +** ret > +*/ > +unsigned long long > +inv2(unsigned a, unsigned b, unsigned c) > +{ > + unsigned t = a ? ~b : c; > + return t; > +} > + > +/* > +** inv2_local: > +** cmp w0, 0 > +** csinv w0, w2, w1, eq > +** ret > +*/ > +unsigned long long > +inv2_local(unsigned a, unsigned b, unsigned c) > +{ > + unsigned d = ~b; > + unsigned t = a ? d : c; > + return t; > +} > + > +/* > +** neg1: > +** cmp w0, 0 > +** csneg w0, w1, w2, ne > +** ret > +*/ > +unsigned long long > +neg1(unsigned a, unsigned b, unsigned c) > +{ > + unsigned t = a ? b : -c; > + return t; > +} > + > + > +/* > +** neg2: > +** cmp w0, 0 > +** csneg w0, w2, w1, eq > +** ret > +*/ > +unsigned long long > +neg2(unsigned a, unsigned b, unsigned c) > +{ > + unsigned t = a ? -b : c; > + return t; > +} > + > +/* { dg-final { check-function-bodies "**" "" "" } } */