* [1/9] Simplify the implementation of HARD_REG_SET
2019-09-09 15:52 [0/9] Make HARD_REG_SETs easier to use Richard Sandiford
@ 2019-09-09 15:54 ` Richard Sandiford
2019-09-09 17:35 ` Jeff Law
2019-09-09 15:58 ` [2/9] Remove COPY_HARD_REG_SET Richard Sandiford
` (7 subsequent siblings)
8 siblings, 1 reply; 21+ messages in thread
From: Richard Sandiford @ 2019-09-09 15:54 UTC (permalink / raw)
To: gcc-patches
We have two styles of HARD_REG_SET: a single integer based on
HOST_WIDEST_FAST_INT (used when FIRST_PSEUDO_REGISTER is small enough)
or an array of integers. One of the nice properties of this arrangement
is that:
void foo (const HARD_REG_SET);
is passed by value as an integer when the set is small enough and
by reference otherwise.
(This is in constrast to "const HARD_REG_SET &", which would always
be passed by reference, and in contrast to passing a structure wrapper
like "struct s { T elts[1]; }" by value, where the structure might be
passed like a T or by reference, depending on the ABI.)
However, one of the disadvantages of using an array is that simple
assignment doesn't work. We need to use COPY_HARD_REG_SET instead.
This patch uses a structure wrapper around the array, and preserves
the above "nice property" using a new const_hard_reg_set typedef.
The patch also removes the manual unrolling for small array sizes;
I think these days we can rely on the compiler to do that for us.
This meant fixing two port-specific quirks:
- epiphany passed NULL as a HARD_REG_SET whose value doesn't matter.
The patch passes the NO_REGS set instead.
- ia64 reused TEST_HARD_REG_BIT and SET_HARD_REG_BIT for arrays that
are bigger than HARD_REG_SET. The patch just open-codes them.
The patch is probably being too conservative. Very few places actually
take advantage of the "nice property" above, and we could have a
cleaner interface if we used a structure wrapper for all cases.
2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* hard-reg-set.h (HARD_REG_SET): Define using a typedef rather
than a #define. Use a structure rather than an array as the
fallback definition. Remove special cases for low array sizes.
(const_hard_reg_set): New typedef.
(hard_reg_set_subset_p): Use it instead of "const HARD_REG_SET".
(hard_reg_set_equal_p, hard_reg_set_intersect_p): Likewise.
(hard_reg_set_empty_p): Likewise.
(SET_HARD_REG_BIT): Use a function rather than a macro to
handle the case in which HARD_REG_SET is a structure.
(CLEAR_HARD_REG_BIT, TEST_HARD_REG_BIT, CLEAR_HARD_REG_SET)
(SET_HARD_REG_SET, COPY_HARD_REG_SET, COMPL_HARD_REG_SET)
(AND_HARD_REG_SET, AND_COMPL_HARD_REG_SET, IOR_HARD_REG_SET)
(IOR_COMPL_HARD_REG_SET): Likewise.
(hard_reg_set_iterator::pset): Constify the pointer target.
(hard_reg_set_iter_init): Take a const_hard_reg_set instead
of a "const HARD_REG_SET". Update the handling of non-integer
HARD_REG_SETs.
* recog.h: Test HARD_CONST instead of CLEAR_HARD_REG_SET.
* reload.h: Likewise.
* rtl.h (choose_hard_reg_mode): Remove unnecessary line break.
* regs.h (in_hard_reg_set_p): Take a const_hard_reg_set instead
of a "const HARD_REG_SET".
(overlaps_hard_reg_set_p, range_overlaps_hard_reg_set_p): Likewise.
(range_in_hard_reg_set_p): Likewise.
* ira-costs.c (restrict_cost_classes): Likewise.
* shrink-wrap.c (move_insn_for_shrink_wrap): Likewise.
* config/epiphany/resolve-sw-modes.c (pass_resolve_sw_modes::execute):
Pass a NO_REGS HARD_REG_SET rather than NULL to emit_set_fp_mode.
* config/ia64/ia64.c (rws_insn): In the CHECKING_P version,
use unsigned HOST_WIDEST_FAST_INT rather than HARD_REG_ELT_TYPE.
(rws_insn_set, rws_insn_test): In the CHECKING_P version,
take an unsigned int and open-code the HARD_REG_SET operations.
Index: gcc/hard-reg-set.h
===================================================================
*** gcc/hard-reg-set.h 2019-09-09 16:53:27.837266363 +0100
--- gcc/hard-reg-set.h 2019-09-09 16:53:27.829266420 +0100
*************** typedef unsigned HOST_WIDEST_FAST_INT HA
*** 42,55 ****
#if FIRST_PSEUDO_REGISTER <= HOST_BITS_PER_WIDEST_FAST_INT
! #define HARD_REG_SET HARD_REG_ELT_TYPE
#else
#define HARD_REG_SET_LONGS \
((FIRST_PSEUDO_REGISTER + HOST_BITS_PER_WIDEST_FAST_INT - 1) \
/ HOST_BITS_PER_WIDEST_FAST_INT)
! typedef HARD_REG_ELT_TYPE HARD_REG_SET[HARD_REG_SET_LONGS];
#endif
--- 42,61 ----
#if FIRST_PSEUDO_REGISTER <= HOST_BITS_PER_WIDEST_FAST_INT
! typedef HARD_REG_ELT_TYPE HARD_REG_SET;
! typedef const HARD_REG_SET const_hard_reg_set;
#else
#define HARD_REG_SET_LONGS \
((FIRST_PSEUDO_REGISTER + HOST_BITS_PER_WIDEST_FAST_INT - 1) \
/ HOST_BITS_PER_WIDEST_FAST_INT)
!
! struct HARD_REG_SET
! {
! HARD_REG_ELT_TYPE elts[HARD_REG_SET_LONGS];
! };
! typedef const HARD_REG_SET &const_hard_reg_set;
#endif
*************** #define HARD_CONST(X) ((HARD_REG_ELT_TYP
*** 98,104 ****
#define UHOST_BITS_PER_WIDE_INT ((unsigned) HOST_BITS_PER_WIDEST_FAST_INT)
! #ifdef HARD_REG_SET
#define SET_HARD_REG_BIT(SET, BIT) \
((SET) |= HARD_CONST (1) << (BIT))
--- 104,110 ----
#define UHOST_BITS_PER_WIDE_INT ((unsigned) HOST_BITS_PER_WIDEST_FAST_INT)
! #if FIRST_PSEUDO_REGISTER <= HOST_BITS_PER_WIDEST_FAST_INT
#define SET_HARD_REG_BIT(SET, BIT) \
((SET) |= HARD_CONST (1) << (BIT))
*************** #define AND_HARD_REG_SET(TO, FROM) ((TO)
*** 119,513 ****
#define AND_COMPL_HARD_REG_SET(TO, FROM) ((TO) &= ~ (FROM))
static inline bool
! hard_reg_set_subset_p (const HARD_REG_SET x, const HARD_REG_SET y)
{
return (x & ~y) == HARD_CONST (0);
}
static inline bool
! hard_reg_set_equal_p (const HARD_REG_SET x, const HARD_REG_SET y)
{
return x == y;
}
static inline bool
! hard_reg_set_intersect_p (const HARD_REG_SET x, const HARD_REG_SET y)
{
return (x & y) != HARD_CONST (0);
}
static inline bool
! hard_reg_set_empty_p (const HARD_REG_SET x)
{
return x == HARD_CONST (0);
}
#else
! #define SET_HARD_REG_BIT(SET, BIT) \
! ((SET)[(BIT) / UHOST_BITS_PER_WIDE_INT] \
! |= HARD_CONST (1) << ((BIT) % UHOST_BITS_PER_WIDE_INT))
!
! #define CLEAR_HARD_REG_BIT(SET, BIT) \
! ((SET)[(BIT) / UHOST_BITS_PER_WIDE_INT] \
! &= ~(HARD_CONST (1) << ((BIT) % UHOST_BITS_PER_WIDE_INT)))
!
! #define TEST_HARD_REG_BIT(SET, BIT) \
! (!!((SET)[(BIT) / UHOST_BITS_PER_WIDE_INT] \
! & (HARD_CONST (1) << ((BIT) % UHOST_BITS_PER_WIDE_INT))))
!
! #if FIRST_PSEUDO_REGISTER <= 2*HOST_BITS_PER_WIDEST_FAST_INT
! #define CLEAR_HARD_REG_SET(TO) \
! do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
! scan_tp_[0] = 0; \
! scan_tp_[1] = 0; } while (0)
!
! #define SET_HARD_REG_SET(TO) \
! do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
! scan_tp_[0] = -1; \
! scan_tp_[1] = -1; } while (0)
!
! #define COPY_HARD_REG_SET(TO, FROM) \
! do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
! const HARD_REG_ELT_TYPE *scan_fp_ = (FROM); \
! scan_tp_[0] = scan_fp_[0]; \
! scan_tp_[1] = scan_fp_[1]; } while (0)
!
! #define COMPL_HARD_REG_SET(TO, FROM) \
! do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
! const HARD_REG_ELT_TYPE *scan_fp_ = (FROM); \
! scan_tp_[0] = ~ scan_fp_[0]; \
! scan_tp_[1] = ~ scan_fp_[1]; } while (0)
!
! #define AND_HARD_REG_SET(TO, FROM) \
! do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
! const HARD_REG_ELT_TYPE *scan_fp_ = (FROM); \
! scan_tp_[0] &= scan_fp_[0]; \
! scan_tp_[1] &= scan_fp_[1]; } while (0)
!
! #define AND_COMPL_HARD_REG_SET(TO, FROM) \
! do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
! const HARD_REG_ELT_TYPE *scan_fp_ = (FROM); \
! scan_tp_[0] &= ~ scan_fp_[0]; \
! scan_tp_[1] &= ~ scan_fp_[1]; } while (0)
!
! #define IOR_HARD_REG_SET(TO, FROM) \
! do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
! const HARD_REG_ELT_TYPE *scan_fp_ = (FROM); \
! scan_tp_[0] |= scan_fp_[0]; \
! scan_tp_[1] |= scan_fp_[1]; } while (0)
!
! #define IOR_COMPL_HARD_REG_SET(TO, FROM) \
! do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
! const HARD_REG_ELT_TYPE *scan_fp_ = (FROM); \
! scan_tp_[0] |= ~ scan_fp_[0]; \
! scan_tp_[1] |= ~ scan_fp_[1]; } while (0)
!
! static inline bool
! hard_reg_set_subset_p (const HARD_REG_SET x, const HARD_REG_SET y)
{
! return (x[0] & ~y[0]) == 0 && (x[1] & ~y[1]) == 0;
}
! static inline bool
! hard_reg_set_equal_p (const HARD_REG_SET x, const HARD_REG_SET y)
{
! return x[0] == y[0] && x[1] == y[1];
}
! static inline bool
! hard_reg_set_intersect_p (const HARD_REG_SET x, const HARD_REG_SET y)
{
! return (x[0] & y[0]) != 0 || (x[1] & y[1]) != 0;
}
! static inline bool
! hard_reg_set_empty_p (const HARD_REG_SET x)
{
! return x[0] == 0 && x[1] == 0;
}
! #else
! #if FIRST_PSEUDO_REGISTER <= 3*HOST_BITS_PER_WIDEST_FAST_INT
! #define CLEAR_HARD_REG_SET(TO) \
! do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
! scan_tp_[0] = 0; \
! scan_tp_[1] = 0; \
! scan_tp_[2] = 0; } while (0)
!
! #define SET_HARD_REG_SET(TO) \
! do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
! scan_tp_[0] = -1; \
! scan_tp_[1] = -1; \
! scan_tp_[2] = -1; } while (0)
!
! #define COPY_HARD_REG_SET(TO, FROM) \
! do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
! const HARD_REG_ELT_TYPE *scan_fp_ = (FROM); \
! scan_tp_[0] = scan_fp_[0]; \
! scan_tp_[1] = scan_fp_[1]; \
! scan_tp_[2] = scan_fp_[2]; } while (0)
!
! #define COMPL_HARD_REG_SET(TO, FROM) \
! do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
! const HARD_REG_ELT_TYPE *scan_fp_ = (FROM); \
! scan_tp_[0] = ~ scan_fp_[0]; \
! scan_tp_[1] = ~ scan_fp_[1]; \
! scan_tp_[2] = ~ scan_fp_[2]; } while (0)
!
! #define AND_HARD_REG_SET(TO, FROM) \
! do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
! const HARD_REG_ELT_TYPE *scan_fp_ = (FROM); \
! scan_tp_[0] &= scan_fp_[0]; \
! scan_tp_[1] &= scan_fp_[1]; \
! scan_tp_[2] &= scan_fp_[2]; } while (0)
!
! #define AND_COMPL_HARD_REG_SET(TO, FROM) \
! do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
! const HARD_REG_ELT_TYPE *scan_fp_ = (FROM); \
! scan_tp_[0] &= ~ scan_fp_[0]; \
! scan_tp_[1] &= ~ scan_fp_[1]; \
! scan_tp_[2] &= ~ scan_fp_[2]; } while (0)
!
! #define IOR_HARD_REG_SET(TO, FROM) \
! do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
! const HARD_REG_ELT_TYPE *scan_fp_ = (FROM); \
! scan_tp_[0] |= scan_fp_[0]; \
! scan_tp_[1] |= scan_fp_[1]; \
! scan_tp_[2] |= scan_fp_[2]; } while (0)
!
! #define IOR_COMPL_HARD_REG_SET(TO, FROM) \
! do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
! const HARD_REG_ELT_TYPE *scan_fp_ = (FROM); \
! scan_tp_[0] |= ~ scan_fp_[0]; \
! scan_tp_[1] |= ~ scan_fp_[1]; \
! scan_tp_[2] |= ~ scan_fp_[2]; } while (0)
!
! static inline bool
! hard_reg_set_subset_p (const HARD_REG_SET x, const HARD_REG_SET y)
! {
! return ((x[0] & ~y[0]) == 0
! && (x[1] & ~y[1]) == 0
! && (x[2] & ~y[2]) == 0);
! }
!
! static inline bool
! hard_reg_set_equal_p (const HARD_REG_SET x, const HARD_REG_SET y)
{
! return x[0] == y[0] && x[1] == y[1] && x[2] == y[2];
}
! static inline bool
! hard_reg_set_intersect_p (const HARD_REG_SET x, const HARD_REG_SET y)
{
! return ((x[0] & y[0]) != 0
! || (x[1] & y[1]) != 0
! || (x[2] & y[2]) != 0);
}
! static inline bool
! hard_reg_set_empty_p (const HARD_REG_SET x)
{
! return x[0] == 0 && x[1] == 0 && x[2] == 0;
}
! #else
! #if FIRST_PSEUDO_REGISTER <= 4*HOST_BITS_PER_WIDEST_FAST_INT
! #define CLEAR_HARD_REG_SET(TO) \
! do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
! scan_tp_[0] = 0; \
! scan_tp_[1] = 0; \
! scan_tp_[2] = 0; \
! scan_tp_[3] = 0; } while (0)
!
! #define SET_HARD_REG_SET(TO) \
! do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
! scan_tp_[0] = -1; \
! scan_tp_[1] = -1; \
! scan_tp_[2] = -1; \
! scan_tp_[3] = -1; } while (0)
!
! #define COPY_HARD_REG_SET(TO, FROM) \
! do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
! const HARD_REG_ELT_TYPE *scan_fp_ = (FROM); \
! scan_tp_[0] = scan_fp_[0]; \
! scan_tp_[1] = scan_fp_[1]; \
! scan_tp_[2] = scan_fp_[2]; \
! scan_tp_[3] = scan_fp_[3]; } while (0)
!
! #define COMPL_HARD_REG_SET(TO, FROM) \
! do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
! const HARD_REG_ELT_TYPE *scan_fp_ = (FROM); \
! scan_tp_[0] = ~ scan_fp_[0]; \
! scan_tp_[1] = ~ scan_fp_[1]; \
! scan_tp_[2] = ~ scan_fp_[2]; \
! scan_tp_[3] = ~ scan_fp_[3]; } while (0)
!
! #define AND_HARD_REG_SET(TO, FROM) \
! do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
! const HARD_REG_ELT_TYPE *scan_fp_ = (FROM); \
! scan_tp_[0] &= scan_fp_[0]; \
! scan_tp_[1] &= scan_fp_[1]; \
! scan_tp_[2] &= scan_fp_[2]; \
! scan_tp_[3] &= scan_fp_[3]; } while (0)
!
! #define AND_COMPL_HARD_REG_SET(TO, FROM) \
! do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
! const HARD_REG_ELT_TYPE *scan_fp_ = (FROM); \
! scan_tp_[0] &= ~ scan_fp_[0]; \
! scan_tp_[1] &= ~ scan_fp_[1]; \
! scan_tp_[2] &= ~ scan_fp_[2]; \
! scan_tp_[3] &= ~ scan_fp_[3]; } while (0)
!
! #define IOR_HARD_REG_SET(TO, FROM) \
! do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
! const HARD_REG_ELT_TYPE *scan_fp_ = (FROM); \
! scan_tp_[0] |= scan_fp_[0]; \
! scan_tp_[1] |= scan_fp_[1]; \
! scan_tp_[2] |= scan_fp_[2]; \
! scan_tp_[3] |= scan_fp_[3]; } while (0)
!
! #define IOR_COMPL_HARD_REG_SET(TO, FROM) \
! do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
! const HARD_REG_ELT_TYPE *scan_fp_ = (FROM); \
! scan_tp_[0] |= ~ scan_fp_[0]; \
! scan_tp_[1] |= ~ scan_fp_[1]; \
! scan_tp_[2] |= ~ scan_fp_[2]; \
! scan_tp_[3] |= ~ scan_fp_[3]; } while (0)
!
! static inline bool
! hard_reg_set_subset_p (const HARD_REG_SET x, const HARD_REG_SET y)
{
! return ((x[0] & ~y[0]) == 0
! && (x[1] & ~y[1]) == 0
! && (x[2] & ~y[2]) == 0
! && (x[3] & ~y[3]) == 0);
}
! static inline bool
! hard_reg_set_equal_p (const HARD_REG_SET x, const HARD_REG_SET y)
{
! return x[0] == y[0] && x[1] == y[1] && x[2] == y[2] && x[3] == y[3];
}
! static inline bool
! hard_reg_set_intersect_p (const HARD_REG_SET x, const HARD_REG_SET y)
{
! return ((x[0] & y[0]) != 0
! || (x[1] & y[1]) != 0
! || (x[2] & y[2]) != 0
! || (x[3] & y[3]) != 0);
}
! static inline bool
! hard_reg_set_empty_p (const HARD_REG_SET x)
{
! return x[0] == 0 && x[1] == 0 && x[2] == 0 && x[3] == 0;
}
- #else /* FIRST_PSEUDO_REGISTER > 4*HOST_BITS_PER_WIDEST_FAST_INT */
-
- #define CLEAR_HARD_REG_SET(TO) \
- do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
- int i; \
- for (i = 0; i < HARD_REG_SET_LONGS; i++) \
- *scan_tp_++ = 0; } while (0)
-
- #define SET_HARD_REG_SET(TO) \
- do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
- int i; \
- for (i = 0; i < HARD_REG_SET_LONGS; i++) \
- *scan_tp_++ = -1; } while (0)
-
- #define COPY_HARD_REG_SET(TO, FROM) \
- do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
- const HARD_REG_ELT_TYPE *scan_fp_ = (FROM); \
- int i; \
- for (i = 0; i < HARD_REG_SET_LONGS; i++) \
- *scan_tp_++ = *scan_fp_++; } while (0)
-
- #define COMPL_HARD_REG_SET(TO, FROM) \
- do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
- const HARD_REG_ELT_TYPE *scan_fp_ = (FROM); \
- int i; \
- for (i = 0; i < HARD_REG_SET_LONGS; i++) \
- *scan_tp_++ = ~ *scan_fp_++; } while (0)
-
- #define AND_HARD_REG_SET(TO, FROM) \
- do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
- const HARD_REG_ELT_TYPE *scan_fp_ = (FROM); \
- int i; \
- for (i = 0; i < HARD_REG_SET_LONGS; i++) \
- *scan_tp_++ &= *scan_fp_++; } while (0)
-
- #define AND_COMPL_HARD_REG_SET(TO, FROM) \
- do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
- const HARD_REG_ELT_TYPE *scan_fp_ = (FROM); \
- int i; \
- for (i = 0; i < HARD_REG_SET_LONGS; i++) \
- *scan_tp_++ &= ~ *scan_fp_++; } while (0)
-
- #define IOR_HARD_REG_SET(TO, FROM) \
- do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
- const HARD_REG_ELT_TYPE *scan_fp_ = (FROM); \
- int i; \
- for (i = 0; i < HARD_REG_SET_LONGS; i++) \
- *scan_tp_++ |= *scan_fp_++; } while (0)
-
- #define IOR_COMPL_HARD_REG_SET(TO, FROM) \
- do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
- const HARD_REG_ELT_TYPE *scan_fp_ = (FROM); \
- int i; \
- for (i = 0; i < HARD_REG_SET_LONGS; i++) \
- *scan_tp_++ |= ~ *scan_fp_++; } while (0)
-
static inline bool
! hard_reg_set_subset_p (const HARD_REG_SET x, const HARD_REG_SET y)
{
! int i;
!
! for (i = 0; i < HARD_REG_SET_LONGS; i++)
! if ((x[i] & ~y[i]) != 0)
! return false;
! return true;
}
static inline bool
! hard_reg_set_equal_p (const HARD_REG_SET x, const HARD_REG_SET y)
{
! int i;
!
! for (i = 0; i < HARD_REG_SET_LONGS; i++)
! if (x[i] != y[i])
! return false;
! return true;
}
static inline bool
! hard_reg_set_intersect_p (const HARD_REG_SET x, const HARD_REG_SET y)
{
! int i;
!
! for (i = 0; i < HARD_REG_SET_LONGS; i++)
! if ((x[i] & y[i]) != 0)
! return true;
! return false;
}
static inline bool
! hard_reg_set_empty_p (const HARD_REG_SET x)
{
! int i;
!
! for (i = 0; i < HARD_REG_SET_LONGS; i++)
! if (x[i] != 0)
! return false;
! return true;
}
-
- #endif
- #endif
- #endif
#endif
/* Iterator for hard register sets. */
--- 125,266 ----
#define AND_COMPL_HARD_REG_SET(TO, FROM) ((TO) &= ~ (FROM))
static inline bool
! hard_reg_set_subset_p (const_hard_reg_set x, const_hard_reg_set y)
{
return (x & ~y) == HARD_CONST (0);
}
static inline bool
! hard_reg_set_equal_p (const_hard_reg_set x, const_hard_reg_set y)
{
return x == y;
}
static inline bool
! hard_reg_set_intersect_p (const_hard_reg_set x, const_hard_reg_set y)
{
return (x & y) != HARD_CONST (0);
}
static inline bool
! hard_reg_set_empty_p (const_hard_reg_set x)
{
return x == HARD_CONST (0);
}
#else
! inline void
! SET_HARD_REG_BIT (HARD_REG_SET &set, unsigned int bit)
{
! set.elts[bit / UHOST_BITS_PER_WIDE_INT]
! |= HARD_CONST (1) << (bit % UHOST_BITS_PER_WIDE_INT);
}
! inline void
! CLEAR_HARD_REG_BIT (HARD_REG_SET &set, unsigned int bit)
{
! set.elts[bit / UHOST_BITS_PER_WIDE_INT]
! &= ~(HARD_CONST (1) << (bit % UHOST_BITS_PER_WIDE_INT));
}
! inline bool
! TEST_HARD_REG_BIT (const_hard_reg_set set, unsigned int bit)
{
! return (set.elts[bit / UHOST_BITS_PER_WIDE_INT]
! & (HARD_CONST (1) << (bit % UHOST_BITS_PER_WIDE_INT)));
}
! inline void
! CLEAR_HARD_REG_SET (HARD_REG_SET &set)
{
! for (unsigned int i = 0; i < ARRAY_SIZE (set.elts); ++i)
! set.elts[i] = 0;
}
! inline void
! SET_HARD_REG_SET (HARD_REG_SET &set)
{
! for (unsigned int i = 0; i < ARRAY_SIZE (set.elts); ++i)
! set.elts[i] = -1;
}
! inline void
! COPY_HARD_REG_SET (HARD_REG_SET &to, const_hard_reg_set from)
{
! to = from;
}
! inline void
! COMPL_HARD_REG_SET (HARD_REG_SET &to, const_hard_reg_set from)
{
! for (unsigned int i = 0; i < ARRAY_SIZE (to.elts); ++i)
! to.elts[i] = ~from.elts[i];
}
! inline void
! AND_HARD_REG_SET (HARD_REG_SET &to, const_hard_reg_set from)
{
! for (unsigned int i = 0; i < ARRAY_SIZE (to.elts); ++i)
! to.elts[i] &= from.elts[i];
}
! inline void
! AND_COMPL_HARD_REG_SET (HARD_REG_SET &to, const_hard_reg_set from)
{
! for (unsigned int i = 0; i < ARRAY_SIZE (to.elts); ++i)
! to.elts[i] &= ~from.elts[i];
}
! inline void
! IOR_HARD_REG_SET (HARD_REG_SET &to, const_hard_reg_set from)
{
! for (unsigned int i = 0; i < ARRAY_SIZE (to.elts); ++i)
! to.elts[i] |= from.elts[i];
}
! inline void
! IOR_COMPL_HARD_REG_SET (HARD_REG_SET &to, const_hard_reg_set from)
{
! for (unsigned int i = 0; i < ARRAY_SIZE (to.elts); ++i)
! to.elts[i] |= ~from.elts[i];
}
static inline bool
! hard_reg_set_subset_p (const_hard_reg_set x, const_hard_reg_set y)
{
! HARD_REG_ELT_TYPE bad = 0;
! for (unsigned int i = 0; i < ARRAY_SIZE (x.elts); ++i)
! bad |= (x.elts[i] & ~y.elts[i]);
! return bad == 0;
}
static inline bool
! hard_reg_set_equal_p (const_hard_reg_set x, const_hard_reg_set y)
{
! HARD_REG_ELT_TYPE bad = 0;
! for (unsigned int i = 0; i < ARRAY_SIZE (x.elts); ++i)
! bad |= (x.elts[i] ^ y.elts[i]);
! return bad == 0;
}
static inline bool
! hard_reg_set_intersect_p (const_hard_reg_set x, const_hard_reg_set y)
{
! HARD_REG_ELT_TYPE good = 0;
! for (unsigned int i = 0; i < ARRAY_SIZE (x.elts); ++i)
! good |= (x.elts[i] & y.elts[i]);
! return good != 0;
}
static inline bool
! hard_reg_set_empty_p (const_hard_reg_set x)
{
! HARD_REG_ELT_TYPE bad = 0;
! for (unsigned int i = 0; i < ARRAY_SIZE (x.elts); ++i)
! bad |= x.elts[i];
! return bad == 0;
}
#endif
/* Iterator for hard register sets. */
*************** hard_reg_set_empty_p (const HARD_REG_SET
*** 515,521 ****
struct hard_reg_set_iterator
{
/* Pointer to the current element. */
! HARD_REG_ELT_TYPE *pelt;
/* The length of the set. */
unsigned short length;
--- 268,274 ----
struct hard_reg_set_iterator
{
/* Pointer to the current element. */
! const HARD_REG_ELT_TYPE *pelt;
/* The length of the set. */
unsigned short length;
*************** #define HARD_REG_ELT_BITS UHOST_BITS_PER
*** 534,544 ****
/* The implementation of the iterator functions is fully analogous to
the bitmap iterators. */
static inline void
! hard_reg_set_iter_init (hard_reg_set_iterator *iter, HARD_REG_SET set,
unsigned min, unsigned *regno)
{
#ifdef HARD_REG_SET_LONGS
! iter->pelt = set;
iter->length = HARD_REG_SET_LONGS;
#else
iter->pelt = &set;
--- 287,297 ----
/* The implementation of the iterator functions is fully analogous to
the bitmap iterators. */
static inline void
! hard_reg_set_iter_init (hard_reg_set_iterator *iter, const_hard_reg_set set,
unsigned min, unsigned *regno)
{
#ifdef HARD_REG_SET_LONGS
! iter->pelt = set.elts;
iter->length = HARD_REG_SET_LONGS;
#else
iter->pelt = &set;
Index: gcc/recog.h
===================================================================
*** gcc/recog.h 2019-09-09 16:53:27.837266363 +0100
--- gcc/recog.h 2019-09-09 16:53:27.829266420 +0100
*************** extern void preprocess_constraints (rtx_
*** 142,148 ****
extern rtx_insn *peep2_next_insn (int);
extern int peep2_regno_dead_p (int, int);
extern int peep2_reg_dead_p (int, rtx);
! #ifdef CLEAR_HARD_REG_SET
extern rtx peep2_find_free_register (int, int, const char *,
machine_mode, HARD_REG_SET *);
#endif
--- 142,148 ----
extern rtx_insn *peep2_next_insn (int);
extern int peep2_regno_dead_p (int, int);
extern int peep2_reg_dead_p (int, rtx);
! #ifdef HARD_CONST
extern rtx peep2_find_free_register (int, int, const char *,
machine_mode, HARD_REG_SET *);
#endif
Index: gcc/reload.h
===================================================================
*** gcc/reload.h 2019-09-09 16:53:27.837266363 +0100
--- gcc/reload.h 2019-09-09 16:53:27.829266420 +0100
*************** #define reg_equiv_init(ELT) \
*** 274,280 ****
extern int num_not_at_initial_offset;
! #if defined SET_HARD_REG_BIT && defined CLEAR_REG_SET
/* This structure describes instructions which are relevant for reload.
Apart from all regular insns, this also includes CODE_LABELs, since they
must be examined for register elimination. */
--- 274,280 ----
extern int num_not_at_initial_offset;
! #if defined HARD_CONST && defined CLEAR_REG_SET
/* This structure describes instructions which are relevant for reload.
Apart from all regular insns, this also includes CODE_LABELs, since they
must be examined for register elimination. */
*************** #define reg_equiv_init(ELT) \
*** 326,332 ****
extern class insn_chain *new_insn_chain (void);
#endif
! #if defined SET_HARD_REG_BIT
extern void compute_use_by_pseudos (HARD_REG_SET *, bitmap);
#endif
--- 326,332 ----
extern class insn_chain *new_insn_chain (void);
#endif
! #if defined HARD_CONST
extern void compute_use_by_pseudos (HARD_REG_SET *, bitmap);
#endif
Index: gcc/rtl.h
===================================================================
*** gcc/rtl.h 2019-09-09 16:53:27.837266363 +0100
--- gcc/rtl.h 2019-09-09 16:53:27.833266392 +0100
*************** extern bool val_signbit_known_clear_p (m
*** 3383,3390 ****
unsigned HOST_WIDE_INT);
/* In reginfo.c */
! extern machine_mode choose_hard_reg_mode (unsigned int, unsigned int,
! bool);
extern const HARD_REG_SET &simplifiable_subregs (const subreg_shape &);
/* In emit-rtl.c */
--- 3383,3389 ----
unsigned HOST_WIDE_INT);
/* In reginfo.c */
! extern machine_mode choose_hard_reg_mode (unsigned int, unsigned int, bool);
extern const HARD_REG_SET &simplifiable_subregs (const subreg_shape &);
/* In emit-rtl.c */
Index: gcc/regs.h
===================================================================
*** gcc/regs.h 2019-09-09 16:53:27.837266363 +0100
--- gcc/regs.h 2019-09-09 16:53:27.829266420 +0100
*************** remove_from_hard_reg_set (HARD_REG_SET *
*** 298,304 ****
/* Return true if REGS contains the whole of (reg:MODE REGNO). */
static inline bool
! in_hard_reg_set_p (const HARD_REG_SET regs, machine_mode mode,
unsigned int regno)
{
unsigned int end_regno;
--- 298,304 ----
/* Return true if REGS contains the whole of (reg:MODE REGNO). */
static inline bool
! in_hard_reg_set_p (const_hard_reg_set regs, machine_mode mode,
unsigned int regno)
{
unsigned int end_regno;
*************** in_hard_reg_set_p (const HARD_REG_SET re
*** 323,329 ****
/* Return true if (reg:MODE REGNO) includes an element of REGS. */
static inline bool
! overlaps_hard_reg_set_p (const HARD_REG_SET regs, machine_mode mode,
unsigned int regno)
{
unsigned int end_regno;
--- 323,329 ----
/* Return true if (reg:MODE REGNO) includes an element of REGS. */
static inline bool
! overlaps_hard_reg_set_p (const_hard_reg_set regs, machine_mode mode,
unsigned int regno)
{
unsigned int end_regno;
*************** remove_range_from_hard_reg_set (HARD_REG
*** 363,369 ****
/* Like overlaps_hard_reg_set_p, but use a REGNO/NREGS range instead of
REGNO and MODE. */
static inline bool
! range_overlaps_hard_reg_set_p (const HARD_REG_SET set, unsigned regno,
int nregs)
{
while (nregs-- > 0)
--- 363,369 ----
/* Like overlaps_hard_reg_set_p, but use a REGNO/NREGS range instead of
REGNO and MODE. */
static inline bool
! range_overlaps_hard_reg_set_p (const_hard_reg_set set, unsigned regno,
int nregs)
{
while (nregs-- > 0)
*************** range_overlaps_hard_reg_set_p (const HAR
*** 375,381 ****
/* Like in_hard_reg_set_p, but use a REGNO/NREGS range instead of
REGNO and MODE. */
static inline bool
! range_in_hard_reg_set_p (const HARD_REG_SET set, unsigned regno, int nregs)
{
while (nregs-- > 0)
if (!TEST_HARD_REG_BIT (set, regno + nregs))
--- 375,381 ----
/* Like in_hard_reg_set_p, but use a REGNO/NREGS range instead of
REGNO and MODE. */
static inline bool
! range_in_hard_reg_set_p (const_hard_reg_set set, unsigned regno, int nregs)
{
while (nregs-- > 0)
if (!TEST_HARD_REG_BIT (set, regno + nregs))
Index: gcc/ira-costs.c
===================================================================
*** gcc/ira-costs.c 2019-09-09 16:53:27.837266363 +0100
--- gcc/ira-costs.c 2019-09-09 16:53:27.829266420 +0100
*************** setup_cost_classes (cost_classes_t from)
*** 237,243 ****
allocated. */
static cost_classes_t
restrict_cost_classes (cost_classes_t full, machine_mode mode,
! const HARD_REG_SET ®s)
{
static struct cost_classes narrow;
int map[N_REG_CLASSES];
--- 237,243 ----
allocated. */
static cost_classes_t
restrict_cost_classes (cost_classes_t full, machine_mode mode,
! const_hard_reg_set regs)
{
static struct cost_classes narrow;
int map[N_REG_CLASSES];
Index: gcc/shrink-wrap.c
===================================================================
*** gcc/shrink-wrap.c 2019-09-09 16:53:27.837266363 +0100
--- gcc/shrink-wrap.c 2019-09-09 16:53:27.833266392 +0100
*************** live_edge_for_reg (basic_block bb, int r
*** 151,158 ****
static bool
move_insn_for_shrink_wrap (basic_block bb, rtx_insn *insn,
! const HARD_REG_SET uses,
! const HARD_REG_SET defs,
bool *split_p,
struct dead_debug_local *debug)
{
--- 151,158 ----
static bool
move_insn_for_shrink_wrap (basic_block bb, rtx_insn *insn,
! const_hard_reg_set uses,
! const_hard_reg_set defs,
bool *split_p,
struct dead_debug_local *debug)
{
Index: gcc/config/epiphany/resolve-sw-modes.c
===================================================================
*** gcc/config/epiphany/resolve-sw-modes.c 2019-09-09 16:53:27.837266363 +0100
--- gcc/config/epiphany/resolve-sw-modes.c 2019-09-09 16:53:27.825266448 +0100
*************** pass_resolve_sw_modes::execute (function
*** 167,173 ****
}
start_sequence ();
emit_set_fp_mode (EPIPHANY_MSW_ENTITY_ROUND_UNKNOWN,
! jilted_mode, FP_MODE_NONE, NULL);
seq = get_insns ();
end_sequence ();
need_commit = true;
--- 167,174 ----
}
start_sequence ();
emit_set_fp_mode (EPIPHANY_MSW_ENTITY_ROUND_UNKNOWN,
! jilted_mode, FP_MODE_NONE,
! reg_class_contents[NO_REGS]);
seq = get_insns ();
end_sequence ();
need_commit = true;
Index: gcc/config/ia64/ia64.c
===================================================================
*** gcc/config/ia64/ia64.c 2019-09-09 16:53:27.837266363 +0100
--- gcc/config/ia64/ia64.c 2019-09-09 16:53:27.829266420 +0100
*************** struct reg_write_state
*** 6230,6249 ****
struct reg_write_state rws_sum[NUM_REGS];
#if CHECKING_P
/* Bitmap whether a register has been written in the current insn. */
! HARD_REG_ELT_TYPE rws_insn[(NUM_REGS + HOST_BITS_PER_WIDEST_FAST_INT - 1)
! / HOST_BITS_PER_WIDEST_FAST_INT];
static inline void
! rws_insn_set (int regno)
{
! gcc_assert (!TEST_HARD_REG_BIT (rws_insn, regno));
! SET_HARD_REG_BIT (rws_insn, regno);
}
static inline int
! rws_insn_test (int regno)
{
! return TEST_HARD_REG_BIT (rws_insn, regno);
}
#else
/* When not checking, track just REG_AR_CFM and REG_VOLATILE. */
--- 6230,6254 ----
struct reg_write_state rws_sum[NUM_REGS];
#if CHECKING_P
/* Bitmap whether a register has been written in the current insn. */
! unsigned HOST_WIDEST_FAST_INT rws_insn
! [(NUM_REGS + HOST_BITS_PER_WIDEST_FAST_INT - 1)
! / HOST_BITS_PER_WIDEST_FAST_INT];
static inline void
! rws_insn_set (unsigned int regno)
{
! unsigned int elt = regno / HOST_BITS_PER_WIDEST_FAST_INT;
! unsigned int bit = regno % HOST_BITS_PER_WIDEST_FAST_INT;
! gcc_assert (!((rws_insn[elt] >> bit) & 1));
! rws_insn[elt] |= (unsigned HOST_WIDEST_FAST_INT) 1 << bit;
}
static inline int
! rws_insn_test (unsigned int regno)
{
! unsigned int elt = regno / HOST_BITS_PER_WIDEST_FAST_INT;
! unsigned int bit = regno % HOST_BITS_PER_WIDEST_FAST_INT;
! return (rws_insn[elt] >> bit) & 1;
}
#else
/* When not checking, track just REG_AR_CFM and REG_VOLATILE. */
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [1/9] Simplify the implementation of HARD_REG_SET
2019-09-09 15:54 ` [1/9] Simplify the implementation of HARD_REG_SET Richard Sandiford
@ 2019-09-09 17:35 ` Jeff Law
2019-09-09 18:05 ` Richard Sandiford
0 siblings, 1 reply; 21+ messages in thread
From: Jeff Law @ 2019-09-09 17:35 UTC (permalink / raw)
To: gcc-patches, richard.sandiford
On 9/9/19 9:53 AM, Richard Sandiford wrote:
> We have two styles of HARD_REG_SET: a single integer based on
> HOST_WIDEST_FAST_INT (used when FIRST_PSEUDO_REGISTER is small enough)
> or an array of integers. One of the nice properties of this arrangement
> is that:
>
> void foo (const HARD_REG_SET);
>
> is passed by value as an integer when the set is small enough and
> by reference otherwise.
True, but I suspect that few, if any, important targets are able to use
the simple integer version.
>
> However, one of the disadvantages of using an array is that simple
> assignment doesn't work. We need to use COPY_HARD_REG_SET instead.
RIght. Clear historical wart.
>
> This patch uses a structure wrapper around the array, and preserves
> the above "nice property" using a new const_hard_reg_set typedef.
> The patch also removes the manual unrolling for small array sizes;
> I think these days we can rely on the compiler to do that for us.
Certainly makes sense to me. Most of this was designed in the "early
days" when most targets had small register files.
>
> This meant fixing two port-specific quirks:
>
> - epiphany passed NULL as a HARD_REG_SET whose value doesn't matter.
> The patch passes the NO_REGS set instead.
>
> - ia64 reused TEST_HARD_REG_BIT and SET_HARD_REG_BIT for arrays that
> are bigger than HARD_REG_SET. The patch just open-codes them.
>
> The patch is probably being too conservative. Very few places actually
> take advantage of the "nice property" above, and we could have a
> cleaner interface if we used a structure wrapper for all cases.
I wouldn't object to dropping the "nice property". I doubt it matters
anymore and if the result is cleaner and easier to work with, then it's
a net win.
>
>
> 2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
>
> gcc/
> * hard-reg-set.h (HARD_REG_SET): Define using a typedef rather
> than a #define. Use a structure rather than an array as the
> fallback definition. Remove special cases for low array sizes.
> (const_hard_reg_set): New typedef.
> (hard_reg_set_subset_p): Use it instead of "const HARD_REG_SET".
> (hard_reg_set_equal_p, hard_reg_set_intersect_p): Likewise.
> (hard_reg_set_empty_p): Likewise.
> (SET_HARD_REG_BIT): Use a function rather than a macro to
> handle the case in which HARD_REG_SET is a structure.
> (CLEAR_HARD_REG_BIT, TEST_HARD_REG_BIT, CLEAR_HARD_REG_SET)
> (SET_HARD_REG_SET, COPY_HARD_REG_SET, COMPL_HARD_REG_SET)
> (AND_HARD_REG_SET, AND_COMPL_HARD_REG_SET, IOR_HARD_REG_SET)
> (IOR_COMPL_HARD_REG_SET): Likewise.
> (hard_reg_set_iterator::pset): Constify the pointer target.
> (hard_reg_set_iter_init): Take a const_hard_reg_set instead
> of a "const HARD_REG_SET". Update the handling of non-integer
> HARD_REG_SETs.
> * recog.h: Test HARD_CONST instead of CLEAR_HARD_REG_SET.
> * reload.h: Likewise.
> * rtl.h (choose_hard_reg_mode): Remove unnecessary line break.
> * regs.h (in_hard_reg_set_p): Take a const_hard_reg_set instead
> of a "const HARD_REG_SET".
> (overlaps_hard_reg_set_p, range_overlaps_hard_reg_set_p): Likewise.
> (range_in_hard_reg_set_p): Likewise.
> * ira-costs.c (restrict_cost_classes): Likewise.
> * shrink-wrap.c (move_insn_for_shrink_wrap): Likewise.
> * config/epiphany/resolve-sw-modes.c (pass_resolve_sw_modes::execute):
> Pass a NO_REGS HARD_REG_SET rather than NULL to emit_set_fp_mode.
> * config/ia64/ia64.c (rws_insn): In the CHECKING_P version,
> use unsigned HOST_WIDEST_FAST_INT rather than HARD_REG_ELT_TYPE.
> (rws_insn_set, rws_insn_test): In the CHECKING_P version,
> take an unsigned int and open-code the HARD_REG_SET operations.
OK
jeff
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [1/9] Simplify the implementation of HARD_REG_SET
2019-09-09 17:35 ` Jeff Law
@ 2019-09-09 18:05 ` Richard Sandiford
2019-09-10 9:16 ` Oleg Endo
0 siblings, 1 reply; 21+ messages in thread
From: Richard Sandiford @ 2019-09-09 18:05 UTC (permalink / raw)
To: Jeff Law; +Cc: gcc-patches
Jeff Law <law@redhat.com> writes:
> On 9/9/19 9:53 AM, Richard Sandiford wrote:
>> We have two styles of HARD_REG_SET: a single integer based on
>> HOST_WIDEST_FAST_INT (used when FIRST_PSEUDO_REGISTER is small enough)
>> or an array of integers. One of the nice properties of this arrangement
>> is that:
>>
>> void foo (const HARD_REG_SET);
>>
>> is passed by value as an integer when the set is small enough and
>> by reference otherwise.
> True, but I suspect that few, if any, important targets are able to use
> the simple integer version.
>
>
>>
>> However, one of the disadvantages of using an array is that simple
>> assignment doesn't work. We need to use COPY_HARD_REG_SET instead.
> RIght. Clear historical wart.
>
>>
>> This patch uses a structure wrapper around the array, and preserves
>> the above "nice property" using a new const_hard_reg_set typedef.
>> The patch also removes the manual unrolling for small array sizes;
>> I think these days we can rely on the compiler to do that for us.
> Certainly makes sense to me. Most of this was designed in the "early
> days" when most targets had small register files.
>
>>
>> This meant fixing two port-specific quirks:
>>
>> - epiphany passed NULL as a HARD_REG_SET whose value doesn't matter.
>> The patch passes the NO_REGS set instead.
>>
>> - ia64 reused TEST_HARD_REG_BIT and SET_HARD_REG_BIT for arrays that
>> are bigger than HARD_REG_SET. The patch just open-codes them.
>>
>> The patch is probably being too conservative. Very few places actually
>> take advantage of the "nice property" above, and we could have a
>> cleaner interface if we used a structure wrapper for all cases.
> I wouldn't object to dropping the "nice property". I doubt it matters
> anymore and if the result is cleaner and easier to work with, then it's
> a net win.
Yeah. I might come back to this later and look at a fuller transition
to C++ (or at least to try to get rid of CLEAR_HARD_REG_SET).
Thanks,
Richard
^ permalink raw reply [flat|nested] 21+ messages in thread
* [2/9] Remove COPY_HARD_REG_SET
2019-09-09 15:52 [0/9] Make HARD_REG_SETs easier to use Richard Sandiford
2019-09-09 15:54 ` [1/9] Simplify the implementation of HARD_REG_SET Richard Sandiford
@ 2019-09-09 15:58 ` Richard Sandiford
2019-09-09 17:36 ` Jeff Law
2019-09-09 15:59 ` [3/9] Remove COMPL_HARD_REG_SET Richard Sandiford
` (6 subsequent siblings)
8 siblings, 1 reply; 21+ messages in thread
From: Richard Sandiford @ 2019-09-09 15:58 UTC (permalink / raw)
To: gcc-patches
This patch replaces "COPY_HARD_REG_SET (x, y)" with "x = y".
2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* hard-reg-set.h (COPY_HARD_REG_SET): Delete.
* caller-save.c (save_call_clobbered_regs): Use assignment instead
of COPY_HARD_REG_SET.
* config/epiphany/epiphany.c (epiphany_compute_frame_size): Likewise.
(epiphany_conditional_register_usage): Likewise.
* config/frv/frv.c (frv_ifcvt_modify_tests): Likewise.
* config/gcn/gcn.c (gcn_md_reorg): Likewise.
* config/ia64/ia64.c (ia64_compute_frame_size): Likewise.
* config/m32c/m32c.c (m32c_register_move_cost): Likewise.
* config/m68k/m68k.c (m68k_conditional_register_usage): Likewise.
* config/mips/mips.c (mips_class_max_nregs): Likewise.
* config/pdp11/pdp11.c (pdp11_conditional_register_usage): Likewise.
* config/rs6000/rs6000.c (rs6000_register_move_cost): Likewise.
* config/sh/sh.c (output_stack_adjust): Likewise.
* final.c (collect_fn_hard_reg_usage): Likewise.
(get_call_reg_set_usage): Likewise.
* ira-build.c (ira_create_object, remove_low_level_allocnos)
(ira_flattening): Likewise.
* ira-color.c (add_allocno_hard_regs, add_allocno_hard_regs_to_forest)
(setup_left_conflict_sizes_p, setup_profitable_hard_regs)
(get_conflict_and_start_profitable_regs, allocno_reload_assign)
(ira_reassign_pseudos): Likewise.
* ira-conflicts.c (print_allocno_conflicts): Likewise.
(ira_build_conflicts): Likewise.
* ira-costs.c (restrict_cost_classes): Likewise.
(setup_regno_cost_classes_by_aclass): Likewise.
* ira.c (setup_class_hard_regs, setup_alloc_regs): Likewise.
(setup_reg_subclasses, setup_class_subset_and_memory_move_costs)
(setup_stack_reg_pressure_class, setup_pressure_classes)
(setup_allocno_and_important_classes, setup_class_translate_array)
(setup_reg_class_relations, setup_prohibited_class_mode_regs)
(ira_setup_eliminable_regset): Likewise.
* lra-assigns.c (find_hard_regno_for_1): Likewise.
(setup_live_pseudos_and_spill_after_risky_transforms): Likewise.
* lra-constraints.c (prohibited_class_reg_set_mode_p): Likewise.
(process_alt_operands, inherit_in_ebb): Likewise.
* lra-lives.c (process_bb_lives): Likewise.
* lra-spills.c (assign_spill_hard_regs): Likewise.
* lra.c (lra): Likewise.
* mode-switching.c (new_seginfo): Likewise.
* postreload.c (reload_combine): Likewise.
* reg-stack.c (straighten_stack): Likewise.
* reginfo.c (save_register_info, restore_register_info): Likewise.
(init_reg_sets_1, record_subregs_of_mode): Likewise
* regrename.c (create_new_chain, rename_chains): Likewise.
* reload1.c (order_regs_for_reload, find_reg): Likewise.
(find_reload_regs): Likewise.
* resource.c (find_dead_or_set_registers): Likewise.
(mark_target_live_regs): Likewise.
* sel-sched.c (mark_unavailable_hard_regs): Likewise.
Index: gcc/hard-reg-set.h
===================================================================
--- gcc/hard-reg-set.h 2019-09-09 16:04:49.265855317 +0100
+++ gcc/hard-reg-set.h 2019-09-09 16:06:17.649228402 +0100
@@ -83,10 +83,10 @@ #define HARD_CONST(X) ((HARD_REG_ELT_TYP
CLEAR_HARD_REG_SET and SET_HARD_REG_SET.
These take just one argument.
- Also define macros for copying hard reg sets:
- COPY_HARD_REG_SET and COMPL_HARD_REG_SET.
- These take two arguments TO and FROM; they read from FROM
- and store into TO. COMPL_HARD_REG_SET complements each bit.
+ Also define macros for copying the complement of a hard reg set:
+ COMPL_HARD_REG_SET.
+ This takes two arguments TO and FROM; it reads from FROM
+ and stores into TO.
Also define macros for combining hard reg sets:
IOR_HARD_REG_SET and AND_HARD_REG_SET.
@@ -116,7 +116,6 @@ #define TEST_HARD_REG_BIT(SET, BIT) \
#define CLEAR_HARD_REG_SET(TO) ((TO) = HARD_CONST (0))
#define SET_HARD_REG_SET(TO) ((TO) = ~ HARD_CONST (0))
-#define COPY_HARD_REG_SET(TO, FROM) ((TO) = (FROM))
#define COMPL_HARD_REG_SET(TO, FROM) ((TO) = ~(FROM))
#define IOR_HARD_REG_SET(TO, FROM) ((TO) |= (FROM))
@@ -186,12 +185,6 @@ SET_HARD_REG_SET (HARD_REG_SET &set)
}
inline void
-COPY_HARD_REG_SET (HARD_REG_SET &to, const_hard_reg_set from)
-{
- to = from;
-}
-
-inline void
COMPL_HARD_REG_SET (HARD_REG_SET &to, const_hard_reg_set from)
{
for (unsigned int i = 0; i < ARRAY_SIZE (to.elts); ++i)
Index: gcc/caller-save.c
===================================================================
--- gcc/caller-save.c 2019-09-09 12:27:14.238372431 +0100
+++ gcc/caller-save.c 2019-09-09 16:06:17.629228543 +0100
@@ -775,7 +775,7 @@ save_call_clobbered_regs (void)
if (code == JUMP_INSN)
/* Restore all registers if this is a JUMP_INSN. */
- COPY_HARD_REG_SET (referenced_regs, hard_regs_saved);
+ referenced_regs = hard_regs_saved;
else
{
CLEAR_HARD_REG_SET (referenced_regs);
Index: gcc/config/epiphany/epiphany.c
===================================================================
--- gcc/config/epiphany/epiphany.c 2019-08-20 09:53:16.210346457 +0100
+++ gcc/config/epiphany/epiphany.c 2019-09-09 16:06:17.629228543 +0100
@@ -1248,7 +1248,7 @@ epiphany_compute_frame_size (int size /*
current_frame_info.var_size = var_size;
current_frame_info.args_size = args_size;
current_frame_info.reg_size = reg_size;
- COPY_HARD_REG_SET (current_frame_info.gmask, gmask);
+ current_frame_info.gmask = gmask;
current_frame_info.first_slot = first_slot;
current_frame_info.last_slot = last_slot;
current_frame_info.first_slot_offset = first_slot_offset;
@@ -2240,8 +2240,7 @@ epiphany_conditional_register_usage (voi
}
if (!TARGET_PREFER_SHORT_INSN_REGS)
CLEAR_HARD_REG_SET (reg_class_contents[SHORT_INSN_REGS]);
- COPY_HARD_REG_SET (reg_class_contents[SIBCALL_REGS],
- reg_class_contents[GENERAL_REGS]);
+ reg_class_contents[SIBCALL_REGS] = reg_class_contents[GENERAL_REGS];
/* It would be simpler and quicker if we could just use
AND_COMPL_HARD_REG_SET, alas, call_used_reg_set is yet uninitialized;
it is set up later by our caller. */
Index: gcc/config/frv/frv.c
===================================================================
--- gcc/config/frv/frv.c 2019-09-09 12:27:14.246372374 +0100
+++ gcc/config/frv/frv.c 2019-09-09 16:06:17.633228515 +0100
@@ -5201,7 +5201,7 @@ frv_ifcvt_modify_tests (ce_if_block *ce_
not fixed. However, allow the ICC/ICR temporary registers to be allocated
if we did not need to use them in reloading other registers. */
memset (&tmp_reg->regs, 0, sizeof (tmp_reg->regs));
- COPY_HARD_REG_SET (tmp_reg->regs, call_used_reg_set);
+ tmp_reg->regs = call_used_reg_set;
AND_COMPL_HARD_REG_SET (tmp_reg->regs, fixed_reg_set);
SET_HARD_REG_BIT (tmp_reg->regs, ICC_TEMP);
SET_HARD_REG_BIT (tmp_reg->regs, ICR_TEMP);
Index: gcc/config/gcn/gcn.c
===================================================================
--- gcc/config/gcn/gcn.c 2019-09-09 12:27:14.246372374 +0100
+++ gcc/config/gcn/gcn.c 2019-09-09 16:06:17.633228515 +0100
@@ -4553,7 +4553,7 @@ gcn_md_reorg (void)
&& gcn_vmem_insn_p (itype))
{
HARD_REG_SET regs;
- COPY_HARD_REG_SET (regs, prev_insn->writes);
+ regs = prev_insn->writes;
AND_HARD_REG_SET (regs, ireads);
if (hard_reg_set_intersect_p
(regs, reg_class_contents[(int) SGPR_REGS]))
@@ -4583,7 +4583,7 @@ gcn_md_reorg (void)
&& get_attr_laneselect (insn) == LANESELECT_YES)
{
HARD_REG_SET regs;
- COPY_HARD_REG_SET (regs, prev_insn->writes);
+ regs = prev_insn->writes;
AND_HARD_REG_SET (regs, ireads);
if (hard_reg_set_intersect_p
(regs, reg_class_contents[(int) SGPR_REGS])
@@ -4599,7 +4599,7 @@ gcn_md_reorg (void)
&& itype == TYPE_VOP_DPP)
{
HARD_REG_SET regs;
- COPY_HARD_REG_SET (regs, prev_insn->writes);
+ regs = prev_insn->writes;
AND_HARD_REG_SET (regs, ireads);
if (hard_reg_set_intersect_p
(regs, reg_class_contents[(int) VGPR_REGS]))
@@ -4641,8 +4641,8 @@ gcn_md_reorg (void)
back[oldest].insn = insn;
back[oldest].unit = iunit;
back[oldest].delayeduse = idelayeduse;
- COPY_HARD_REG_SET (back[oldest].writes, iwrites);
- COPY_HARD_REG_SET (back[oldest].reads, ireads);
+ back[oldest].writes = iwrites;
+ back[oldest].reads = ireads;
back[oldest].age = 0;
oldest = (oldest + 1) % max_waits;
Index: gcc/config/ia64/ia64.c
===================================================================
--- gcc/config/ia64/ia64.c 2019-09-09 16:04:49.265855317 +0100
+++ gcc/config/ia64/ia64.c 2019-09-09 16:06:17.637228487 +0100
@@ -2965,7 +2965,7 @@ ia64_compute_frame_size (HOST_WIDE_INT s
current_frame_info.spill_cfa_off = pretend_args_size - 16;
current_frame_info.spill_size = spill_size;
current_frame_info.extra_spill_size = extra_spill_size;
- COPY_HARD_REG_SET (current_frame_info.mask, mask);
+ current_frame_info.mask = mask;
current_frame_info.n_spilled = n_spilled;
current_frame_info.initialized = reload_completed;
}
Index: gcc/config/m32c/m32c.c
===================================================================
--- gcc/config/m32c/m32c.c 2019-08-20 09:53:06.634416142 +0100
+++ gcc/config/m32c/m32c.c 2019-09-09 16:06:17.637228487 +0100
@@ -2152,7 +2152,7 @@ m32c_register_move_cost (machine_mode mo
HARD_REG_SET cc;
/* FIXME: pick real values, but not 2 for now. */
- COPY_HARD_REG_SET (cc, reg_class_contents[(int) from]);
+ cc = reg_class_contents[from];
IOR_HARD_REG_SET (cc, reg_class_contents[(int) to]);
if (mode == QImode
Index: gcc/config/m68k/m68k.c
===================================================================
--- gcc/config/m68k/m68k.c 2019-08-20 09:53:06.634416142 +0100
+++ gcc/config/m68k/m68k.c 2019-09-09 16:06:17.637228487 +0100
@@ -6555,7 +6555,7 @@ m68k_conditional_register_usage (void)
HARD_REG_SET x;
if (!TARGET_HARD_FLOAT)
{
- COPY_HARD_REG_SET (x, reg_class_contents[(int)FP_REGS]);
+ x = reg_class_contents[FP_REGS];
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
if (TEST_HARD_REG_BIT (x, i))
fixed_regs[i] = call_used_regs[i] = 1;
Index: gcc/config/mips/mips.c
===================================================================
--- gcc/config/mips/mips.c 2019-09-09 12:27:14.254372318 +0100
+++ gcc/config/mips/mips.c 2019-09-09 16:06:17.641228458 +0100
@@ -12975,7 +12975,7 @@ mips_class_max_nregs (enum reg_class rcl
HARD_REG_SET left;
size = 0x8000;
- COPY_HARD_REG_SET (left, reg_class_contents[(int) rclass]);
+ left = reg_class_contents[rclass];
if (hard_reg_set_intersect_p (left, reg_class_contents[(int) ST_REGS]))
{
if (mips_hard_regno_mode_ok (ST_REG_FIRST, mode))
Index: gcc/config/pdp11/pdp11.c
===================================================================
--- gcc/config/pdp11/pdp11.c 2019-08-20 09:53:06.642416084 +0100
+++ gcc/config/pdp11/pdp11.c 2019-09-09 16:06:17.641228458 +0100
@@ -2213,7 +2213,7 @@ pdp11_conditional_register_usage (void)
HARD_REG_SET x;
if (!TARGET_FPU)
{
- COPY_HARD_REG_SET (x, reg_class_contents[(int)FPU_REGS]);
+ x = reg_class_contents[FPU_REGS];
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ )
if (TEST_HARD_REG_BIT (x, i))
fixed_regs[i] = call_used_regs[i] = 1;
Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc/config/rs6000/rs6000.c 2019-09-09 12:19:41.509571386 +0100
+++ gcc/config/rs6000/rs6000.c 2019-09-09 16:06:17.645228430 +0100
@@ -21107,9 +21107,9 @@ rs6000_register_move_cost (machine_mode
Do this first so we give best-case answers for union classes
containing both gprs and vsx regs. */
HARD_REG_SET to_vsx, from_vsx;
- COPY_HARD_REG_SET (to_vsx, reg_class_contents[to]);
+ to_vsx = reg_class_contents[to];
AND_HARD_REG_SET (to_vsx, reg_class_contents[VSX_REGS]);
- COPY_HARD_REG_SET (from_vsx, reg_class_contents[from]);
+ from_vsx = reg_class_contents[from];
AND_HARD_REG_SET (from_vsx, reg_class_contents[VSX_REGS]);
if (!hard_reg_set_empty_p (to_vsx)
&& !hard_reg_set_empty_p (from_vsx)
Index: gcc/config/sh/sh.c
===================================================================
--- gcc/config/sh/sh.c 2019-09-09 12:27:14.254372318 +0100
+++ gcc/config/sh/sh.c 2019-09-09 16:06:17.649228402 +0100
@@ -6708,7 +6708,7 @@ output_stack_adjust (int size, rtx reg,
if (temp < 0 && ! current_function_interrupt && epilogue_p >= 0)
{
HARD_REG_SET temps;
- COPY_HARD_REG_SET (temps, call_used_reg_set);
+ temps = call_used_reg_set;
AND_COMPL_HARD_REG_SET (temps, call_fixed_reg_set);
if (epilogue_p > 0)
{
@@ -6743,7 +6743,7 @@ output_stack_adjust (int size, rtx reg,
{
HARD_REG_SET temps;
- COPY_HARD_REG_SET (temps, *live_regs_mask);
+ temps = *live_regs_mask;
CLEAR_HARD_REG_BIT (temps, REGNO (reg));
temp = scavenge_reg (&temps);
}
Index: gcc/final.c
===================================================================
--- gcc/final.c 2019-03-08 18:14:26.725006353 +0000
+++ gcc/final.c 2019-09-09 16:06:17.649228402 +0100
@@ -5036,7 +5036,7 @@ collect_fn_hard_reg_usage (void)
node = cgraph_node::rtl_info (current_function_decl);
gcc_assert (node != NULL);
- COPY_HARD_REG_SET (node->function_used_regs, function_used_regs);
+ node->function_used_regs = function_used_regs;
node->function_used_regs_valid = 1;
}
@@ -5090,12 +5090,12 @@ get_call_reg_set_usage (rtx_insn *insn,
if (node != NULL
&& node->function_used_regs_valid)
{
- COPY_HARD_REG_SET (*reg_set, node->function_used_regs);
+ *reg_set = node->function_used_regs;
AND_HARD_REG_SET (*reg_set, default_set);
return true;
}
}
- COPY_HARD_REG_SET (*reg_set, default_set);
+ *reg_set = default_set;
targetm.remove_extra_call_preserved_regs (insn, reg_set);
return false;
}
Index: gcc/ira-build.c
===================================================================
--- gcc/ira-build.c 2019-07-10 19:41:26.379898156 +0100
+++ gcc/ira-build.c 2019-09-09 16:06:17.649228402 +0100
@@ -456,8 +456,8 @@ ira_create_object (ira_allocno_t a, int
OBJECT_CONFLICT_VEC_P (obj) = false;
OBJECT_CONFLICT_ARRAY (obj) = NULL;
OBJECT_NUM_CONFLICTS (obj) = 0;
- COPY_HARD_REG_SET (OBJECT_CONFLICT_HARD_REGS (obj), ira_no_alloc_regs);
- COPY_HARD_REG_SET (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj), ira_no_alloc_regs);
+ OBJECT_CONFLICT_HARD_REGS (obj) = ira_no_alloc_regs;
+ OBJECT_TOTAL_CONFLICT_HARD_REGS (obj) = ira_no_alloc_regs;
IOR_COMPL_HARD_REG_SET (OBJECT_CONFLICT_HARD_REGS (obj),
reg_class_contents[aclass]);
IOR_COMPL_HARD_REG_SET (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj),
@@ -2569,8 +2569,8 @@ remove_low_level_allocnos (void)
ALLOCNO_NEXT_REGNO_ALLOCNO (a) = NULL;
ALLOCNO_CAP_MEMBER (a) = NULL;
FOR_EACH_ALLOCNO_OBJECT (a, obj, oi)
- COPY_HARD_REG_SET (OBJECT_CONFLICT_HARD_REGS (obj),
- OBJECT_TOTAL_CONFLICT_HARD_REGS (obj));
+ OBJECT_CONFLICT_HARD_REGS (obj)
+ = OBJECT_TOTAL_CONFLICT_HARD_REGS (obj);
#ifdef STACK_REGS
if (ALLOCNO_TOTAL_NO_STACK_REG_P (a))
ALLOCNO_NO_STACK_REG_P (a) = true;
@@ -3108,8 +3108,8 @@ ira_flattening (int max_regno_before_emi
flattening. */
continue;
FOR_EACH_ALLOCNO_OBJECT (a, obj, oi)
- COPY_HARD_REG_SET (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj),
- OBJECT_CONFLICT_HARD_REGS (obj));
+ OBJECT_TOTAL_CONFLICT_HARD_REGS (obj)
+ = OBJECT_CONFLICT_HARD_REGS (obj);
#ifdef STACK_REGS
ALLOCNO_TOTAL_NO_STACK_REG_P (a) = ALLOCNO_NO_STACK_REG_P (a);
#endif
Index: gcc/ira-color.c
===================================================================
--- gcc/ira-color.c 2019-07-10 19:41:22.203931600 +0100
+++ gcc/ira-color.c 2019-09-09 16:06:17.649228402 +0100
@@ -261,14 +261,14 @@ add_allocno_hard_regs (HARD_REG_SET set,
allocno_hard_regs_t hv;
gcc_assert (! hard_reg_set_empty_p (set));
- COPY_HARD_REG_SET (temp.set, set);
+ temp.set = set;
if ((hv = find_hard_regs (&temp)) != NULL)
hv->cost += cost;
else
{
hv = ((struct allocno_hard_regs *)
ira_allocate (sizeof (struct allocno_hard_regs)));
- COPY_HARD_REG_SET (hv->set, set);
+ hv->set = set;
hv->cost = cost;
allocno_hard_regs_vec.safe_push (hv);
insert_hard_regs (hv);
@@ -382,7 +382,7 @@ add_allocno_hard_regs_to_forest (allocno
hard_regs_node_vec.safe_push (node);
else if (hard_reg_set_intersect_p (hv->set, node->hard_regs->set))
{
- COPY_HARD_REG_SET (temp_set, hv->set);
+ temp_set = hv->set;
AND_HARD_REG_SET (temp_set, node->hard_regs->set);
hv2 = add_allocno_hard_regs (temp_set, hv->cost);
add_allocno_hard_regs_to_forest (&node->first, hv2);
@@ -833,10 +833,10 @@ setup_left_conflict_sizes_p (ira_allocno
nobj = ALLOCNO_NUM_OBJECTS (a);
data = ALLOCNO_COLOR_DATA (a);
subnodes = allocno_hard_regs_subnodes + data->hard_regs_subnodes_start;
- COPY_HARD_REG_SET (profitable_hard_regs, data->profitable_hard_regs);
+ profitable_hard_regs = data->profitable_hard_regs;
node = data->hard_regs_node;
node_preorder_num = node->preorder_num;
- COPY_HARD_REG_SET (node_set, node->hard_regs->set);
+ node_set = node->hard_regs->set;
node_check_tick++;
for (k = 0; k < nobj; k++)
{
@@ -859,7 +859,7 @@ setup_left_conflict_sizes_p (ira_allocno
->profitable_hard_regs))
continue;
conflict_node = conflict_data->hard_regs_node;
- COPY_HARD_REG_SET (conflict_node_set, conflict_node->hard_regs->set);
+ conflict_node_set = conflict_node->hard_regs->set;
if (hard_reg_set_subset_p (node_set, conflict_node_set))
temp_node = node;
else
@@ -897,7 +897,7 @@ setup_left_conflict_sizes_p (ira_allocno
int j, n, hard_regno;
enum reg_class aclass;
- COPY_HARD_REG_SET (temp_set, temp_node->hard_regs->set);
+ temp_set = temp_node->hard_regs->set;
AND_HARD_REG_SET (temp_set, profitable_hard_regs);
aclass = ALLOCNO_CLASS (a);
for (n = 0, j = ira_class_hard_regs_num[aclass] - 1; j >= 0; j--)
@@ -1042,8 +1042,8 @@ setup_profitable_hard_regs (void)
else
{
mode = ALLOCNO_MODE (a);
- COPY_HARD_REG_SET (data->profitable_hard_regs,
- ira_useful_class_mode_regs[aclass][mode]);
+ data->profitable_hard_regs
+ = ira_useful_class_mode_regs[aclass][mode];
nobj = ALLOCNO_NUM_OBJECTS (a);
for (k = 0; k < nobj; k++)
{
@@ -1589,20 +1589,17 @@ get_conflict_and_start_profitable_regs (
for (i = 0; i < nwords; i++)
{
obj = ALLOCNO_OBJECT (a, i);
- COPY_HARD_REG_SET (conflict_regs[i],
- OBJECT_TOTAL_CONFLICT_HARD_REGS (obj));
+ conflict_regs[i] = OBJECT_TOTAL_CONFLICT_HARD_REGS (obj);
}
if (retry_p)
{
- COPY_HARD_REG_SET (*start_profitable_regs,
- reg_class_contents[ALLOCNO_CLASS (a)]);
+ *start_profitable_regs = reg_class_contents[ALLOCNO_CLASS (a)];
AND_COMPL_HARD_REG_SET (*start_profitable_regs,
ira_prohibited_class_mode_regs
[ALLOCNO_CLASS (a)][ALLOCNO_MODE (a)]);
}
else
- COPY_HARD_REG_SET (*start_profitable_regs,
- ALLOCNO_COLOR_DATA (a)->profitable_hard_regs);
+ *start_profitable_regs = ALLOCNO_COLOR_DATA (a)->profitable_hard_regs;
}
/* Return true if HARD_REGNO is ok for assigning to allocno A with
@@ -4387,7 +4384,7 @@ allocno_reload_assign (ira_allocno_t a,
for (i = 0; i < n; i++)
{
ira_object_t obj = ALLOCNO_OBJECT (a, i);
- COPY_HARD_REG_SET (saved[i], OBJECT_TOTAL_CONFLICT_HARD_REGS (obj));
+ saved[i] = OBJECT_TOTAL_CONFLICT_HARD_REGS (obj);
IOR_HARD_REG_SET (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj), forbidden_regs);
if (! flag_caller_saves && ALLOCNO_CALLS_CROSSED_NUM (a) != 0)
IOR_HARD_REG_SET (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj),
@@ -4434,7 +4431,7 @@ allocno_reload_assign (ira_allocno_t a,
for (i = 0; i < n; i++)
{
ira_object_t obj = ALLOCNO_OBJECT (a, i);
- COPY_HARD_REG_SET (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj), saved[i]);
+ OBJECT_TOTAL_CONFLICT_HARD_REGS (obj) = saved[i];
}
return reg_renumber[regno] >= 0;
}
@@ -4519,7 +4516,7 @@ ira_reassign_pseudos (int *spilled_pseud
for (i = 0; i < num; i++)
{
regno = spilled_pseudo_regs[i];
- COPY_HARD_REG_SET (forbidden_regs, bad_spill_regs);
+ forbidden_regs = bad_spill_regs;
IOR_HARD_REG_SET (forbidden_regs, pseudo_forbidden_regs[regno]);
IOR_HARD_REG_SET (forbidden_regs, pseudo_previous_regs[regno]);
gcc_assert (reg_renumber[regno] < 0);
Index: gcc/ira-conflicts.c
===================================================================
--- gcc/ira-conflicts.c 2019-07-01 09:57:16.442413855 +0100
+++ gcc/ira-conflicts.c 2019-09-09 16:06:17.649228402 +0100
@@ -660,14 +660,14 @@ print_allocno_conflicts (FILE * file, bo
putc (')', file);
}
}
- COPY_HARD_REG_SET (conflicting_hard_regs, OBJECT_TOTAL_CONFLICT_HARD_REGS (obj));
+ conflicting_hard_regs = OBJECT_TOTAL_CONFLICT_HARD_REGS (obj);
AND_COMPL_HARD_REG_SET (conflicting_hard_regs, ira_no_alloc_regs);
AND_HARD_REG_SET (conflicting_hard_regs,
reg_class_contents[ALLOCNO_CLASS (a)]);
print_hard_reg_set (file, "\n;; total conflict hard regs:",
conflicting_hard_regs);
- COPY_HARD_REG_SET (conflicting_hard_regs, OBJECT_CONFLICT_HARD_REGS (obj));
+ conflicting_hard_regs = OBJECT_CONFLICT_HARD_REGS (obj);
AND_COMPL_HARD_REG_SET (conflicting_hard_regs, ira_no_alloc_regs);
AND_HARD_REG_SET (conflicting_hard_regs,
reg_class_contents[ALLOCNO_CLASS (a)]);
@@ -741,7 +741,7 @@ ira_build_conflicts (void)
CLEAR_HARD_REG_SET (temp_hard_reg_set);
else
{
- COPY_HARD_REG_SET (temp_hard_reg_set, reg_class_contents[base]);
+ temp_hard_reg_set = reg_class_contents[base];
AND_COMPL_HARD_REG_SET (temp_hard_reg_set, ira_no_alloc_regs);
AND_HARD_REG_SET (temp_hard_reg_set, call_used_reg_set);
}
Index: gcc/ira-costs.c
===================================================================
--- gcc/ira-costs.c 2019-09-09 16:04:49.265855317 +0100
+++ gcc/ira-costs.c 2019-09-09 16:06:17.649228402 +0100
@@ -255,7 +255,7 @@ restrict_cost_classes (cost_classes_t fu
/* Calculate the set of registers in CL that belong to REGS and
are valid for MODE. */
HARD_REG_SET valid_for_cl;
- COPY_HARD_REG_SET (valid_for_cl, reg_class_contents[cl]);
+ valid_for_cl = reg_class_contents[cl];
AND_HARD_REG_SET (valid_for_cl, regs);
AND_COMPL_HARD_REG_SET (valid_for_cl,
ira_prohibited_class_mode_regs[cl][mode]);
@@ -343,7 +343,7 @@ setup_regno_cost_classes_by_aclass (int
if ((classes_ptr = cost_classes_aclass_cache[aclass]) == NULL)
{
- COPY_HARD_REG_SET (temp, reg_class_contents[aclass]);
+ temp = reg_class_contents[aclass];
AND_COMPL_HARD_REG_SET (temp, ira_no_alloc_regs);
/* We exclude classes from consideration which are subsets of
ACLASS only if ACLASS is an uniform class. */
@@ -356,7 +356,7 @@ setup_regno_cost_classes_by_aclass (int
{
/* Exclude non-uniform classes which are subsets of
ACLASS. */
- COPY_HARD_REG_SET (temp2, reg_class_contents[cl]);
+ temp2 = reg_class_contents[cl];
AND_COMPL_HARD_REG_SET (temp2, ira_no_alloc_regs);
if (hard_reg_set_subset_p (temp2, temp) && cl != aclass)
continue;
Index: gcc/ira.c
===================================================================
--- gcc/ira.c 2019-09-09 12:27:14.258372290 +0100
+++ gcc/ira.c 2019-09-09 16:06:17.649228402 +0100
@@ -471,7 +471,7 @@ setup_class_hard_regs (void)
ira_assert (SHRT_MAX >= FIRST_PSEUDO_REGISTER);
for (cl = (int) N_REG_CLASSES - 1; cl >= 0; cl--)
{
- COPY_HARD_REG_SET (temp_hard_regset, reg_class_contents[cl]);
+ temp_hard_regset = reg_class_contents[cl];
AND_COMPL_HARD_REG_SET (temp_hard_regset, no_unit_alloc_regs);
CLEAR_HARD_REG_SET (processed_hard_reg_set);
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
@@ -514,7 +514,7 @@ setup_alloc_regs (bool use_hard_frame_p)
#ifdef ADJUST_REG_ALLOC_ORDER
ADJUST_REG_ALLOC_ORDER;
#endif
- COPY_HARD_REG_SET (no_unit_alloc_regs, fixed_nonglobal_reg_set);
+ no_unit_alloc_regs = fixed_nonglobal_reg_set;
if (! use_hard_frame_p)
SET_HARD_REG_BIT (no_unit_alloc_regs, HARD_FRAME_POINTER_REGNUM);
setup_class_hard_regs ();
@@ -541,7 +541,7 @@ setup_reg_subclasses (void)
if (i == (int) NO_REGS)
continue;
- COPY_HARD_REG_SET (temp_hard_regset, reg_class_contents[i]);
+ temp_hard_regset = reg_class_contents[i];
AND_COMPL_HARD_REG_SET (temp_hard_regset, no_unit_alloc_regs);
if (hard_reg_set_empty_p (temp_hard_regset))
continue;
@@ -550,7 +550,7 @@ setup_reg_subclasses (void)
{
enum reg_class *p;
- COPY_HARD_REG_SET (temp_hard_regset2, reg_class_contents[j]);
+ temp_hard_regset2 = reg_class_contents[j];
AND_COMPL_HARD_REG_SET (temp_hard_regset2, no_unit_alloc_regs);
if (! hard_reg_set_subset_p (temp_hard_regset,
temp_hard_regset2))
@@ -605,9 +605,9 @@ setup_class_subset_and_memory_move_costs
for (cl = (int) N_REG_CLASSES - 1; cl >= 0; cl--)
for (cl2 = (int) N_REG_CLASSES - 1; cl2 >= 0; cl2--)
{
- COPY_HARD_REG_SET (temp_hard_regset, reg_class_contents[cl]);
+ temp_hard_regset = reg_class_contents[cl];
AND_COMPL_HARD_REG_SET (temp_hard_regset, no_unit_alloc_regs);
- COPY_HARD_REG_SET (temp_hard_regset2, reg_class_contents[cl2]);
+ temp_hard_regset2 = reg_class_contents[cl2];
AND_COMPL_HARD_REG_SET (temp_hard_regset2, no_unit_alloc_regs);
ira_class_subset_p[cl][cl2]
= hard_reg_set_subset_p (temp_hard_regset, temp_hard_regset2);
@@ -757,7 +757,7 @@ setup_stack_reg_pressure_class (void)
for (i = 0; i < ira_pressure_classes_num; i++)
{
cl = ira_pressure_classes[i];
- COPY_HARD_REG_SET (temp_hard_regset2, temp_hard_regset);
+ temp_hard_regset2 = temp_hard_regset;
AND_HARD_REG_SET (temp_hard_regset2, reg_class_contents[cl]);
size = hard_reg_set_size (temp_hard_regset2);
if (best < size)
@@ -816,7 +816,7 @@ setup_pressure_classes (void)
register pressure class. */
for (m = 0; m < NUM_MACHINE_MODES; m++)
{
- COPY_HARD_REG_SET (temp_hard_regset, reg_class_contents[cl]);
+ temp_hard_regset = reg_class_contents[cl];
AND_COMPL_HARD_REG_SET (temp_hard_regset, no_unit_alloc_regs);
AND_COMPL_HARD_REG_SET (temp_hard_regset,
ira_prohibited_class_mode_regs[cl][m]);
@@ -833,7 +833,7 @@ setup_pressure_classes (void)
}
curr = 0;
insert_p = true;
- COPY_HARD_REG_SET (temp_hard_regset, reg_class_contents[cl]);
+ temp_hard_regset = reg_class_contents[cl];
AND_COMPL_HARD_REG_SET (temp_hard_regset, no_unit_alloc_regs);
/* Remove so far added pressure classes which are subset of the
current candidate class. Prefer GENERAL_REGS as a pressure
@@ -845,7 +845,7 @@ setup_pressure_classes (void)
for (i = 0; i < n; i++)
{
cl2 = pressure_classes[i];
- COPY_HARD_REG_SET (temp_hard_regset2, reg_class_contents[cl2]);
+ temp_hard_regset2 = reg_class_contents[cl2];
AND_COMPL_HARD_REG_SET (temp_hard_regset2, no_unit_alloc_regs);
if (hard_reg_set_subset_p (temp_hard_regset, temp_hard_regset2)
&& (! hard_reg_set_equal_p (temp_hard_regset,
@@ -882,7 +882,7 @@ setup_pressure_classes (void)
registers available for the allocation. */
CLEAR_HARD_REG_SET (temp_hard_regset);
CLEAR_HARD_REG_SET (temp_hard_regset2);
- COPY_HARD_REG_SET (ignore_hard_regs, no_unit_alloc_regs);
+ ignore_hard_regs = no_unit_alloc_regs;
for (cl = 0; cl < LIM_REG_CLASSES; cl++)
{
/* For some targets (like MIPS with MD_REGS), there are some
@@ -1001,12 +1001,12 @@ setup_allocno_and_important_classes (voi
same set of hard registers. */
for (i = 0; i < LIM_REG_CLASSES; i++)
{
- COPY_HARD_REG_SET (temp_hard_regset, reg_class_contents[i]);
+ temp_hard_regset = reg_class_contents[i];
AND_COMPL_HARD_REG_SET (temp_hard_regset, no_unit_alloc_regs);
for (j = 0; j < n; j++)
{
cl = classes[j];
- COPY_HARD_REG_SET (temp_hard_regset2, reg_class_contents[cl]);
+ temp_hard_regset2 = reg_class_contents[cl];
AND_COMPL_HARD_REG_SET (temp_hard_regset2,
no_unit_alloc_regs);
if (hard_reg_set_equal_p (temp_hard_regset,
@@ -1037,13 +1037,12 @@ setup_allocno_and_important_classes (voi
for (cl = 0; cl < N_REG_CLASSES; cl++)
if (ira_class_hard_regs_num[cl] > 0)
{
- COPY_HARD_REG_SET (temp_hard_regset, reg_class_contents[cl]);
+ temp_hard_regset = reg_class_contents[cl];
AND_COMPL_HARD_REG_SET (temp_hard_regset, no_unit_alloc_regs);
set_p = false;
for (j = 0; j < ira_allocno_classes_num; j++)
{
- COPY_HARD_REG_SET (temp_hard_regset2,
- reg_class_contents[ira_allocno_classes[j]]);
+ temp_hard_regset2 = reg_class_contents[ira_allocno_classes[j]];
AND_COMPL_HARD_REG_SET (temp_hard_regset2, no_unit_alloc_regs);
if ((enum reg_class) cl == ira_allocno_classes[j])
break;
@@ -1118,8 +1117,7 @@ setup_class_translate_array (enum reg_cl
for (i = 0; i < classes_num; i++)
{
aclass = classes[i];
- COPY_HARD_REG_SET (temp_hard_regset,
- reg_class_contents[aclass]);
+ temp_hard_regset = reg_class_contents[aclass];
AND_HARD_REG_SET (temp_hard_regset, reg_class_contents[cl]);
AND_COMPL_HARD_REG_SET (temp_hard_regset, no_unit_alloc_regs);
if (! hard_reg_set_empty_p (temp_hard_regset))
@@ -1223,9 +1221,9 @@ setup_reg_class_relations (void)
ira_reg_classes_intersect_p[cl1][cl2] = false;
ira_reg_class_intersect[cl1][cl2] = NO_REGS;
ira_reg_class_subset[cl1][cl2] = NO_REGS;
- COPY_HARD_REG_SET (temp_hard_regset, reg_class_contents[cl1]);
+ temp_hard_regset = reg_class_contents[cl1];
AND_COMPL_HARD_REG_SET (temp_hard_regset, no_unit_alloc_regs);
- COPY_HARD_REG_SET (temp_set2, reg_class_contents[cl2]);
+ temp_set2 = reg_class_contents[cl2];
AND_COMPL_HARD_REG_SET (temp_set2, no_unit_alloc_regs);
if (hard_reg_set_empty_p (temp_hard_regset)
&& hard_reg_set_empty_p (temp_set2))
@@ -1264,15 +1262,15 @@ setup_reg_class_relations (void)
}
ira_reg_class_subunion[cl1][cl2] = NO_REGS;
ira_reg_class_superunion[cl1][cl2] = NO_REGS;
- COPY_HARD_REG_SET (intersection_set, reg_class_contents[cl1]);
+ intersection_set = reg_class_contents[cl1];
AND_HARD_REG_SET (intersection_set, reg_class_contents[cl2]);
AND_COMPL_HARD_REG_SET (intersection_set, no_unit_alloc_regs);
- COPY_HARD_REG_SET (union_set, reg_class_contents[cl1]);
+ union_set = reg_class_contents[cl1];
IOR_HARD_REG_SET (union_set, reg_class_contents[cl2]);
AND_COMPL_HARD_REG_SET (union_set, no_unit_alloc_regs);
for (cl3 = 0; cl3 < N_REG_CLASSES; cl3++)
{
- COPY_HARD_REG_SET (temp_hard_regset, reg_class_contents[cl3]);
+ temp_hard_regset = reg_class_contents[cl3];
AND_COMPL_HARD_REG_SET (temp_hard_regset, no_unit_alloc_regs);
if (hard_reg_set_subset_p (temp_hard_regset, intersection_set))
{
@@ -1281,10 +1279,9 @@ setup_reg_class_relations (void)
of CL1 and CL2. */
if (important_class_p[cl3])
{
- COPY_HARD_REG_SET
- (temp_set2,
- reg_class_contents
- [(int) ira_reg_class_intersect[cl1][cl2]]);
+ temp_set2
+ = (reg_class_contents
+ [ira_reg_class_intersect[cl1][cl2]]);
AND_COMPL_HARD_REG_SET (temp_set2, no_unit_alloc_regs);
if (! hard_reg_set_subset_p (temp_hard_regset, temp_set2)
/* If the allocatable hard register sets are
@@ -1302,9 +1299,8 @@ setup_reg_class_relations (void)
ira_reg_class_intersect[cl1][cl2]])))))
ira_reg_class_intersect[cl1][cl2] = (enum reg_class) cl3;
}
- COPY_HARD_REG_SET
- (temp_set2,
- reg_class_contents[(int) ira_reg_class_subset[cl1][cl2]]);
+ temp_set2
+ = reg_class_contents[ira_reg_class_subset[cl1][cl2]];
AND_COMPL_HARD_REG_SET (temp_set2, no_unit_alloc_regs);
if (! hard_reg_set_subset_p (temp_hard_regset, temp_set2)
/* Ignore unavailable hard registers and prefer
@@ -1322,9 +1318,8 @@ setup_reg_class_relations (void)
/* CL3 allocatable hard register set is inside of
union of allocatable hard register sets of CL1
and CL2. */
- COPY_HARD_REG_SET
- (temp_set2,
- reg_class_contents[(int) ira_reg_class_subunion[cl1][cl2]]);
+ temp_set2
+ = reg_class_contents[ira_reg_class_subunion[cl1][cl2]];
AND_COMPL_HARD_REG_SET (temp_set2, no_unit_alloc_regs);
if (ira_reg_class_subunion[cl1][cl2] == NO_REGS
|| (hard_reg_set_subset_p (temp_set2, temp_hard_regset)
@@ -1347,9 +1342,8 @@ setup_reg_class_relations (void)
/* CL3 allocatable hard register set contains union
of allocatable hard register sets of CL1 and
CL2. */
- COPY_HARD_REG_SET
- (temp_set2,
- reg_class_contents[(int) ira_reg_class_superunion[cl1][cl2]]);
+ temp_set2
+ = reg_class_contents[ira_reg_class_superunion[cl1][cl2]];
AND_COMPL_HARD_REG_SET (temp_set2, no_unit_alloc_regs);
if (ira_reg_class_superunion[cl1][cl2] == NO_REGS
|| (hard_reg_set_subset_p (temp_hard_regset, temp_set2)
@@ -1499,7 +1493,7 @@ setup_prohibited_class_mode_regs (void)
for (cl = (int) N_REG_CLASSES - 1; cl >= 0; cl--)
{
- COPY_HARD_REG_SET (temp_hard_regset, reg_class_contents[cl]);
+ temp_hard_regset = reg_class_contents[cl];
AND_COMPL_HARD_REG_SET (temp_hard_regset, no_unit_alloc_regs);
for (j = 0; j < NUM_MACHINE_MODES; j++)
{
@@ -2305,7 +2299,7 @@ ira_setup_eliminable_regset (void)
if (frame_pointer_needed)
df_set_regs_ever_live (HARD_FRAME_POINTER_REGNUM, true);
- COPY_HARD_REG_SET (ira_no_alloc_regs, no_unit_alloc_regs);
+ ira_no_alloc_regs = no_unit_alloc_regs;
CLEAR_HARD_REG_SET (eliminable_regset);
compute_regs_asm_clobbered ();
Index: gcc/lra-assigns.c
===================================================================
--- gcc/lra-assigns.c 2019-05-29 10:49:37.468707934 +0100
+++ gcc/lra-assigns.c 2019-09-09 16:06:17.649228402 +0100
@@ -493,7 +493,7 @@ find_hard_regno_for_1 (int regno, int *c
HARD_REG_SET impossible_start_hard_regs, available_regs;
if (hard_reg_set_empty_p (regno_set))
- COPY_HARD_REG_SET (conflict_set, lra_no_alloc_regs);
+ conflict_set = lra_no_alloc_regs;
else
{
COMPL_HARD_REG_SET (conflict_set, regno_set);
@@ -622,7 +622,7 @@ find_hard_regno_for_1 (int regno, int *c
biggest_nregs = hard_regno_nregs (hard_regno, biggest_mode);
nregs_diff = (biggest_nregs
- hard_regno_nregs (hard_regno, PSEUDO_REGNO_MODE (regno)));
- COPY_HARD_REG_SET (available_regs, reg_class_contents[rclass]);
+ available_regs = reg_class_contents[rclass];
AND_COMPL_HARD_REG_SET (available_regs, lra_no_alloc_regs);
for (i = 0; i < rclass_size; i++)
{
@@ -1217,7 +1217,7 @@ setup_live_pseudos_and_spill_after_risky
sparseset_set_bit (live_range_hard_reg_pseudos, r2->regno);
}
}
- COPY_HARD_REG_SET (conflict_set, lra_no_alloc_regs);
+ conflict_set = lra_no_alloc_regs;
IOR_HARD_REG_SET (conflict_set, lra_reg_info[regno].conflict_hard_regs);
val = lra_reg_info[regno].val;
offset = lra_reg_info[regno].offset;
Index: gcc/lra-constraints.c
===================================================================
--- gcc/lra-constraints.c 2019-07-31 08:32:52.976482754 +0100
+++ gcc/lra-constraints.c 2019-09-09 16:06:17.653228374 +0100
@@ -1854,7 +1854,7 @@ prohibited_class_reg_set_mode_p (enum re
HARD_REG_SET temp;
lra_assert (hard_reg_set_subset_p (reg_class_contents[rclass], set));
- COPY_HARD_REG_SET (temp, set);
+ temp = set;
AND_COMPL_HARD_REG_SET (temp, lra_no_alloc_regs);
return (hard_reg_set_subset_p
(temp, ira_prohibited_class_mode_regs[rclass][mode]));
@@ -2288,7 +2288,7 @@ process_alt_operands (int only_alternati
reloads. */
badop = false;
this_alternative = curr_alt[m];
- COPY_HARD_REG_SET (this_alternative_set, curr_alt_set[m]);
+ this_alternative_set = curr_alt_set[m];
winreg = this_alternative != NO_REGS;
break;
}
@@ -2517,8 +2517,7 @@ process_alt_operands (int only_alternati
{
HARD_REG_SET available_regs;
- COPY_HARD_REG_SET (available_regs,
- reg_class_contents[this_alternative]);
+ available_regs = reg_class_contents[this_alternative];
AND_COMPL_HARD_REG_SET
(available_regs,
ira_prohibited_class_mode_regs[this_alternative][mode]);
@@ -2888,7 +2887,7 @@ process_alt_operands (int only_alternati
goto fail;
}
curr_alt[nop] = this_alternative;
- COPY_HARD_REG_SET (curr_alt_set[nop], this_alternative_set);
+ curr_alt_set[nop] = this_alternative_set;
curr_alt_win[nop] = this_alternative_win;
curr_alt_match_win[nop] = this_alternative_match_win;
curr_alt_offmemok[nop] = this_alternative_offmemok;
@@ -6246,7 +6245,7 @@ inherit_in_ebb (rtx_insn *head, rtx_insn
bitmap_clear (&invalid_invariant_regs);
last_processed_bb = NULL;
CLEAR_HARD_REG_SET (potential_reload_hard_regs);
- COPY_HARD_REG_SET (live_hard_regs, eliminable_regset);
+ live_hard_regs = eliminable_regset;
IOR_HARD_REG_SET (live_hard_regs, lra_no_alloc_regs);
/* We don't process new insns generated in the loop. */
for (curr_insn = tail; curr_insn != PREV_INSN (head); curr_insn = prev_insn)
Index: gcc/lra-lives.c
===================================================================
--- gcc/lra-lives.c 2019-07-31 08:32:52.976482754 +0100
+++ gcc/lra-lives.c 2019-09-09 16:06:17.653228374 +0100
@@ -929,7 +929,7 @@ process_bb_lives (basic_block bb, int &c
{
call_insn = curr_insn;
if (! flag_ipa_ra && ! targetm.return_call_with_max_clobbers)
- COPY_HARD_REG_SET(last_call_used_reg_set, call_used_reg_set);
+ last_call_used_reg_set = call_used_reg_set;
else
{
HARD_REG_SET this_call_used_reg_set;
@@ -953,7 +953,7 @@ process_bb_lives (basic_block bb, int &c
last_call_used_reg_set,
last_call_insn);
}
- COPY_HARD_REG_SET(last_call_used_reg_set, this_call_used_reg_set);
+ last_call_used_reg_set = this_call_used_reg_set;
last_call_insn = call_insn;
}
Index: gcc/lra-spills.c
===================================================================
--- gcc/lra-spills.c 2019-08-19 15:57:56.854306050 +0100
+++ gcc/lra-spills.c 2019-09-09 16:06:17.653228374 +0100
@@ -243,7 +243,7 @@ assign_spill_hard_regs (int *pseudo_regn
/* Set up reserved hard regs for every program point. */
reserved_hard_regs = XNEWVEC (HARD_REG_SET, lra_live_max_point);
for (p = 0; p < lra_live_max_point; p++)
- COPY_HARD_REG_SET (reserved_hard_regs[p], lra_no_alloc_regs);
+ reserved_hard_regs[p] = lra_no_alloc_regs;
for (i = FIRST_PSEUDO_REGISTER; i < regs_num; i++)
if (lra_reg_info[i].nrefs != 0
&& (hard_regno = lra_get_regno_hard_regno (i)) >= 0)
@@ -274,8 +274,7 @@ assign_spill_hard_regs (int *pseudo_regn
continue;
}
lra_assert (spill_class != NO_REGS);
- COPY_HARD_REG_SET (conflict_hard_regs,
- lra_reg_info[regno].conflict_hard_regs);
+ conflict_hard_regs = lra_reg_info[regno].conflict_hard_regs;
for (r = lra_reg_info[regno].live_ranges; r != NULL; r = r->next)
for (p = r->start; p <= r->finish; p++)
IOR_HARD_REG_SET (conflict_hard_regs, reserved_hard_regs[p]);
Index: gcc/lra.c
===================================================================
--- gcc/lra.c 2019-08-19 15:57:56.830306225 +0100
+++ gcc/lra.c 2019-09-09 16:06:17.653228374 +0100
@@ -2384,7 +2384,7 @@ lra (FILE *f)
need it. */
emit_note (NOTE_INSN_DELETED);
- COPY_HARD_REG_SET (lra_no_alloc_regs, ira_no_alloc_regs);
+ lra_no_alloc_regs = ira_no_alloc_regs;
init_reg_info ();
expand_reg_info ();
Index: gcc/mode-switching.c
===================================================================
--- gcc/mode-switching.c 2019-09-09 12:27:14.262372261 +0100
+++ gcc/mode-switching.c 2019-09-09 16:06:17.653228374 +0100
@@ -165,7 +165,7 @@ new_seginfo (int mode, rtx_insn *insn, i
ptr->insn_ptr = insn;
ptr->bbnum = bb;
ptr->next = NULL;
- COPY_HARD_REG_SET (ptr->regs_live, regs_live);
+ ptr->regs_live = regs_live;
return ptr;
}
Index: gcc/postreload.c
===================================================================
--- gcc/postreload.c 2019-09-09 12:27:14.262372261 +0100
+++ gcc/postreload.c 2019-09-09 16:06:17.653228374 +0100
@@ -1267,7 +1267,7 @@ reload_combine (void)
REG_SET_TO_HARD_REG_SET (live, live_in);
compute_use_by_pseudos (&live, live_in);
- COPY_HARD_REG_SET (LABEL_LIVE (insn), live);
+ LABEL_LIVE (insn) = live;
IOR_HARD_REG_SET (ever_live_at_start, live);
}
}
Index: gcc/reg-stack.c
===================================================================
--- gcc/reg-stack.c 2019-08-27 07:24:49.451527444 +0100
+++ gcc/reg-stack.c 2019-09-09 16:06:17.653228374 +0100
@@ -368,7 +368,7 @@ straighten_stack (rtx_insn *insn, stack_
if (regstack->top <= 0)
return;
- COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set);
+ temp_stack.reg_set = regstack->reg_set;
for (top = temp_stack.top = regstack->top; top >= 0; top--)
temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
Index: gcc/reginfo.c
===================================================================
--- gcc/reginfo.c 2019-07-10 19:41:27.171891815 +0100
+++ gcc/reginfo.c 2019-09-09 16:06:17.653228374 +0100
@@ -230,8 +230,8 @@ save_register_info (void)
/* And similarly for reg_names. */
gcc_assert (sizeof reg_names == sizeof saved_reg_names);
memcpy (saved_reg_names, reg_names, sizeof reg_names);
- COPY_HARD_REG_SET (saved_accessible_reg_set, accessible_reg_set);
- COPY_HARD_REG_SET (saved_operand_reg_set, operand_reg_set);
+ saved_accessible_reg_set = accessible_reg_set;
+ saved_operand_reg_set = operand_reg_set;
}
/* Restore the register information. */
@@ -247,8 +247,8 @@ restore_register_info (void)
#endif
memcpy (reg_names, saved_reg_names, sizeof reg_names);
- COPY_HARD_REG_SET (accessible_reg_set, saved_accessible_reg_set);
- COPY_HARD_REG_SET (operand_reg_set, saved_operand_reg_set);
+ accessible_reg_set = saved_accessible_reg_set;
+ operand_reg_set = saved_operand_reg_set;
}
/* After switches have been processed, which perhaps alter
@@ -298,7 +298,7 @@ init_reg_sets_1 (void)
HARD_REG_SET c;
int k;
- COPY_HARD_REG_SET (c, reg_class_contents[i]);
+ c = reg_class_contents[i];
IOR_HARD_REG_SET (c, reg_class_contents[j]);
for (k = 0; k < N_REG_CLASSES; k++)
if (hard_reg_set_subset_p (reg_class_contents[k], c)
@@ -321,7 +321,7 @@ init_reg_sets_1 (void)
HARD_REG_SET c;
int k;
- COPY_HARD_REG_SET (c, reg_class_contents[i]);
+ c = reg_class_contents[i];
IOR_HARD_REG_SET (c, reg_class_contents[j]);
for (k = 0; k < N_REG_CLASSES; k++)
if (hard_reg_set_subset_p (c, reg_class_contents[k]))
@@ -450,8 +450,8 @@ init_reg_sets_1 (void)
}
}
- COPY_HARD_REG_SET (call_fixed_reg_set, fixed_reg_set);
- COPY_HARD_REG_SET (fixed_nonglobal_reg_set, fixed_reg_set);
+ call_fixed_reg_set = fixed_reg_set;
+ fixed_nonglobal_reg_set = fixed_reg_set;
/* Preserve global registers if called more than once. */
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
@@ -1323,8 +1323,7 @@ record_subregs_of_mode (rtx subreg, bool
{
valid_mode_changes[regno]
= XOBNEW (&valid_mode_changes_obstack, HARD_REG_SET);
- COPY_HARD_REG_SET (*valid_mode_changes[regno],
- simplifiable_subregs (shape));
+ *valid_mode_changes[regno] = simplifiable_subregs (shape);
}
}
Index: gcc/regrename.c
===================================================================
--- gcc/regrename.c 2019-09-09 12:27:14.262372261 +0100
+++ gcc/regrename.c 2019-09-09 16:06:17.653228374 +0100
@@ -253,7 +253,7 @@ create_new_chain (unsigned this_regno, u
CLEAR_HARD_REG_BIT (live_hard_regs, head->regno + nregs);
}
- COPY_HARD_REG_SET (head->hard_conflicts, live_hard_regs);
+ head->hard_conflicts = live_hard_regs;
bitmap_set_bit (&open_chains_set, head->id);
open_chains = head;
@@ -486,7 +486,7 @@ rename_chains (void)
&& reg == FRAME_POINTER_REGNUM))
continue;
- COPY_HARD_REG_SET (this_unavailable, unavailable);
+ this_unavailable = unavailable;
reg_class super_class = regrename_find_superclass (this_head, &n_uses,
&this_unavailable);
Index: gcc/reload1.c
===================================================================
--- gcc/reload1.c 2019-09-09 12:27:14.262372261 +0100
+++ gcc/reload1.c 2019-09-09 16:06:17.653228374 +0100
@@ -1732,7 +1732,7 @@ order_regs_for_reload (class insn_chain
HARD_REG_SET used_by_pseudos2;
reg_set_iterator rsi;
- COPY_HARD_REG_SET (bad_spill_regs, fixed_reg_set);
+ bad_spill_regs = fixed_reg_set;
memset (spill_cost, 0, sizeof spill_cost);
memset (spill_add_cost, 0, sizeof spill_add_cost);
@@ -1823,7 +1823,7 @@ find_reg (class insn_chain *chain, int o
static int regno_pseudo_regs[FIRST_PSEUDO_REGISTER];
static int best_regno_pseudo_regs[FIRST_PSEUDO_REGISTER];
- COPY_HARD_REG_SET (not_usable, bad_spill_regs);
+ not_usable = bad_spill_regs;
IOR_HARD_REG_SET (not_usable, bad_spill_regs_global);
IOR_COMPL_HARD_REG_SET (not_usable, reg_class_contents[rl->rclass]);
@@ -2007,7 +2007,7 @@ find_reload_regs (class insn_chain *chai
}
}
- COPY_HARD_REG_SET (chain->used_spill_regs, used_spill_regs_local);
+ chain->used_spill_regs = used_spill_regs_local;
IOR_HARD_REG_SET (used_spill_regs, used_spill_regs_local);
memcpy (chain->rld, rld, n_reloads * sizeof (struct reload));
Index: gcc/resource.c
===================================================================
--- gcc/resource.c 2019-09-09 12:27:14.262372261 +0100
+++ gcc/resource.c 2019-09-09 16:06:17.653228374 +0100
@@ -565,12 +565,12 @@ find_dead_or_set_registers (rtx_insn *ta
}
target_res = *res;
- COPY_HARD_REG_SET (scratch, target_set.regs);
+ scratch = target_set.regs;
AND_COMPL_HARD_REG_SET (scratch, needed.regs);
AND_COMPL_HARD_REG_SET (target_res.regs, scratch);
fallthrough_res = *res;
- COPY_HARD_REG_SET (scratch, set.regs);
+ scratch = set.regs;
AND_COMPL_HARD_REG_SET (scratch, needed.regs);
AND_COMPL_HARD_REG_SET (fallthrough_res.regs, scratch);
@@ -601,7 +601,7 @@ find_dead_or_set_registers (rtx_insn *ta
mark_referenced_resources (insn, &needed, true);
mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
- COPY_HARD_REG_SET (scratch, set.regs);
+ scratch = set.regs;
AND_COMPL_HARD_REG_SET (scratch, needed.regs);
AND_COMPL_HARD_REG_SET (res->regs, scratch);
}
@@ -960,7 +960,7 @@ mark_target_live_regs (rtx_insn *insns,
update it below. */
if (b == tinfo->block && b != -1 && tinfo->bb_tick == bb_ticks[b])
{
- COPY_HARD_REG_SET (res->regs, tinfo->live_regs);
+ res->regs = tinfo->live_regs;
return;
}
}
@@ -1121,7 +1121,7 @@ mark_target_live_regs (rtx_insn *insns,
IOR_HARD_REG_SET (current_live_regs, start_of_epilogue_needs.regs);
}
- COPY_HARD_REG_SET (res->regs, current_live_regs);
+ res->regs = current_live_regs;
if (tinfo != NULL)
{
tinfo->block = b;
@@ -1160,7 +1160,7 @@ mark_target_live_regs (rtx_insn *insns,
{
mark_referenced_resources (insn, &needed, true);
- COPY_HARD_REG_SET (scratch, needed.regs);
+ scratch = needed.regs;
AND_COMPL_HARD_REG_SET (scratch, set.regs);
IOR_HARD_REG_SET (new_resources.regs, scratch);
@@ -1171,9 +1171,7 @@ mark_target_live_regs (rtx_insn *insns,
}
if (tinfo != NULL)
- {
- COPY_HARD_REG_SET (tinfo->live_regs, res->regs);
- }
+ tinfo->live_regs = res->regs;
}
\f
/* Initialize the resources required by mark_target_live_regs ().
Index: gcc/sel-sched.c
===================================================================
--- gcc/sel-sched.c 2019-05-12 12:25:15.354272089 +0100
+++ gcc/sel-sched.c 2019-09-09 16:06:17.653228374 +0100
@@ -1238,8 +1238,7 @@ mark_unavailable_hard_regs (def_t def, s
/* Leave regs as 'available' only from the current
register class. */
- COPY_HARD_REG_SET (reg_rename_p->available_for_renaming,
- reg_class_contents[cl]);
+ reg_rename_p->available_for_renaming = reg_class_contents[cl];
mode = GET_MODE (orig_dest);
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [2/9] Remove COPY_HARD_REG_SET
2019-09-09 15:58 ` [2/9] Remove COPY_HARD_REG_SET Richard Sandiford
@ 2019-09-09 17:36 ` Jeff Law
0 siblings, 0 replies; 21+ messages in thread
From: Jeff Law @ 2019-09-09 17:36 UTC (permalink / raw)
To: gcc-patches, richard.sandiford
On 9/9/19 9:58 AM, Richard Sandiford wrote:
> This patch replaces "COPY_HARD_REG_SET (x, y)" with "x = y".
>
>
> 2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
>
> gcc/
> * hard-reg-set.h (COPY_HARD_REG_SET): Delete.
> * caller-save.c (save_call_clobbered_regs): Use assignment instead
> of COPY_HARD_REG_SET.
> * config/epiphany/epiphany.c (epiphany_compute_frame_size): Likewise.
> (epiphany_conditional_register_usage): Likewise.
> * config/frv/frv.c (frv_ifcvt_modify_tests): Likewise.
> * config/gcn/gcn.c (gcn_md_reorg): Likewise.
> * config/ia64/ia64.c (ia64_compute_frame_size): Likewise.
> * config/m32c/m32c.c (m32c_register_move_cost): Likewise.
> * config/m68k/m68k.c (m68k_conditional_register_usage): Likewise.
> * config/mips/mips.c (mips_class_max_nregs): Likewise.
> * config/pdp11/pdp11.c (pdp11_conditional_register_usage): Likewise.
> * config/rs6000/rs6000.c (rs6000_register_move_cost): Likewise.
> * config/sh/sh.c (output_stack_adjust): Likewise.
> * final.c (collect_fn_hard_reg_usage): Likewise.
> (get_call_reg_set_usage): Likewise.
> * ira-build.c (ira_create_object, remove_low_level_allocnos)
> (ira_flattening): Likewise.
> * ira-color.c (add_allocno_hard_regs, add_allocno_hard_regs_to_forest)
> (setup_left_conflict_sizes_p, setup_profitable_hard_regs)
> (get_conflict_and_start_profitable_regs, allocno_reload_assign)
> (ira_reassign_pseudos): Likewise.
> * ira-conflicts.c (print_allocno_conflicts): Likewise.
> (ira_build_conflicts): Likewise.
> * ira-costs.c (restrict_cost_classes): Likewise.
> (setup_regno_cost_classes_by_aclass): Likewise.
> * ira.c (setup_class_hard_regs, setup_alloc_regs): Likewise.
> (setup_reg_subclasses, setup_class_subset_and_memory_move_costs)
> (setup_stack_reg_pressure_class, setup_pressure_classes)
> (setup_allocno_and_important_classes, setup_class_translate_array)
> (setup_reg_class_relations, setup_prohibited_class_mode_regs)
> (ira_setup_eliminable_regset): Likewise.
> * lra-assigns.c (find_hard_regno_for_1): Likewise.
> (setup_live_pseudos_and_spill_after_risky_transforms): Likewise.
> * lra-constraints.c (prohibited_class_reg_set_mode_p): Likewise.
> (process_alt_operands, inherit_in_ebb): Likewise.
> * lra-lives.c (process_bb_lives): Likewise.
> * lra-spills.c (assign_spill_hard_regs): Likewise.
> * lra.c (lra): Likewise.
> * mode-switching.c (new_seginfo): Likewise.
> * postreload.c (reload_combine): Likewise.
> * reg-stack.c (straighten_stack): Likewise.
> * reginfo.c (save_register_info, restore_register_info): Likewise.
> (init_reg_sets_1, record_subregs_of_mode): Likewise
> * regrename.c (create_new_chain, rename_chains): Likewise.
> * reload1.c (order_regs_for_reload, find_reg): Likewise.
> (find_reload_regs): Likewise.
> * resource.c (find_dead_or_set_registers): Likewise.
> (mark_target_live_regs): Likewise.
> * sel-sched.c (mark_unavailable_hard_regs): Likewise.
OK
jeff
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* [3/9] Remove COMPL_HARD_REG_SET
2019-09-09 15:52 [0/9] Make HARD_REG_SETs easier to use Richard Sandiford
2019-09-09 15:54 ` [1/9] Simplify the implementation of HARD_REG_SET Richard Sandiford
2019-09-09 15:58 ` [2/9] Remove COPY_HARD_REG_SET Richard Sandiford
@ 2019-09-09 15:59 ` Richard Sandiford
2019-09-09 17:37 ` Jeff Law
2019-09-09 16:00 ` [4/9] Remove AND_HARD_REG_SET Richard Sandiford
` (5 subsequent siblings)
8 siblings, 1 reply; 21+ messages in thread
From: Richard Sandiford @ 2019-09-09 15:59 UTC (permalink / raw)
To: gcc-patches
"COMPL_HARD_REG_SET (x, y)" becomes "x = ~y".
2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* hard-reg-set.h (HARD_REG_SET::operator~): New function.
(COMPL_HARD_REG_SET): Delete.
* config/c6x/c6x.c (c6x_call_saved_register_used): Use ~ instead
of COMPL_HARD_REG_SET.
(try_rename_operands): Likewise.
* config/sh/sh.c (push_regs): Likewise.
* lra-assigns.c (find_hard_regno_for_1): Likewise.
* lra-constraints.c (contains_reg_p): Likewise.
* reload1.c (finish_spills, choose_reload_regs_init): Likewise.
Index: gcc/hard-reg-set.h
===================================================================
--- gcc/hard-reg-set.h 2019-09-09 16:06:17.649228402 +0100
+++ gcc/hard-reg-set.h 2019-09-09 16:06:54.720965449 +0100
@@ -53,6 +53,15 @@ #define HARD_REG_SET_LONGS \
struct HARD_REG_SET
{
+ HARD_REG_SET
+ operator~ () const
+ {
+ HARD_REG_SET res;
+ for (unsigned int i = 0; i < ARRAY_SIZE (elts); ++i)
+ res.elts[i] = ~elts[i];
+ return res;
+ }
+
HARD_REG_ELT_TYPE elts[HARD_REG_SET_LONGS];
};
typedef const HARD_REG_SET &const_hard_reg_set;
@@ -83,11 +92,6 @@ #define HARD_CONST(X) ((HARD_REG_ELT_TYP
CLEAR_HARD_REG_SET and SET_HARD_REG_SET.
These take just one argument.
- Also define macros for copying the complement of a hard reg set:
- COMPL_HARD_REG_SET.
- This takes two arguments TO and FROM; it reads from FROM
- and stores into TO.
-
Also define macros for combining hard reg sets:
IOR_HARD_REG_SET and AND_HARD_REG_SET.
These take two arguments TO and FROM; they read from FROM
@@ -116,8 +120,6 @@ #define TEST_HARD_REG_BIT(SET, BIT) \
#define CLEAR_HARD_REG_SET(TO) ((TO) = HARD_CONST (0))
#define SET_HARD_REG_SET(TO) ((TO) = ~ HARD_CONST (0))
-#define COMPL_HARD_REG_SET(TO, FROM) ((TO) = ~(FROM))
-
#define IOR_HARD_REG_SET(TO, FROM) ((TO) |= (FROM))
#define IOR_COMPL_HARD_REG_SET(TO, FROM) ((TO) |= ~ (FROM))
#define AND_HARD_REG_SET(TO, FROM) ((TO) &= (FROM))
@@ -185,13 +187,6 @@ SET_HARD_REG_SET (HARD_REG_SET &set)
}
inline void
-COMPL_HARD_REG_SET (HARD_REG_SET &to, const_hard_reg_set from)
-{
- for (unsigned int i = 0; i < ARRAY_SIZE (to.elts); ++i)
- to.elts[i] = ~from.elts[i];
-}
-
-inline void
AND_HARD_REG_SET (HARD_REG_SET &to, const_hard_reg_set from)
{
for (unsigned int i = 0; i < ARRAY_SIZE (to.elts); ++i)
Index: gcc/config/c6x/c6x.c
===================================================================
--- gcc/config/c6x/c6x.c 2019-09-09 12:27:14.242372402 +0100
+++ gcc/config/c6x/c6x.c 2019-09-09 16:06:54.720965449 +0100
@@ -1094,7 +1094,7 @@ c6x_call_saved_register_used (tree call_
INIT_CUMULATIVE_ARGS (cum_v, NULL, NULL, 0, 0);
cum = pack_cumulative_args (&cum_v);
- COMPL_HARD_REG_SET (call_saved_regset, call_used_reg_set);
+ call_saved_regset = ~call_used_reg_set;
for (i = 0; i < call_expr_nargs (call_expr); i++)
{
parameter = CALL_EXPR_ARG (call_expr, i);
@@ -3472,7 +3472,7 @@ try_rename_operands (rtx_insn *head, rtx
}
/* If we get here, we can do the renaming. */
- COMPL_HARD_REG_SET (unavailable, reg_class_contents[(int) super_class]);
+ unavailable = ~reg_class_contents[super_class];
old_reg = this_head->regno;
best_reg =
Index: gcc/config/sh/sh.c
===================================================================
--- gcc/config/sh/sh.c 2019-09-09 16:06:17.649228402 +0100
+++ gcc/config/sh/sh.c 2019-09-09 16:06:54.720965449 +0100
@@ -6908,11 +6908,8 @@ push_regs (HARD_REG_SET *mask, bool inte
if (i == FIRST_FP_REG && interrupt_handler && TARGET_FMOVD
&& hard_reg_set_intersect_p (*mask, reg_class_contents[DF_REGS]))
{
- HARD_REG_SET unsaved;
-
push (FPSCR_REG);
- COMPL_HARD_REG_SET (unsaved, *mask);
- fpscr_set_from_mem (NORMAL_MODE (FP_MODE), unsaved);
+ fpscr_set_from_mem (NORMAL_MODE (FP_MODE), ~*mask);
skip_fpscr = true;
}
if (i != PR_REG
Index: gcc/lra-assigns.c
===================================================================
--- gcc/lra-assigns.c 2019-09-09 16:06:17.649228402 +0100
+++ gcc/lra-assigns.c 2019-09-09 16:06:54.724965420 +0100
@@ -496,7 +496,7 @@ find_hard_regno_for_1 (int regno, int *c
conflict_set = lra_no_alloc_regs;
else
{
- COMPL_HARD_REG_SET (conflict_set, regno_set);
+ conflict_set = ~regno_set;
IOR_HARD_REG_SET (conflict_set, lra_no_alloc_regs);
}
rclass = regno_allocno_class_array[regno];
Index: gcc/lra-constraints.c
===================================================================
--- gcc/lra-constraints.c 2019-09-09 16:06:17.653228374 +0100
+++ gcc/lra-constraints.c 2019-09-09 16:06:54.724965420 +0100
@@ -4559,7 +4559,7 @@ contains_reg_p (rtx x, bool hard_reg_p,
regno = lra_get_regno_hard_regno (regno);
if (regno < 0)
return false;
- COMPL_HARD_REG_SET (alloc_regs, lra_no_alloc_regs);
+ alloc_regs = ~lra_no_alloc_regs;
return overlaps_hard_reg_set_p (alloc_regs, GET_MODE (x), regno);
}
else
Index: gcc/reload1.c
===================================================================
--- gcc/reload1.c 2019-09-09 16:06:17.653228374 +0100
+++ gcc/reload1.c 2019-09-09 16:06:54.724965420 +0100
@@ -4310,7 +4310,7 @@ finish_spills (int global)
may be not included in the value calculated here because
of possible removing caller-saves insns (see function
delete_caller_save_insns. */
- COMPL_HARD_REG_SET (chain->used_spill_regs, used_by_pseudos);
+ chain->used_spill_regs = ~used_by_pseudos;
AND_HARD_REG_SET (chain->used_spill_regs, used_spill_regs);
}
}
@@ -6257,7 +6257,7 @@ choose_reload_regs_init (class insn_chai
CLEAR_HARD_REG_SET (reload_reg_used_in_outaddr_addr[i]);
}
- COMPL_HARD_REG_SET (reload_reg_unavailable, chain->used_spill_regs);
+ reload_reg_unavailable = ~chain->used_spill_regs;
CLEAR_HARD_REG_SET (reload_reg_used_for_inherit);
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [3/9] Remove COMPL_HARD_REG_SET
2019-09-09 15:59 ` [3/9] Remove COMPL_HARD_REG_SET Richard Sandiford
@ 2019-09-09 17:37 ` Jeff Law
0 siblings, 0 replies; 21+ messages in thread
From: Jeff Law @ 2019-09-09 17:37 UTC (permalink / raw)
To: gcc-patches, richard.sandiford
On 9/9/19 9:59 AM, Richard Sandiford wrote:
> "COMPL_HARD_REG_SET (x, y)" becomes "x = ~y".
>
>
> 2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
>
> gcc/
> * hard-reg-set.h (HARD_REG_SET::operator~): New function.
> (COMPL_HARD_REG_SET): Delete.
> * config/c6x/c6x.c (c6x_call_saved_register_used): Use ~ instead
> of COMPL_HARD_REG_SET.
> (try_rename_operands): Likewise.
> * config/sh/sh.c (push_regs): Likewise.
> * lra-assigns.c (find_hard_regno_for_1): Likewise.
> * lra-constraints.c (contains_reg_p): Likewise.
> * reload1.c (finish_spills, choose_reload_regs_init): Likewise.
OK
jeff
^ permalink raw reply [flat|nested] 21+ messages in thread
* [4/9] Remove AND_HARD_REG_SET
2019-09-09 15:52 [0/9] Make HARD_REG_SETs easier to use Richard Sandiford
` (2 preceding siblings ...)
2019-09-09 15:59 ` [3/9] Remove COMPL_HARD_REG_SET Richard Sandiford
@ 2019-09-09 16:00 ` Richard Sandiford
2019-09-09 17:38 ` Jeff Law
2019-09-09 16:00 ` [5/9] Remove IOR_HARD_REG_SET Richard Sandiford
` (4 subsequent siblings)
8 siblings, 1 reply; 21+ messages in thread
From: Richard Sandiford @ 2019-09-09 16:00 UTC (permalink / raw)
To: gcc-patches
Use "x &= y" instead of "AND_HARD_REG_SET (x, y)" (or just "x & y"
if the result is a temporary).
2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* hard-reg-set.h (HARD_REG_SET::operator&): New function.
(HARD_REG_SET::operator&): Likewise.
(AND_HARD_REG_SET): Delete.
* caller-save.c (setup_save_areas): Use "&" instead of
AND_HARD_REG_SET.
(save_call_clobbered_regs): Likewise.
* config/gcn/gcn.c (gcn_md_reorg): Likewise.
* config/m32c/m32c.c (reduce_class): Likewise.
* config/rs6000/rs6000.c (rs6000_register_move_cost): Likewise.
* final.c (get_call_reg_set_usage): Likewise.
* ira-color.c (add_allocno_hard_regs_to_forest): Likewise.
(setup_left_conflict_sizes_p): Likewise.
* ira-conflicts.c (print_allocno_conflicts): Likewise.
(ira_build_conflicts): Likewise.
* ira-costs.c (restrict_cost_classes): Likewise.
* ira.c (setup_stack_reg_pressure_class, setup_class_translate_array)
(setup_reg_class_relations): Likewise.
* reginfo.c (init_reg_sets_1, record_subregs_of_mode): Likewise.
* reload1.c (maybe_fix_stack_asms, finish_spills): Likewise.
* resource.c (find_dead_or_set_registers): Likewise.
* sel-sched.c (mark_unavailable_hard_regs): Likewise.
Index: gcc/hard-reg-set.h
===================================================================
--- gcc/hard-reg-set.h 2019-09-09 16:06:54.720965449 +0100
+++ gcc/hard-reg-set.h 2019-09-09 16:07:28.372726754 +0100
@@ -62,6 +62,23 @@ struct HARD_REG_SET
return res;
}
+ HARD_REG_SET
+ operator& (const HARD_REG_SET &other) const
+ {
+ HARD_REG_SET res;
+ for (unsigned int i = 0; i < ARRAY_SIZE (elts); ++i)
+ res.elts[i] = elts[i] & other.elts[i];
+ return res;
+ }
+
+ HARD_REG_SET &
+ operator&= (const HARD_REG_SET &other)
+ {
+ for (unsigned int i = 0; i < ARRAY_SIZE (elts); ++i)
+ elts[i] &= other.elts[i];
+ return *this;
+ }
+
HARD_REG_ELT_TYPE elts[HARD_REG_SET_LONGS];
};
typedef const HARD_REG_SET &const_hard_reg_set;
@@ -92,10 +109,10 @@ #define HARD_CONST(X) ((HARD_REG_ELT_TYP
CLEAR_HARD_REG_SET and SET_HARD_REG_SET.
These take just one argument.
- Also define macros for combining hard reg sets:
- IOR_HARD_REG_SET and AND_HARD_REG_SET.
- These take two arguments TO and FROM; they read from FROM
- and combine bitwise into TO. Define also two variants
+ Also define a macro for combining hard reg sets:
+ IOR_HARD_REG_SET
+ This takes two arguments TO and FROM; it reads from FROM
+ and combines bitwise into TO. Define also
IOR_COMPL_HARD_REG_SET and AND_COMPL_HARD_REG_SET
which use the complement of the set FROM.
@@ -122,7 +139,6 @@ #define SET_HARD_REG_SET(TO) ((TO) = ~ H
#define IOR_HARD_REG_SET(TO, FROM) ((TO) |= (FROM))
#define IOR_COMPL_HARD_REG_SET(TO, FROM) ((TO) |= ~ (FROM))
-#define AND_HARD_REG_SET(TO, FROM) ((TO) &= (FROM))
#define AND_COMPL_HARD_REG_SET(TO, FROM) ((TO) &= ~ (FROM))
static inline bool
@@ -187,13 +203,6 @@ SET_HARD_REG_SET (HARD_REG_SET &set)
}
inline void
-AND_HARD_REG_SET (HARD_REG_SET &to, const_hard_reg_set from)
-{
- for (unsigned int i = 0; i < ARRAY_SIZE (to.elts); ++i)
- to.elts[i] &= from.elts[i];
-}
-
-inline void
AND_COMPL_HARD_REG_SET (HARD_REG_SET &to, const_hard_reg_set from)
{
for (unsigned int i = 0; i < ARRAY_SIZE (to.elts); ++i)
Index: gcc/caller-save.c
===================================================================
--- gcc/caller-save.c 2019-09-09 16:06:17.629228543 +0100
+++ gcc/caller-save.c 2019-09-09 16:07:28.364726810 +0100
@@ -457,7 +457,7 @@ setup_save_areas (void)
AND_COMPL_HARD_REG_SET (used_regs, call_fixed_reg_set);
AND_COMPL_HARD_REG_SET (used_regs, this_insn_sets);
- AND_HARD_REG_SET (hard_regs_to_save, used_regs);
+ hard_regs_to_save &= used_regs;
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
{
@@ -542,7 +542,7 @@ setup_save_areas (void)
AND_COMPL_HARD_REG_SET (used_regs, call_fixed_reg_set);
AND_COMPL_HARD_REG_SET (used_regs, this_insn_sets);
- AND_HARD_REG_SET (hard_regs_to_save, used_regs);
+ hard_regs_to_save &= used_regs;
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
{
@@ -781,7 +781,7 @@ save_call_clobbered_regs (void)
CLEAR_HARD_REG_SET (referenced_regs);
mark_referenced_regs (&PATTERN (insn),
mark_reg_as_referenced, NULL);
- AND_HARD_REG_SET (referenced_regs, hard_regs_saved);
+ referenced_regs &= hard_regs_saved;
}
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
@@ -857,7 +857,7 @@ save_call_clobbered_regs (void)
AND_COMPL_HARD_REG_SET (hard_regs_to_save, hard_regs_saved);
get_call_reg_set_usage (insn, &call_def_reg_set,
call_used_reg_set);
- AND_HARD_REG_SET (hard_regs_to_save, call_def_reg_set);
+ hard_regs_to_save &= call_def_reg_set;
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
Index: gcc/config/gcn/gcn.c
===================================================================
--- gcc/config/gcn/gcn.c 2019-09-09 16:06:17.633228515 +0100
+++ gcc/config/gcn/gcn.c 2019-09-09 16:07:28.364726810 +0100
@@ -4552,9 +4552,7 @@ gcn_md_reorg (void)
&& prev_insn->unit == UNIT_VECTOR
&& gcn_vmem_insn_p (itype))
{
- HARD_REG_SET regs;
- regs = prev_insn->writes;
- AND_HARD_REG_SET (regs, ireads);
+ HARD_REG_SET regs = prev_insn->writes & ireads;
if (hard_reg_set_intersect_p
(regs, reg_class_contents[(int) SGPR_REGS]))
nops_rqd = 5 - prev_insn->age;
@@ -4582,9 +4580,7 @@ gcn_md_reorg (void)
&& prev_insn->unit == UNIT_VECTOR
&& get_attr_laneselect (insn) == LANESELECT_YES)
{
- HARD_REG_SET regs;
- regs = prev_insn->writes;
- AND_HARD_REG_SET (regs, ireads);
+ HARD_REG_SET regs = prev_insn->writes & ireads;
if (hard_reg_set_intersect_p
(regs, reg_class_contents[(int) SGPR_REGS])
|| hard_reg_set_intersect_p
@@ -4598,9 +4594,7 @@ gcn_md_reorg (void)
&& prev_insn->unit == UNIT_VECTOR
&& itype == TYPE_VOP_DPP)
{
- HARD_REG_SET regs;
- regs = prev_insn->writes;
- AND_HARD_REG_SET (regs, ireads);
+ HARD_REG_SET regs = prev_insn->writes & ireads;
if (hard_reg_set_intersect_p
(regs, reg_class_contents[(int) VGPR_REGS]))
nops_rqd = 2 - prev_insn->age;
Index: gcc/config/m32c/m32c.c
===================================================================
--- gcc/config/m32c/m32c.c 2019-09-09 16:06:17.637228487 +0100
+++ gcc/config/m32c/m32c.c 2019-09-09 16:07:28.364726810 +0100
@@ -341,8 +341,7 @@ reduce_class (reg_class_t original_class
if (original_class == limiting_class)
return original_class;
- cc = reg_class_contents[original_class];
- AND_HARD_REG_SET (cc, reg_class_contents[limiting_class]);
+ cc = reg_class_contents[original_class] & reg_class_contents[limiting_class];
for (i = 0; i < LIM_REG_CLASSES; i++)
{
Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc/config/rs6000/rs6000.c 2019-09-09 16:06:17.645228430 +0100
+++ gcc/config/rs6000/rs6000.c 2019-09-09 16:07:28.368726782 +0100
@@ -21107,10 +21107,8 @@ rs6000_register_move_cost (machine_mode
Do this first so we give best-case answers for union classes
containing both gprs and vsx regs. */
HARD_REG_SET to_vsx, from_vsx;
- to_vsx = reg_class_contents[to];
- AND_HARD_REG_SET (to_vsx, reg_class_contents[VSX_REGS]);
- from_vsx = reg_class_contents[from];
- AND_HARD_REG_SET (from_vsx, reg_class_contents[VSX_REGS]);
+ to_vsx = reg_class_contents[to] & reg_class_contents[VSX_REGS];
+ from_vsx = reg_class_contents[from] & reg_class_contents[VSX_REGS];
if (!hard_reg_set_empty_p (to_vsx)
&& !hard_reg_set_empty_p (from_vsx)
&& (TARGET_VSX
Index: gcc/final.c
===================================================================
--- gcc/final.c 2019-09-09 16:06:17.649228402 +0100
+++ gcc/final.c 2019-09-09 16:07:28.372726754 +0100
@@ -5090,8 +5090,7 @@ get_call_reg_set_usage (rtx_insn *insn,
if (node != NULL
&& node->function_used_regs_valid)
{
- *reg_set = node->function_used_regs;
- AND_HARD_REG_SET (*reg_set, default_set);
+ *reg_set = node->function_used_regs & default_set;
return true;
}
}
Index: gcc/ira-color.c
===================================================================
--- gcc/ira-color.c 2019-09-09 16:06:17.649228402 +0100
+++ gcc/ira-color.c 2019-09-09 16:07:28.372726754 +0100
@@ -382,8 +382,7 @@ add_allocno_hard_regs_to_forest (allocno
hard_regs_node_vec.safe_push (node);
else if (hard_reg_set_intersect_p (hv->set, node->hard_regs->set))
{
- temp_set = hv->set;
- AND_HARD_REG_SET (temp_set, node->hard_regs->set);
+ temp_set = hv->set & node->hard_regs->set;
hv2 = add_allocno_hard_regs (temp_set, hv->cost);
add_allocno_hard_regs_to_forest (&node->first, hv2);
}
@@ -897,8 +896,7 @@ setup_left_conflict_sizes_p (ira_allocno
int j, n, hard_regno;
enum reg_class aclass;
- temp_set = temp_node->hard_regs->set;
- AND_HARD_REG_SET (temp_set, profitable_hard_regs);
+ temp_set = temp_node->hard_regs->set & profitable_hard_regs;
aclass = ALLOCNO_CLASS (a);
for (n = 0, j = ira_class_hard_regs_num[aclass] - 1; j >= 0; j--)
{
Index: gcc/ira-conflicts.c
===================================================================
--- gcc/ira-conflicts.c 2019-09-09 16:06:17.649228402 +0100
+++ gcc/ira-conflicts.c 2019-09-09 16:07:28.372726754 +0100
@@ -662,15 +662,13 @@ print_allocno_conflicts (FILE * file, bo
}
conflicting_hard_regs = OBJECT_TOTAL_CONFLICT_HARD_REGS (obj);
AND_COMPL_HARD_REG_SET (conflicting_hard_regs, ira_no_alloc_regs);
- AND_HARD_REG_SET (conflicting_hard_regs,
- reg_class_contents[ALLOCNO_CLASS (a)]);
+ conflicting_hard_regs &= reg_class_contents[ALLOCNO_CLASS (a)];
print_hard_reg_set (file, "\n;; total conflict hard regs:",
conflicting_hard_regs);
conflicting_hard_regs = OBJECT_CONFLICT_HARD_REGS (obj);
AND_COMPL_HARD_REG_SET (conflicting_hard_regs, ira_no_alloc_regs);
- AND_HARD_REG_SET (conflicting_hard_regs,
- reg_class_contents[ALLOCNO_CLASS (a)]);
+ conflicting_hard_regs &= reg_class_contents[ALLOCNO_CLASS (a)];
print_hard_reg_set (file, ";; conflict hard regs:",
conflicting_hard_regs);
putc ('\n', file);
@@ -743,7 +741,7 @@ ira_build_conflicts (void)
{
temp_hard_reg_set = reg_class_contents[base];
AND_COMPL_HARD_REG_SET (temp_hard_reg_set, ira_no_alloc_regs);
- AND_HARD_REG_SET (temp_hard_reg_set, call_used_reg_set);
+ temp_hard_reg_set &= call_used_reg_set;
}
FOR_EACH_ALLOCNO (a, ai)
{
Index: gcc/ira-costs.c
===================================================================
--- gcc/ira-costs.c 2019-09-09 16:06:17.649228402 +0100
+++ gcc/ira-costs.c 2019-09-09 16:07:28.372726754 +0100
@@ -254,9 +254,7 @@ restrict_cost_classes (cost_classes_t fu
/* Calculate the set of registers in CL that belong to REGS and
are valid for MODE. */
- HARD_REG_SET valid_for_cl;
- valid_for_cl = reg_class_contents[cl];
- AND_HARD_REG_SET (valid_for_cl, regs);
+ HARD_REG_SET valid_for_cl = reg_class_contents[cl] & regs;
AND_COMPL_HARD_REG_SET (valid_for_cl,
ira_prohibited_class_mode_regs[cl][mode]);
AND_COMPL_HARD_REG_SET (valid_for_cl, ira_no_alloc_regs);
Index: gcc/ira.c
===================================================================
--- gcc/ira.c 2019-09-09 16:06:17.649228402 +0100
+++ gcc/ira.c 2019-09-09 16:07:28.372726754 +0100
@@ -757,8 +757,7 @@ setup_stack_reg_pressure_class (void)
for (i = 0; i < ira_pressure_classes_num; i++)
{
cl = ira_pressure_classes[i];
- temp_hard_regset2 = temp_hard_regset;
- AND_HARD_REG_SET (temp_hard_regset2, reg_class_contents[cl]);
+ temp_hard_regset2 = temp_hard_regset & reg_class_contents[cl];
size = hard_reg_set_size (temp_hard_regset2);
if (best < size)
{
@@ -1117,8 +1116,8 @@ setup_class_translate_array (enum reg_cl
for (i = 0; i < classes_num; i++)
{
aclass = classes[i];
- temp_hard_regset = reg_class_contents[aclass];
- AND_HARD_REG_SET (temp_hard_regset, reg_class_contents[cl]);
+ temp_hard_regset = (reg_class_contents[aclass]
+ & reg_class_contents[cl]);
AND_COMPL_HARD_REG_SET (temp_hard_regset, no_unit_alloc_regs);
if (! hard_reg_set_empty_p (temp_hard_regset))
{
@@ -1262,8 +1261,8 @@ setup_reg_class_relations (void)
}
ira_reg_class_subunion[cl1][cl2] = NO_REGS;
ira_reg_class_superunion[cl1][cl2] = NO_REGS;
- intersection_set = reg_class_contents[cl1];
- AND_HARD_REG_SET (intersection_set, reg_class_contents[cl2]);
+ intersection_set = (reg_class_contents[cl1]
+ & reg_class_contents[cl2]);
AND_COMPL_HARD_REG_SET (intersection_set, no_unit_alloc_regs);
union_set = reg_class_contents[cl1];
IOR_HARD_REG_SET (union_set, reg_class_contents[cl2]);
Index: gcc/reginfo.c
===================================================================
--- gcc/reginfo.c 2019-09-09 16:06:17.653228374 +0100
+++ gcc/reginfo.c 2019-09-09 16:07:28.372726754 +0100
@@ -378,7 +378,7 @@ init_reg_sets_1 (void)
else
CLEAR_REG_SET (fixed_reg_set_regset);
- AND_HARD_REG_SET (operand_reg_set, accessible_reg_set);
+ operand_reg_set &= accessible_reg_set;
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
{
/* As a special exception, registers whose class is NO_REGS are
@@ -1317,8 +1317,7 @@ record_subregs_of_mode (rtx subreg, bool
}
if (valid_mode_changes[regno])
- AND_HARD_REG_SET (*valid_mode_changes[regno],
- simplifiable_subregs (shape));
+ *valid_mode_changes[regno] &= simplifiable_subregs (shape);
else
{
valid_mode_changes[regno]
Index: gcc/reload1.c
===================================================================
--- gcc/reload1.c 2019-09-09 16:06:54.724965420 +0100
+++ gcc/reload1.c 2019-09-09 16:07:28.376726726 +0100
@@ -1399,7 +1399,7 @@ maybe_fix_stack_asms (void)
/* Those of the registers which are clobbered, but allowed by the
constraints, must be usable as reload registers. So clear them
out of the life information. */
- AND_HARD_REG_SET (allowed, clobbered);
+ allowed &= clobbered;
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
if (TEST_HARD_REG_BIT (allowed, i))
{
@@ -4310,8 +4310,7 @@ finish_spills (int global)
may be not included in the value calculated here because
of possible removing caller-saves insns (see function
delete_caller_save_insns. */
- chain->used_spill_regs = ~used_by_pseudos;
- AND_HARD_REG_SET (chain->used_spill_regs, used_spill_regs);
+ chain->used_spill_regs = ~used_by_pseudos & used_spill_regs;
}
}
Index: gcc/resource.c
===================================================================
--- gcc/resource.c 2019-09-09 16:06:17.653228374 +0100
+++ gcc/resource.c 2019-09-09 16:07:28.376726726 +0100
@@ -582,7 +582,7 @@ find_dead_or_set_registers (rtx_insn *ta
&fallthrough_res, 0, jump_count,
set, needed);
IOR_HARD_REG_SET (fallthrough_res.regs, target_res.regs);
- AND_HARD_REG_SET (res->regs, fallthrough_res.regs);
+ res->regs &= fallthrough_res.regs;
break;
}
else
Index: gcc/sel-sched.c
===================================================================
--- gcc/sel-sched.c 2019-09-09 16:06:17.653228374 +0100
+++ gcc/sel-sched.c 2019-09-09 16:07:28.376726726 +0100
@@ -1245,8 +1245,7 @@ mark_unavailable_hard_regs (def_t def, s
/* Leave only registers available for this mode. */
if (!sel_hrd.regs_for_mode_ok[mode])
init_regs_for_mode (mode);
- AND_HARD_REG_SET (reg_rename_p->available_for_renaming,
- sel_hrd.regs_for_mode[mode]);
+ reg_rename_p->available_for_renaming &= sel_hrd.regs_for_mode[mode];
/* Exclude registers that are partially call clobbered. */
if (def->crosses_call
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [4/9] Remove AND_HARD_REG_SET
2019-09-09 16:00 ` [4/9] Remove AND_HARD_REG_SET Richard Sandiford
@ 2019-09-09 17:38 ` Jeff Law
0 siblings, 0 replies; 21+ messages in thread
From: Jeff Law @ 2019-09-09 17:38 UTC (permalink / raw)
To: gcc-patches, richard.sandiford
On 9/9/19 9:59 AM, Richard Sandiford wrote:
> Use "x &= y" instead of "AND_HARD_REG_SET (x, y)" (or just "x & y"
> if the result is a temporary).
>
>
> 2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
>
> gcc/
> * hard-reg-set.h (HARD_REG_SET::operator&): New function.
> (HARD_REG_SET::operator&): Likewise.
> (AND_HARD_REG_SET): Delete.
> * caller-save.c (setup_save_areas): Use "&" instead of
> AND_HARD_REG_SET.
> (save_call_clobbered_regs): Likewise.
> * config/gcn/gcn.c (gcn_md_reorg): Likewise.
> * config/m32c/m32c.c (reduce_class): Likewise.
> * config/rs6000/rs6000.c (rs6000_register_move_cost): Likewise.
> * final.c (get_call_reg_set_usage): Likewise.
> * ira-color.c (add_allocno_hard_regs_to_forest): Likewise.
> (setup_left_conflict_sizes_p): Likewise.
> * ira-conflicts.c (print_allocno_conflicts): Likewise.
> (ira_build_conflicts): Likewise.
> * ira-costs.c (restrict_cost_classes): Likewise.
> * ira.c (setup_stack_reg_pressure_class, setup_class_translate_array)
> (setup_reg_class_relations): Likewise.
> * reginfo.c (init_reg_sets_1, record_subregs_of_mode): Likewise.
> * reload1.c (maybe_fix_stack_asms, finish_spills): Likewise.
> * resource.c (find_dead_or_set_registers): Likewise.
> * sel-sched.c (mark_unavailable_hard_regs): Likewise.
>
OK.
FWIW, in case anyone is wondering, yes I see the operator overloads and
these patches seem like precisely the way we want to be using them.
jeff
^ permalink raw reply [flat|nested] 21+ messages in thread
* [5/9] Remove IOR_HARD_REG_SET
2019-09-09 15:52 [0/9] Make HARD_REG_SETs easier to use Richard Sandiford
` (3 preceding siblings ...)
2019-09-09 16:00 ` [4/9] Remove AND_HARD_REG_SET Richard Sandiford
@ 2019-09-09 16:00 ` Richard Sandiford
2019-09-09 17:39 ` Jeff Law
2019-09-09 16:01 ` [7/9] Remove IOR_COMPL_HARD_REG_SET Richard Sandiford
` (3 subsequent siblings)
8 siblings, 1 reply; 21+ messages in thread
From: Richard Sandiford @ 2019-09-09 16:00 UTC (permalink / raw)
To: gcc-patches
Use "x |= y" instead of "IOR_HARD_REG_SET (x, y)" (or just "x | y"
if the result is a temporary).
2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* hard-reg-set.h (HARD_REG_SET::operator|): New function.
(HARD_REG_SET::operator|=): Likewise.
(IOR_HARD_REG_SET): Delete.
* config/gcn/gcn.c (gcn_md_reorg): Use "|" instead of
IOR_HARD_REG_SET.
* config/m32c/m32c.c (m32c_register_move_cost): Likewise.
* config/s390/s390.c (s390_adjust_loop_scan_osc): Likewise.
* final.c (collect_fn_hard_reg_usage): Likewise.
* hw-doloop.c (scan_loop, optimize_loop): Likewise.
* ira-build.c (merge_hard_reg_conflicts): Likewise.
(ior_hard_reg_conflicts, create_cap_allocno, propagate_allocno_info)
(propagate_some_info_from_allocno): Likewise.
(copy_info_to_removed_store_destinations): Likewise.
* ira-color.c (add_allocno_hard_regs_to_forest, assign_hard_reg)
(allocno_reload_assign, ira_reassign_pseudos): Likewise.
(fast_allocation): Likewise.
* ira-conflicts.c (ira_build_conflicts): Likewise.
* ira-lives.c (make_object_dead, process_single_reg_class_operands)
(process_bb_node_lives): Likewise.
* ira.c (setup_pressure_classes, setup_reg_class_relations): Likewise.
* lra-assigns.c (find_hard_regno_for_1): Likewise.
(setup_live_pseudos_and_spill_after_risky_transforms): Likewise.
* lra-constraints.c (process_alt_operands, inherit_in_ebb): Likewise.
* lra-eliminations.c (spill_pseudos, update_reg_eliminate): Likewise.
* lra-lives.c (mark_pseudo_dead, check_pseudos_live_through_calls)
(process_bb_lives): Likewise.
* lra-spills.c (assign_spill_hard_regs): Likewise.
* postreload.c (reload_combine): Likewise.
* reginfo.c (init_reg_sets_1): Likewise.
* regrename.c (merge_overlapping_regs, find_rename_reg)
(merge_chains): Likewise.
* reload1.c (maybe_fix_stack_asms, order_regs_for_reload, find_reg)
(find_reload_regs, finish_spills, choose_reload_regs_init)
(emit_reload_insns): Likewise.
* reorg.c (redundant_insn): Likewise.
* resource.c (find_dead_or_set_registers, mark_set_resources)
(mark_target_live_regs): Likewise.
* rtlanal.c (find_all_hard_reg_sets): Likewise.
* sched-deps.c (sched_analyze_insn): Likewise.
* sel-sched.c (mark_unavailable_hard_regs): Likewise.
(find_best_reg_for_expr): Likewise.
* shrink-wrap.c (try_shrink_wrapping): Likewise.
Index: gcc/hard-reg-set.h
===================================================================
--- gcc/hard-reg-set.h 2019-09-09 16:07:28.372726754 +0100
+++ gcc/hard-reg-set.h 2019-09-09 16:08:54.788113807 +0100
@@ -79,6 +79,23 @@ struct HARD_REG_SET
return *this;
}
+ HARD_REG_SET
+ operator| (const HARD_REG_SET &other) const
+ {
+ HARD_REG_SET res;
+ for (unsigned int i = 0; i < ARRAY_SIZE (elts); ++i)
+ res.elts[i] = elts[i] | other.elts[i];
+ return res;
+ }
+
+ HARD_REG_SET &
+ operator|= (const HARD_REG_SET &other)
+ {
+ for (unsigned int i = 0; i < ARRAY_SIZE (elts); ++i)
+ elts[i] |= other.elts[i];
+ return *this;
+ }
+
HARD_REG_ELT_TYPE elts[HARD_REG_SET_LONGS];
};
typedef const HARD_REG_SET &const_hard_reg_set;
@@ -109,12 +126,10 @@ #define HARD_CONST(X) ((HARD_REG_ELT_TYP
CLEAR_HARD_REG_SET and SET_HARD_REG_SET.
These take just one argument.
- Also define a macro for combining hard reg sets:
- IOR_HARD_REG_SET
- This takes two arguments TO and FROM; it reads from FROM
- and combines bitwise into TO. Define also
+ Also define:
IOR_COMPL_HARD_REG_SET and AND_COMPL_HARD_REG_SET
- which use the complement of the set FROM.
+ These take two arguments TO and FROM; they read from FROM
+ and combines its complement bitwise into TO.
Also define:
@@ -137,7 +152,6 @@ #define TEST_HARD_REG_BIT(SET, BIT) \
#define CLEAR_HARD_REG_SET(TO) ((TO) = HARD_CONST (0))
#define SET_HARD_REG_SET(TO) ((TO) = ~ HARD_CONST (0))
-#define IOR_HARD_REG_SET(TO, FROM) ((TO) |= (FROM))
#define IOR_COMPL_HARD_REG_SET(TO, FROM) ((TO) |= ~ (FROM))
#define AND_COMPL_HARD_REG_SET(TO, FROM) ((TO) &= ~ (FROM))
@@ -210,13 +224,6 @@ AND_COMPL_HARD_REG_SET (HARD_REG_SET &to
}
inline void
-IOR_HARD_REG_SET (HARD_REG_SET &to, const_hard_reg_set from)
-{
- for (unsigned int i = 0; i < ARRAY_SIZE (to.elts); ++i)
- to.elts[i] |= from.elts[i];
-}
-
-inline void
IOR_COMPL_HARD_REG_SET (HARD_REG_SET &to, const_hard_reg_set from)
{
for (unsigned int i = 0; i < ARRAY_SIZE (to.elts); ++i)
Index: gcc/config/gcn/gcn.c
===================================================================
--- gcc/config/gcn/gcn.c 2019-09-09 16:07:28.364726810 +0100
+++ gcc/config/gcn/gcn.c 2019-09-09 16:08:54.784113835 +0100
@@ -4627,7 +4627,7 @@ gcn_md_reorg (void)
not publish the cycle times for instructions. */
prev_insn->age += 1 + nops_rqd;
- IOR_HARD_REG_SET (written, iwrites);
+ written |= iwrites;
AND_COMPL_HARD_REG_SET (prev_insn->writes, written);
}
Index: gcc/config/m32c/m32c.c
===================================================================
--- gcc/config/m32c/m32c.c 2019-09-09 16:07:28.364726810 +0100
+++ gcc/config/m32c/m32c.c 2019-09-09 16:08:54.784113835 +0100
@@ -2151,8 +2151,7 @@ m32c_register_move_cost (machine_mode mo
HARD_REG_SET cc;
/* FIXME: pick real values, but not 2 for now. */
- cc = reg_class_contents[from];
- IOR_HARD_REG_SET (cc, reg_class_contents[(int) to]);
+ cc = reg_class_contents[from] | reg_class_contents[(int) to];
if (mode == QImode
&& hard_reg_set_intersect_p (cc, reg_class_contents[R23_REGS]))
Index: gcc/config/s390/s390.c
===================================================================
--- gcc/config/s390/s390.c 2019-09-09 12:27:14.254372318 +0100
+++ gcc/config/s390/s390.c 2019-09-09 16:08:54.788113807 +0100
@@ -14073,7 +14073,7 @@ s390_adjust_loop_scan_osc (struct loop*
return false;
find_all_hard_reg_sets (insn, &newregs, true);
- IOR_HARD_REG_SET (modregs, newregs);
+ modregs |= newregs;
set = single_set (insn);
if (!set)
@@ -14104,7 +14104,7 @@ s390_adjust_loop_scan_osc (struct loop*
return false;
find_all_hard_reg_sets (insn, &newregs, true);
- IOR_HARD_REG_SET (modregs, newregs);
+ modregs |= newregs;
set = single_set (insn);
if (!set)
Index: gcc/final.c
===================================================================
--- gcc/final.c 2019-09-09 16:07:28.372726754 +0100
+++ gcc/final.c 2019-09-09 16:08:54.788113807 +0100
@@ -5010,15 +5010,15 @@ collect_fn_hard_reg_usage (void)
call_used_reg_set))
return;
- IOR_HARD_REG_SET (function_used_regs, insn_used_regs);
+ function_used_regs |= insn_used_regs;
}
find_all_hard_reg_sets (insn, &insn_used_regs, false);
- IOR_HARD_REG_SET (function_used_regs, insn_used_regs);
+ function_used_regs |= insn_used_regs;
}
/* Be conservative - mark fixed and global registers as used. */
- IOR_HARD_REG_SET (function_used_regs, fixed_reg_set);
+ function_used_regs |= fixed_reg_set;
#ifdef STACK_REGS
/* Handle STACK_REGS conservatively, since the df-framework does not
Index: gcc/hw-doloop.c
===================================================================
--- gcc/hw-doloop.c 2019-03-08 18:15:33.664751891 +0000
+++ gcc/hw-doloop.c 2019-09-09 16:08:54.788113807 +0100
@@ -141,7 +141,7 @@ scan_loop (hwloop_info loop)
CLEAR_HARD_REG_BIT (set_this_insn, REGNO (loop->iter_reg));
else if (reg_mentioned_p (loop->iter_reg, PATTERN (insn)))
loop->iter_reg_used = true;
- IOR_HARD_REG_SET (loop->regs_set_in_loop, set_this_insn);
+ loop->regs_set_in_loop |= set_this_insn;
}
}
}
@@ -581,7 +581,7 @@ optimize_loop (hwloop_info loop, struct
inner_depth = inner->depth;
/* The set of registers may be changed while optimizing the inner
loop. */
- IOR_HARD_REG_SET (loop->regs_set_in_loop, inner->regs_set_in_loop);
+ loop->regs_set_in_loop |= inner->regs_set_in_loop;
}
loop->depth = inner_depth + 1;
Index: gcc/ira-build.c
===================================================================
--- gcc/ira-build.c 2019-09-09 16:06:17.649228402 +0100
+++ gcc/ira-build.c 2019-09-09 16:08:54.792113779 +0100
@@ -602,10 +602,10 @@ merge_hard_reg_conflicts (ira_allocno_t
ira_object_t to_obj = ALLOCNO_OBJECT (to, i);
if (!total_only)
- IOR_HARD_REG_SET (OBJECT_CONFLICT_HARD_REGS (to_obj),
- OBJECT_CONFLICT_HARD_REGS (from_obj));
- IOR_HARD_REG_SET (OBJECT_TOTAL_CONFLICT_HARD_REGS (to_obj),
- OBJECT_TOTAL_CONFLICT_HARD_REGS (from_obj));
+ OBJECT_CONFLICT_HARD_REGS (to_obj)
+ |= OBJECT_CONFLICT_HARD_REGS (from_obj);
+ OBJECT_TOTAL_CONFLICT_HARD_REGS (to_obj)
+ |= OBJECT_TOTAL_CONFLICT_HARD_REGS (from_obj);
}
#ifdef STACK_REGS
if (!total_only && ALLOCNO_NO_STACK_REG_P (from))
@@ -625,8 +625,8 @@ ior_hard_reg_conflicts (ira_allocno_t a,
FOR_EACH_ALLOCNO_OBJECT (a, obj, i)
{
- IOR_HARD_REG_SET (OBJECT_CONFLICT_HARD_REGS (obj), *set);
- IOR_HARD_REG_SET (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj), *set);
+ OBJECT_CONFLICT_HARD_REGS (obj) |= *set;
+ OBJECT_TOTAL_CONFLICT_HARD_REGS (obj) |= *set;
}
}
@@ -907,8 +907,8 @@ create_cap_allocno (ira_allocno_t a)
ALLOCNO_CALLS_CROSSED_NUM (cap) = ALLOCNO_CALLS_CROSSED_NUM (a);
ALLOCNO_CHEAP_CALLS_CROSSED_NUM (cap) = ALLOCNO_CHEAP_CALLS_CROSSED_NUM (a);
- IOR_HARD_REG_SET (ALLOCNO_CROSSED_CALLS_CLOBBERED_REGS (cap),
- ALLOCNO_CROSSED_CALLS_CLOBBERED_REGS (a));
+ ALLOCNO_CROSSED_CALLS_CLOBBERED_REGS (cap)
+ |= ALLOCNO_CROSSED_CALLS_CLOBBERED_REGS (a);
if (internal_flag_ira_verbose > 2 && ira_dump_file != NULL)
{
fprintf (ira_dump_file, " Creating cap ");
@@ -2036,8 +2036,8 @@ propagate_allocno_info (void)
+= ALLOCNO_CALLS_CROSSED_NUM (a);
ALLOCNO_CHEAP_CALLS_CROSSED_NUM (parent_a)
+= ALLOCNO_CHEAP_CALLS_CROSSED_NUM (a);
- IOR_HARD_REG_SET (ALLOCNO_CROSSED_CALLS_CLOBBERED_REGS (parent_a),
- ALLOCNO_CROSSED_CALLS_CLOBBERED_REGS (a));
+ ALLOCNO_CROSSED_CALLS_CLOBBERED_REGS (parent_a)
+ |= ALLOCNO_CROSSED_CALLS_CLOBBERED_REGS (a);
ALLOCNO_EXCESS_PRESSURE_POINTS_NUM (parent_a)
+= ALLOCNO_EXCESS_PRESSURE_POINTS_NUM (a);
aclass = ALLOCNO_CLASS (a);
@@ -2419,8 +2419,8 @@ propagate_some_info_from_allocno (ira_al
ALLOCNO_CALLS_CROSSED_NUM (a) += ALLOCNO_CALLS_CROSSED_NUM (from_a);
ALLOCNO_CHEAP_CALLS_CROSSED_NUM (a)
+= ALLOCNO_CHEAP_CALLS_CROSSED_NUM (from_a);
- IOR_HARD_REG_SET (ALLOCNO_CROSSED_CALLS_CLOBBERED_REGS (a),
- ALLOCNO_CROSSED_CALLS_CLOBBERED_REGS (from_a));
+ ALLOCNO_CROSSED_CALLS_CLOBBERED_REGS (a)
+ |= ALLOCNO_CROSSED_CALLS_CLOBBERED_REGS (from_a);
ALLOCNO_EXCESS_PRESSURE_POINTS_NUM (a)
+= ALLOCNO_EXCESS_PRESSURE_POINTS_NUM (from_a);
@@ -3060,8 +3060,8 @@ copy_info_to_removed_store_destinations
+= ALLOCNO_CALLS_CROSSED_NUM (a);
ALLOCNO_CHEAP_CALLS_CROSSED_NUM (parent_a)
+= ALLOCNO_CHEAP_CALLS_CROSSED_NUM (a);
- IOR_HARD_REG_SET (ALLOCNO_CROSSED_CALLS_CLOBBERED_REGS (parent_a),
- ALLOCNO_CROSSED_CALLS_CLOBBERED_REGS (a));
+ ALLOCNO_CROSSED_CALLS_CLOBBERED_REGS (parent_a)
+ |= ALLOCNO_CROSSED_CALLS_CLOBBERED_REGS (a);
ALLOCNO_EXCESS_PRESSURE_POINTS_NUM (parent_a)
+= ALLOCNO_EXCESS_PRESSURE_POINTS_NUM (a);
merged_p = true;
Index: gcc/ira-color.c
===================================================================
--- gcc/ira-color.c 2019-09-09 16:07:28.372726754 +0100
+++ gcc/ira-color.c 2019-09-09 16:08:54.792113779 +0100
@@ -397,7 +397,7 @@ add_allocno_hard_regs_to_forest (allocno
i++)
{
node = hard_regs_node_vec[i];
- IOR_HARD_REG_SET (temp_set, node->hard_regs->set);
+ temp_set |= node->hard_regs->set;
}
hv = add_allocno_hard_regs (temp_set, hv->cost);
new_node = create_new_allocno_hard_regs_node (hv);
@@ -1798,9 +1798,8 @@ assign_hard_reg (ira_allocno_t a, bool r
hard_regno + num);
}
else
- IOR_HARD_REG_SET
- (conflicting_regs[word],
- ira_reg_mode_hard_regset[hard_regno][mode]);
+ conflicting_regs[word]
+ |= ira_reg_mode_hard_regset[hard_regno][mode];
if (hard_reg_set_subset_p (profitable_hard_regs,
conflicting_regs[word]))
goto fail;
@@ -4383,10 +4382,9 @@ allocno_reload_assign (ira_allocno_t a,
{
ira_object_t obj = ALLOCNO_OBJECT (a, i);
saved[i] = OBJECT_TOTAL_CONFLICT_HARD_REGS (obj);
- IOR_HARD_REG_SET (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj), forbidden_regs);
+ OBJECT_TOTAL_CONFLICT_HARD_REGS (obj) |= forbidden_regs;
if (! flag_caller_saves && ALLOCNO_CALLS_CROSSED_NUM (a) != 0)
- IOR_HARD_REG_SET (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj),
- call_used_reg_set);
+ OBJECT_TOTAL_CONFLICT_HARD_REGS (obj) |= call_used_reg_set;
}
ALLOCNO_ASSIGNED_P (a) = false;
aclass = ALLOCNO_CLASS (a);
@@ -4514,9 +4512,9 @@ ira_reassign_pseudos (int *spilled_pseud
for (i = 0; i < num; i++)
{
regno = spilled_pseudo_regs[i];
- forbidden_regs = bad_spill_regs;
- IOR_HARD_REG_SET (forbidden_regs, pseudo_forbidden_regs[regno]);
- IOR_HARD_REG_SET (forbidden_regs, pseudo_previous_regs[regno]);
+ forbidden_regs = (bad_spill_regs
+ | pseudo_forbidden_regs[regno]
+ | pseudo_previous_regs[regno]);
gcc_assert (reg_renumber[regno] < 0);
a = ira_regno_allocno_map[regno];
ira_mark_allocation_change (regno);
@@ -4881,11 +4879,10 @@ fast_allocation (void)
for (l = 0; l < nr; l++)
{
ira_object_t obj = ALLOCNO_OBJECT (a, l);
- IOR_HARD_REG_SET (conflict_hard_regs,
- OBJECT_CONFLICT_HARD_REGS (obj));
+ conflict_hard_regs |= OBJECT_CONFLICT_HARD_REGS (obj);
for (r = OBJECT_LIVE_RANGES (obj); r != NULL; r = r->next)
for (j = r->start; j <= r->finish; j++)
- IOR_HARD_REG_SET (conflict_hard_regs, used_hard_regs[j]);
+ conflict_hard_regs |= used_hard_regs[j];
}
aclass = ALLOCNO_CLASS (a);
ALLOCNO_ASSIGNED_P (a) = true;
@@ -4933,8 +4930,7 @@ fast_allocation (void)
ira_object_t obj = ALLOCNO_OBJECT (a, l);
for (r = OBJECT_LIVE_RANGES (obj); r != NULL; r = r->next)
for (k = r->start; k <= r->finish; k++)
- IOR_HARD_REG_SET (used_hard_regs[k],
- ira_reg_mode_hard_regset[hard_regno][mode]);
+ used_hard_regs[k] |= ira_reg_mode_hard_regset[hard_regno][mode];
}
}
ira_free (sorted_allocnos);
Index: gcc/ira-conflicts.c
===================================================================
--- gcc/ira-conflicts.c 2019-09-09 16:07:28.372726754 +0100
+++ gcc/ira-conflicts.c 2019-09-09 16:08:54.792113779 +0100
@@ -762,21 +762,15 @@ ira_build_conflicts (void)
&& REG_USERVAR_P (allocno_reg)
&& ! reg_is_parm_p (allocno_reg)))
{
- IOR_HARD_REG_SET (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj),
- call_used_reg_set);
- IOR_HARD_REG_SET (OBJECT_CONFLICT_HARD_REGS (obj),
- call_used_reg_set);
+ OBJECT_TOTAL_CONFLICT_HARD_REGS (obj) |= call_used_reg_set;
+ OBJECT_CONFLICT_HARD_REGS (obj) |= call_used_reg_set;
}
else if (ALLOCNO_CALLS_CROSSED_NUM (a) != 0)
{
- IOR_HARD_REG_SET (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj),
- no_caller_save_reg_set);
- IOR_HARD_REG_SET (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj),
- temp_hard_reg_set);
- IOR_HARD_REG_SET (OBJECT_CONFLICT_HARD_REGS (obj),
- no_caller_save_reg_set);
- IOR_HARD_REG_SET (OBJECT_CONFLICT_HARD_REGS (obj),
- temp_hard_reg_set);
+ OBJECT_TOTAL_CONFLICT_HARD_REGS (obj) |= no_caller_save_reg_set;
+ OBJECT_TOTAL_CONFLICT_HARD_REGS (obj) |= temp_hard_reg_set;
+ OBJECT_CONFLICT_HARD_REGS (obj) |= no_caller_save_reg_set;
+ OBJECT_CONFLICT_HARD_REGS (obj) |= temp_hard_reg_set;
}
/* Now we deal with paradoxical subreg cases where certain registers
Index: gcc/ira-lives.c
===================================================================
--- gcc/ira-lives.c 2019-07-01 09:58:36.789742995 +0100
+++ gcc/ira-lives.c 2019-09-09 16:08:54.792113779 +0100
@@ -188,8 +188,8 @@ make_object_dead (ira_object_t obj)
}
}
- IOR_HARD_REG_SET (OBJECT_CONFLICT_HARD_REGS (obj), hard_regs_live);
- IOR_HARD_REG_SET (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj), hard_regs_live);
+ OBJECT_CONFLICT_HARD_REGS (obj) |= hard_regs_live;
+ OBJECT_TOTAL_CONFLICT_HARD_REGS (obj) |= hard_regs_live;
/* If IGNORE_REG_FOR_CONFLICTS did not already conflict with OBJ, make
sure it still doesn't. */
@@ -990,10 +990,8 @@ process_single_reg_class_operands (bool
/* We could increase costs of A instead of making it
conflicting with the hard register. But it works worse
because it will be spilled in reload in anyway. */
- IOR_HARD_REG_SET (OBJECT_CONFLICT_HARD_REGS (obj),
- reg_class_contents[cl]);
- IOR_HARD_REG_SET (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj),
- reg_class_contents[cl]);
+ OBJECT_CONFLICT_HARD_REGS (obj) |= reg_class_contents[cl];
+ OBJECT_TOTAL_CONFLICT_HARD_REGS (obj) |= reg_class_contents[cl];
}
}
}
@@ -1275,10 +1273,10 @@ process_bb_node_lives (ira_loop_tree_nod
}
if (can_throw_internal (insn))
{
- IOR_HARD_REG_SET (OBJECT_CONFLICT_HARD_REGS (obj),
- this_call_used_reg_set);
- IOR_HARD_REG_SET (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj),
- this_call_used_reg_set);
+ OBJECT_CONFLICT_HARD_REGS (obj)
+ |= this_call_used_reg_set;
+ OBJECT_TOTAL_CONFLICT_HARD_REGS (obj)
+ |= this_call_used_reg_set;
}
if (sparseset_bit_p (allocnos_processed, num))
@@ -1295,8 +1293,8 @@ process_bb_node_lives (ira_loop_tree_nod
/* Mark it as saved at the next call. */
allocno_saved_at_call[num] = last_call_num + 1;
ALLOCNO_CALLS_CROSSED_NUM (a)++;
- IOR_HARD_REG_SET (ALLOCNO_CROSSED_CALLS_CLOBBERED_REGS (a),
- this_call_used_reg_set);
+ ALLOCNO_CROSSED_CALLS_CLOBBERED_REGS (a)
+ |= this_call_used_reg_set;
if (cheap_reg != NULL_RTX
&& ALLOCNO_REGNO (a) == (int) REGNO (cheap_reg))
ALLOCNO_CHEAP_CALLS_CROSSED_NUM (a)++;
Index: gcc/ira.c
===================================================================
--- gcc/ira.c 2019-09-09 16:07:28.372726754 +0100
+++ gcc/ira.c 2019-09-09 16:08:54.792113779 +0100
@@ -892,15 +892,15 @@ setup_pressure_classes (void)
break;
if (m >= NUM_MACHINE_MODES)
{
- IOR_HARD_REG_SET (ignore_hard_regs, reg_class_contents[cl]);
+ ignore_hard_regs |= reg_class_contents[cl];
continue;
}
for (i = 0; i < n; i++)
if ((int) pressure_classes[i] == cl)
break;
- IOR_HARD_REG_SET (temp_hard_regset2, reg_class_contents[cl]);
+ temp_hard_regset2 |= reg_class_contents[cl];
if (i < n)
- IOR_HARD_REG_SET (temp_hard_regset, reg_class_contents[cl]);
+ temp_hard_regset |= reg_class_contents[cl];
}
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
/* Some targets (like SPARC with ICC reg) have allocatable regs
@@ -1264,8 +1264,7 @@ setup_reg_class_relations (void)
intersection_set = (reg_class_contents[cl1]
& reg_class_contents[cl2]);
AND_COMPL_HARD_REG_SET (intersection_set, no_unit_alloc_regs);
- union_set = reg_class_contents[cl1];
- IOR_HARD_REG_SET (union_set, reg_class_contents[cl2]);
+ union_set = reg_class_contents[cl1] | reg_class_contents[cl2];
AND_COMPL_HARD_REG_SET (union_set, no_unit_alloc_regs);
for (cl3 = 0; cl3 < N_REG_CLASSES; cl3++)
{
Index: gcc/lra-assigns.c
===================================================================
--- gcc/lra-assigns.c 2019-09-09 16:06:54.724965420 +0100
+++ gcc/lra-assigns.c 2019-09-09 16:08:54.792113779 +0100
@@ -495,16 +495,13 @@ find_hard_regno_for_1 (int regno, int *c
if (hard_reg_set_empty_p (regno_set))
conflict_set = lra_no_alloc_regs;
else
- {
- conflict_set = ~regno_set;
- IOR_HARD_REG_SET (conflict_set, lra_no_alloc_regs);
- }
+ conflict_set = ~regno_set | lra_no_alloc_regs;
rclass = regno_allocno_class_array[regno];
rclass_intersect_p = ira_reg_classes_intersect_p[rclass];
curr_hard_regno_costs_check++;
sparseset_clear (conflict_reload_and_inheritance_pseudos);
sparseset_clear (live_range_hard_reg_pseudos);
- IOR_HARD_REG_SET (conflict_set, lra_reg_info[regno].conflict_hard_regs);
+ conflict_set |= lra_reg_info[regno].conflict_hard_regs;
biggest_mode = lra_reg_info[regno].biggest_mode;
for (r = lra_reg_info[regno].live_ranges; r != NULL; r = r->next)
{
@@ -1218,7 +1215,7 @@ setup_live_pseudos_and_spill_after_risky
}
}
conflict_set = lra_no_alloc_regs;
- IOR_HARD_REG_SET (conflict_set, lra_reg_info[regno].conflict_hard_regs);
+ conflict_set |= lra_reg_info[regno].conflict_hard_regs;
val = lra_reg_info[regno].val;
offset = lra_reg_info[regno].offset;
EXECUTE_IF_SET_IN_SPARSESET (live_range_hard_reg_pseudos, conflict_regno)
Index: gcc/lra-constraints.c
===================================================================
--- gcc/lra-constraints.c 2019-09-09 16:06:54.724965420 +0100
+++ gcc/lra-constraints.c 2019-09-09 16:08:54.796113751 +0100
@@ -2373,14 +2373,12 @@ process_alt_operands (int only_alternati
if (mode == BLKmode)
break;
this_alternative = reg_class_subunion[this_alternative][cl];
- IOR_HARD_REG_SET (this_alternative_set,
- reg_class_contents[cl]);
+ this_alternative_set |= reg_class_contents[cl];
if (costly_p)
{
this_costly_alternative
= reg_class_subunion[this_costly_alternative][cl];
- IOR_HARD_REG_SET (this_costly_alternative_set,
- reg_class_contents[cl]);
+ this_costly_alternative_set |= reg_class_contents[cl];
}
winreg = true;
if (REG_P (op))
@@ -6245,8 +6243,7 @@ inherit_in_ebb (rtx_insn *head, rtx_insn
bitmap_clear (&invalid_invariant_regs);
last_processed_bb = NULL;
CLEAR_HARD_REG_SET (potential_reload_hard_regs);
- live_hard_regs = eliminable_regset;
- IOR_HARD_REG_SET (live_hard_regs, lra_no_alloc_regs);
+ live_hard_regs = eliminable_regset | lra_no_alloc_regs;
/* We don't process new insns generated in the loop. */
for (curr_insn = tail; curr_insn != PREV_INSN (head); curr_insn = prev_insn)
{
@@ -6316,8 +6313,7 @@ inherit_in_ebb (rtx_insn *head, rtx_insn
else
setup_next_usage_insn (src_regno, curr_insn, reloads_num, false);
if (hard_reg_set_subset_p (reg_class_contents[cl], live_hard_regs))
- IOR_HARD_REG_SET (potential_reload_hard_regs,
- reg_class_contents[cl]);
+ potential_reload_hard_regs |= reg_class_contents[cl];
}
else if (src_regno < 0
&& dst_regno >= lra_constraint_new_regno_start
@@ -6334,8 +6330,7 @@ inherit_in_ebb (rtx_insn *head, rtx_insn
if (process_invariant_for_inheritance (SET_DEST (curr_set), SET_SRC (curr_set)))
change_p = true;
if (hard_reg_set_subset_p (reg_class_contents[cl], live_hard_regs))
- IOR_HARD_REG_SET (potential_reload_hard_regs,
- reg_class_contents[cl]);
+ potential_reload_hard_regs |= reg_class_contents[cl];
}
else if (src_regno >= lra_constraint_new_regno_start
&& dst_regno < lra_constraint_new_regno_start
@@ -6357,8 +6352,7 @@ inherit_in_ebb (rtx_insn *head, rtx_insn
/* Invalidate. */
usage_insns[dst_regno].check = 0;
if (hard_reg_set_subset_p (reg_class_contents[cl], live_hard_regs))
- IOR_HARD_REG_SET (potential_reload_hard_regs,
- reg_class_contents[cl]);
+ potential_reload_hard_regs |= reg_class_contents[cl];
}
else if (INSN_P (curr_insn))
{
@@ -6593,8 +6587,7 @@ inherit_in_ebb (rtx_insn *head, rtx_insn
if (ira_class_hard_regs_num[cl] <= max_small_class_regs_num)
reloads_num++;
if (hard_reg_set_subset_p (reg_class_contents[cl], live_hard_regs))
- IOR_HARD_REG_SET (potential_reload_hard_regs,
- reg_class_contents[cl]);
+ potential_reload_hard_regs |= reg_class_contents[cl];
}
}
if (NONDEBUG_INSN_P (curr_insn))
Index: gcc/lra-eliminations.c
===================================================================
--- gcc/lra-eliminations.c 2019-07-10 19:41:21.623936245 +0100
+++ gcc/lra-eliminations.c 2019-09-09 16:08:54.796113751 +0100
@@ -1089,7 +1089,7 @@ spill_pseudos (HARD_REG_SET set)
reg_renumber[i] = -1;
bitmap_ior_into (&to_process, &lra_reg_info[i].insn_bitmap);
}
- IOR_HARD_REG_SET (lra_no_alloc_regs, set);
+ lra_no_alloc_regs |= set;
for (insn = get_insns (); insn != NULL_RTX; insn = NEXT_INSN (insn))
if (bitmap_bit_p (&to_process, INSN_UID (insn)))
{
@@ -1202,7 +1202,7 @@ update_reg_eliminate (bitmap insns_with_
result = true;
}
}
- IOR_HARD_REG_SET (lra_no_alloc_regs, temp_hard_reg_set);
+ lra_no_alloc_regs |= temp_hard_reg_set;
AND_COMPL_HARD_REG_SET (eliminable_regset, temp_hard_reg_set);
spill_pseudos (temp_hard_reg_set);
return result;
Index: gcc/lra-lives.c
===================================================================
--- gcc/lra-lives.c 2019-09-09 16:06:17.653228374 +0100
+++ gcc/lra-lives.c 2019-09-09 16:08:54.796113751 +0100
@@ -327,7 +327,7 @@ mark_pseudo_live (int regno)
mark_pseudo_dead (int regno)
{
lra_assert (!HARD_REGISTER_NUM_P (regno));
- IOR_HARD_REG_SET (lra_reg_info[regno].conflict_hard_regs, hard_regs_live);
+ lra_reg_info[regno].conflict_hard_regs |= hard_regs_live;
if (!sparseset_bit_p (pseudos_live, regno))
return;
@@ -602,8 +602,7 @@ check_pseudos_live_through_calls (int re
lra_reg_info[regno].call_insn = call_insn;
sparseset_clear_bit (pseudos_live_through_calls, regno);
- IOR_HARD_REG_SET (lra_reg_info[regno].conflict_hard_regs,
- last_call_used_reg_set);
+ lra_reg_info[regno].conflict_hard_regs |= last_call_used_reg_set;
for (hr = 0; HARD_REGISTER_NUM_P (hr); hr++)
if (targetm.hard_regno_call_part_clobbered (call_insn, hr,
@@ -945,8 +944,8 @@ process_bb_lives (basic_block bb, int &c
EXECUTE_IF_SET_IN_SPARSESET (pseudos_live, j)
{
- IOR_HARD_REG_SET (lra_reg_info[j].actual_call_used_reg_set,
- this_call_used_reg_set);
+ lra_reg_info[j].actual_call_used_reg_set
+ |= this_call_used_reg_set;
if (flush)
check_pseudos_live_through_calls (j,
Index: gcc/lra-spills.c
===================================================================
--- gcc/lra-spills.c 2019-09-09 16:06:17.653228374 +0100
+++ gcc/lra-spills.c 2019-09-09 16:08:54.796113751 +0100
@@ -277,7 +277,7 @@ assign_spill_hard_regs (int *pseudo_regn
conflict_hard_regs = lra_reg_info[regno].conflict_hard_regs;
for (r = lra_reg_info[regno].live_ranges; r != NULL; r = r->next)
for (p = r->start; p <= r->finish; p++)
- IOR_HARD_REG_SET (conflict_hard_regs, reserved_hard_regs[p]);
+ conflict_hard_regs |= reserved_hard_regs[p];
spill_class_size = ira_class_hard_regs_num[spill_class];
mode = lra_reg_info[regno].biggest_mode;
for (k = 0; k < spill_class_size; k++)
Index: gcc/postreload.c
===================================================================
--- gcc/postreload.c 2019-09-09 16:06:17.653228374 +0100
+++ gcc/postreload.c 2019-09-09 16:08:54.796113751 +0100
@@ -1268,7 +1268,7 @@ reload_combine (void)
REG_SET_TO_HARD_REG_SET (live, live_in);
compute_use_by_pseudos (&live, live_in);
LABEL_LIVE (insn) = live;
- IOR_HARD_REG_SET (ever_live_at_start, live);
+ ever_live_at_start |= live;
}
}
Index: gcc/reginfo.c
===================================================================
--- gcc/reginfo.c 2019-09-09 16:07:28.372726754 +0100
+++ gcc/reginfo.c 2019-09-09 16:08:54.796113751 +0100
@@ -298,8 +298,7 @@ init_reg_sets_1 (void)
HARD_REG_SET c;
int k;
- c = reg_class_contents[i];
- IOR_HARD_REG_SET (c, reg_class_contents[j]);
+ c = reg_class_contents[i] | reg_class_contents[j];
for (k = 0; k < N_REG_CLASSES; k++)
if (hard_reg_set_subset_p (reg_class_contents[k], c)
&& !hard_reg_set_subset_p (reg_class_contents[k],
@@ -321,8 +320,7 @@ init_reg_sets_1 (void)
HARD_REG_SET c;
int k;
- c = reg_class_contents[i];
- IOR_HARD_REG_SET (c, reg_class_contents[j]);
+ c = reg_class_contents[i] | reg_class_contents[j];
for (k = 0; k < N_REG_CLASSES; k++)
if (hard_reg_set_subset_p (c, reg_class_contents[k]))
break;
Index: gcc/regrename.c
===================================================================
--- gcc/regrename.c 2019-09-09 16:06:17.653228374 +0100
+++ gcc/regrename.c 2019-09-09 16:08:54.796113751 +0100
@@ -292,7 +292,7 @@ merge_overlapping_regs (HARD_REG_SET *ps
{
bitmap_iterator bi;
unsigned i;
- IOR_HARD_REG_SET (*pset, head->hard_conflicts);
+ *pset |= head->hard_conflicts;
EXECUTE_IF_SET_IN_BITMAP (&head->conflicts, 0, i, bi)
{
du_head_p other = regrename_chain_from_id (i);
@@ -367,7 +367,7 @@ find_rename_reg (du_head_p this_head, en
If the chain needs a call-saved register, mark the call-used
registers as unavailable. */
if (this_head->need_caller_save_reg)
- IOR_HARD_REG_SET (*unavailable, call_used_reg_set);
+ *unavailable |= call_used_reg_set;
/* Mark registers that overlap this chain's lifetime as unavailable. */
merge_overlapping_regs (unavailable, this_head);
@@ -678,7 +678,7 @@ merge_chains (du_head_p c1, du_head_p c2
c2->first = c2->last = NULL;
c2->id = c1->id;
- IOR_HARD_REG_SET (c1->hard_conflicts, c2->hard_conflicts);
+ c1->hard_conflicts |= c2->hard_conflicts;
bitmap_ior_into (&c1->conflicts, &c2->conflicts);
c1->need_caller_save_reg |= c2->need_caller_save_reg;
Index: gcc/reload1.c
===================================================================
--- gcc/reload1.c 2019-09-09 16:07:28.376726726 +0100
+++ gcc/reload1.c 2019-09-09 16:08:54.800113722 +0100
@@ -1364,7 +1364,7 @@ maybe_fix_stack_asms (void)
{
/* End of one alternative - mark the regs in the current
class, and reset the class. */
- IOR_HARD_REG_SET (allowed, reg_class_contents[cls]);
+ allowed |= reg_class_contents[cls];
cls = NO_REGS;
p++;
if (c == '#')
@@ -1745,8 +1745,8 @@ order_regs_for_reload (class insn_chain
REG_SET_TO_HARD_REG_SET (used_by_pseudos, &chain->live_throughout);
REG_SET_TO_HARD_REG_SET (used_by_pseudos2, &chain->dead_or_set);
- IOR_HARD_REG_SET (bad_spill_regs, used_by_pseudos);
- IOR_HARD_REG_SET (bad_spill_regs, used_by_pseudos2);
+ bad_spill_regs |= used_by_pseudos;
+ bad_spill_regs |= used_by_pseudos2;
/* Now find out which pseudos are allocated to it, and update
hard_reg_n_uses. */
@@ -1823,8 +1823,7 @@ find_reg (class insn_chain *chain, int o
static int regno_pseudo_regs[FIRST_PSEUDO_REGISTER];
static int best_regno_pseudo_regs[FIRST_PSEUDO_REGISTER];
- not_usable = bad_spill_regs;
- IOR_HARD_REG_SET (not_usable, bad_spill_regs_global);
+ not_usable = bad_spill_regs | bad_spill_regs_global;
IOR_COMPL_HARD_REG_SET (not_usable, reg_class_contents[rl->rclass]);
CLEAR_HARD_REG_SET (used_by_other_reload);
@@ -2008,7 +2007,7 @@ find_reload_regs (class insn_chain *chai
}
chain->used_spill_regs = used_spill_regs_local;
- IOR_HARD_REG_SET (used_spill_regs, used_spill_regs_local);
+ used_spill_regs |= used_spill_regs_local;
memcpy (chain->rld, rld, n_reloads * sizeof (struct reload));
}
@@ -4251,14 +4250,12 @@ finish_spills (int global)
EXECUTE_IF_SET_IN_REG_SET
(&chain->live_throughout, FIRST_PSEUDO_REGISTER, i, rsi)
{
- IOR_HARD_REG_SET (pseudo_forbidden_regs[i],
- chain->used_spill_regs);
+ pseudo_forbidden_regs[i] |= chain->used_spill_regs;
}
EXECUTE_IF_SET_IN_REG_SET
(&chain->dead_or_set, FIRST_PSEUDO_REGISTER, i, rsi)
{
- IOR_HARD_REG_SET (pseudo_forbidden_regs[i],
- chain->used_spill_regs);
+ pseudo_forbidden_regs[i] |= chain->used_spill_regs;
}
}
@@ -4302,7 +4299,7 @@ finish_spills (int global)
{
REG_SET_TO_HARD_REG_SET (used_by_pseudos, &chain->live_throughout);
REG_SET_TO_HARD_REG_SET (used_by_pseudos2, &chain->dead_or_set);
- IOR_HARD_REG_SET (used_by_pseudos, used_by_pseudos2);
+ used_by_pseudos |= used_by_pseudos2;
compute_use_by_pseudos (&used_by_pseudos, &chain->live_throughout);
compute_use_by_pseudos (&used_by_pseudos, &chain->dead_or_set);
@@ -6239,9 +6236,9 @@ choose_reload_regs_init (class insn_chai
{
HARD_REG_SET tmp;
REG_SET_TO_HARD_REG_SET (tmp, &chain->live_throughout);
- IOR_HARD_REG_SET (reg_used_in_insn, tmp);
+ reg_used_in_insn |= tmp;
REG_SET_TO_HARD_REG_SET (tmp, &chain->dead_or_set);
- IOR_HARD_REG_SET (reg_used_in_insn, tmp);
+ reg_used_in_insn |= tmp;
compute_use_by_pseudos (®_used_in_insn, &chain->live_throughout);
compute_use_by_pseudos (®_used_in_insn, &chain->dead_or_set);
}
@@ -8420,7 +8417,7 @@ emit_reload_insns (class insn_chain *cha
}
}
}
- IOR_HARD_REG_SET (reg_reloaded_dead, reg_reloaded_died);
+ reg_reloaded_dead |= reg_reloaded_died;
}
\f
/* Go through the motions to emit INSN and test if it is strictly valid.
Index: gcc/reorg.c
===================================================================
--- gcc/reorg.c 2019-07-01 09:37:05.096542274 +0100
+++ gcc/reorg.c 2019-09-09 16:08:54.800113722 +0100
@@ -1575,7 +1575,7 @@ redundant_insn (rtx insn, rtx_insn *targ
/* Insns we pass may not set either NEEDED or SET, so merge them for
simpler tests. */
needed.memory |= set.memory;
- IOR_HARD_REG_SET (needed.regs, set.regs);
+ needed.regs |= set.regs;
/* This insn isn't redundant if it conflicts with an insn that either is
or will be in a delay slot of TARGET. */
Index: gcc/resource.c
===================================================================
--- gcc/resource.c 2019-09-09 16:07:28.376726726 +0100
+++ gcc/resource.c 2019-09-09 16:08:54.800113722 +0100
@@ -581,7 +581,7 @@ find_dead_or_set_registers (rtx_insn *ta
find_dead_or_set_registers (next_insn,
&fallthrough_res, 0, jump_count,
set, needed);
- IOR_HARD_REG_SET (fallthrough_res.regs, target_res.regs);
+ fallthrough_res.regs |= target_res.regs;
res->regs &= fallthrough_res.regs;
break;
}
@@ -670,7 +670,7 @@ mark_set_resources (rtx x, struct resour
res->cc = res->memory = 1;
get_call_reg_set_usage (call_insn, ®s, regs_invalidated_by_call);
- IOR_HARD_REG_SET (res->regs, regs);
+ res->regs |= regs;
for (link = CALL_INSN_FUNCTION_USAGE (call_insn);
link; link = XEXP (link, 1))
@@ -1109,7 +1109,7 @@ mark_target_live_regs (rtx_insn *insns,
HARD_REG_SET extra_live;
REG_SET_TO_HARD_REG_SET (extra_live, DF_LR_IN (bb));
- IOR_HARD_REG_SET (current_live_regs, extra_live);
+ current_live_regs |= extra_live;
}
}
@@ -1118,7 +1118,7 @@ mark_target_live_regs (rtx_insn *insns,
are implicitly required at that point. */
else if (NOTE_P (real_insn)
&& NOTE_KIND (real_insn) == NOTE_INSN_EPILOGUE_BEG)
- IOR_HARD_REG_SET (current_live_regs, start_of_epilogue_needs.regs);
+ current_live_regs |= start_of_epilogue_needs.regs;
}
res->regs = current_live_regs;
@@ -1162,12 +1162,12 @@ mark_target_live_regs (rtx_insn *insns,
scratch = needed.regs;
AND_COMPL_HARD_REG_SET (scratch, set.regs);
- IOR_HARD_REG_SET (new_resources.regs, scratch);
+ new_resources.regs |= scratch;
mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
}
- IOR_HARD_REG_SET (res->regs, new_resources.regs);
+ res->regs |= new_resources.regs;
}
if (tinfo != NULL)
Index: gcc/rtlanal.c
===================================================================
--- gcc/rtlanal.c 2019-09-09 12:27:14.262372261 +0100
+++ gcc/rtlanal.c 2019-09-09 16:08:54.800113722 +0100
@@ -1478,7 +1478,7 @@ find_all_hard_reg_sets (const rtx_insn *
CLEAR_HARD_REG_SET (*pset);
note_stores (insn, record_hard_reg_sets, pset);
if (CALL_P (insn) && implicit)
- IOR_HARD_REG_SET (*pset, call_used_reg_set);
+ *pset |= call_used_reg_set;
for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
if (REG_NOTE_KIND (link) == REG_INC)
record_hard_reg_sets (XEXP (link, 0), NULL, pset);
Index: gcc/sched-deps.c
===================================================================
--- gcc/sched-deps.c 2019-09-09 12:27:14.266372233 +0100
+++ gcc/sched-deps.c 2019-09-09 16:08:54.800113722 +0100
@@ -2901,7 +2901,7 @@ sched_analyze_insn (class deps_desc *dep
{
HARD_REG_SET temp;
get_implicit_reg_pending_clobbers (&temp, insn);
- IOR_HARD_REG_SET (implicit_reg_pending_clobbers, temp);
+ implicit_reg_pending_clobbers |= temp;
}
can_start_lhs_rhs_p = (NONJUMP_INSN_P (insn)
Index: gcc/sel-sched.c
===================================================================
--- gcc/sel-sched.c 2019-09-09 16:07:28.376726726 +0100
+++ gcc/sel-sched.c 2019-09-09 16:08:54.804113694 +0100
@@ -1221,15 +1221,13 @@ mark_unavailable_hard_regs (def_t def, s
The HARD_REGNO_RENAME_OK covers other cases in condition below. */
if (IN_RANGE (REGNO (orig_dest), FIRST_STACK_REG, LAST_STACK_REG)
&& REGNO_REG_SET_P (used_regs, FIRST_STACK_REG))
- IOR_HARD_REG_SET (reg_rename_p->unavailable_hard_regs,
- sel_hrd.stack_regs);
+ reg_rename_p->unavailable_hard_regs |= sel_hrd.stack_regs;
#endif
/* If there's a call on this path, make regs from call_used_reg_set
unavailable. */
if (def->crosses_call)
- IOR_HARD_REG_SET (reg_rename_p->unavailable_hard_regs,
- call_used_reg_set);
+ reg_rename_p->unavailable_hard_regs |= call_used_reg_set;
/* Stop here before reload: we need FRAME_REGS, STACK_REGS, and crosses_call,
but not register classes. */
@@ -1684,8 +1682,7 @@ find_best_reg_for_expr (expr_t expr, bli
/* Join hard registers unavailable due to register class
restrictions and live range intersection. */
- IOR_HARD_REG_SET (hard_regs_used,
- reg_rename_data.unavailable_hard_regs);
+ hard_regs_used |= reg_rename_data.unavailable_hard_regs;
best_reg = choose_best_reg (hard_regs_used, ®_rename_data,
original_insns, is_orig_reg_p);
Index: gcc/shrink-wrap.c
===================================================================
--- gcc/shrink-wrap.c 2019-09-09 16:04:49.265855317 +0100
+++ gcc/shrink-wrap.c 2019-09-09 16:08:54.804113694 +0100
@@ -688,7 +688,7 @@ try_shrink_wrapping (edge *entry_edge, r
CLEAR_HARD_REG_SET (this_used);
note_uses (&PATTERN (insn), record_hard_reg_uses, &this_used);
AND_COMPL_HARD_REG_SET (this_used, prologue_clobbered);
- IOR_HARD_REG_SET (prologue_used, this_used);
+ prologue_used |= this_used;
note_stores (insn, record_hard_reg_sets, &prologue_clobbered);
}
CLEAR_HARD_REG_BIT (prologue_clobbered, STACK_POINTER_REGNUM);
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [5/9] Remove IOR_HARD_REG_SET
2019-09-09 16:00 ` [5/9] Remove IOR_HARD_REG_SET Richard Sandiford
@ 2019-09-09 17:39 ` Jeff Law
0 siblings, 0 replies; 21+ messages in thread
From: Jeff Law @ 2019-09-09 17:39 UTC (permalink / raw)
To: gcc-patches, richard.sandiford
On 9/9/19 10:00 AM, Richard Sandiford wrote:
> Use "x |= y" instead of "IOR_HARD_REG_SET (x, y)" (or just "x | y"
> if the result is a temporary).
>
>
> 2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
>
> gcc/
> * hard-reg-set.h (HARD_REG_SET::operator|): New function.
> (HARD_REG_SET::operator|=): Likewise.
> (IOR_HARD_REG_SET): Delete.
> * config/gcn/gcn.c (gcn_md_reorg): Use "|" instead of
> IOR_HARD_REG_SET.
> * config/m32c/m32c.c (m32c_register_move_cost): Likewise.
> * config/s390/s390.c (s390_adjust_loop_scan_osc): Likewise.
> * final.c (collect_fn_hard_reg_usage): Likewise.
> * hw-doloop.c (scan_loop, optimize_loop): Likewise.
> * ira-build.c (merge_hard_reg_conflicts): Likewise.
> (ior_hard_reg_conflicts, create_cap_allocno, propagate_allocno_info)
> (propagate_some_info_from_allocno): Likewise.
> (copy_info_to_removed_store_destinations): Likewise.
> * ira-color.c (add_allocno_hard_regs_to_forest, assign_hard_reg)
> (allocno_reload_assign, ira_reassign_pseudos): Likewise.
> (fast_allocation): Likewise.
> * ira-conflicts.c (ira_build_conflicts): Likewise.
> * ira-lives.c (make_object_dead, process_single_reg_class_operands)
> (process_bb_node_lives): Likewise.
> * ira.c (setup_pressure_classes, setup_reg_class_relations): Likewise.
> * lra-assigns.c (find_hard_regno_for_1): Likewise.
> (setup_live_pseudos_and_spill_after_risky_transforms): Likewise.
> * lra-constraints.c (process_alt_operands, inherit_in_ebb): Likewise.
> * lra-eliminations.c (spill_pseudos, update_reg_eliminate): Likewise.
> * lra-lives.c (mark_pseudo_dead, check_pseudos_live_through_calls)
> (process_bb_lives): Likewise.
> * lra-spills.c (assign_spill_hard_regs): Likewise.
> * postreload.c (reload_combine): Likewise.
> * reginfo.c (init_reg_sets_1): Likewise.
> * regrename.c (merge_overlapping_regs, find_rename_reg)
> (merge_chains): Likewise.
> * reload1.c (maybe_fix_stack_asms, order_regs_for_reload, find_reg)
> (find_reload_regs, finish_spills, choose_reload_regs_init)
> (emit_reload_insns): Likewise.
> * reorg.c (redundant_insn): Likewise.
> * resource.c (find_dead_or_set_registers, mark_set_resources)
> (mark_target_live_regs): Likewise.
> * rtlanal.c (find_all_hard_reg_sets): Likewise.
> * sched-deps.c (sched_analyze_insn): Likewise.
> * sel-sched.c (mark_unavailable_hard_regs): Likewise.
> (find_best_reg_for_expr): Likewise.
> * shrink-wrap.c (try_shrink_wrapping): Likewise.
>
OK
jeff
^ permalink raw reply [flat|nested] 21+ messages in thread
* [7/9] Remove IOR_COMPL_HARD_REG_SET
2019-09-09 15:52 [0/9] Make HARD_REG_SETs easier to use Richard Sandiford
` (4 preceding siblings ...)
2019-09-09 16:00 ` [5/9] Remove IOR_HARD_REG_SET Richard Sandiford
@ 2019-09-09 16:01 ` Richard Sandiford
2019-09-09 17:41 ` Jeff Law
2019-09-09 16:01 ` [6/9] Remove AND_COMPL_HARD_REG_SET Richard Sandiford
` (2 subsequent siblings)
8 siblings, 1 reply; 21+ messages in thread
From: Richard Sandiford @ 2019-09-09 16:01 UTC (permalink / raw)
To: gcc-patches
Use "x |= ~y" instead of "IOR_COMPL_HARD_REG_SET (x, y)", or just
"x | ~y" if the result is a temporary.
2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* hard-reg-set.h (IOR_COMPL_HARD_REG_SET): Delete.
* config/aarch64/cortex-a57-fma-steering.c (rename_single_chain):
Use "|~" instead of IOR_COMPL_HARD_REG_SET.
* config/aarch64/falkor-tag-collision-avoidance.c (init_unavailable):
Likewise.
* ira-build.c (ira_create_object, ira_set_allocno_class): Likewise.
* ira.c (setup_reg_renumber): Likewise.
* lra-assigns.c (find_hard_regno_for_1): Likewise.
* regrename.c (regrename_find_superclass): Likewise.
* reload1.c (find_reg): Likewise.
Index: gcc/hard-reg-set.h
===================================================================
--- gcc/hard-reg-set.h 2019-09-09 16:10:15.303545844 +0100
+++ gcc/hard-reg-set.h 2019-09-09 16:10:50.379298529 +0100
@@ -127,11 +127,6 @@ #define HARD_CONST(X) ((HARD_REG_ELT_TYP
These take just one argument.
Also define:
- IOR_COMPL_HARD_REG_SET
- This takes two arguments TO and FROM; it reads from FROM
- and combines its complement bitwise into TO.
-
- Also define:
hard_reg_set_subset_p (X, Y), which returns true if X is a subset of Y.
hard_reg_set_equal_p (X, Y), which returns true if X and Y are equal.
@@ -152,8 +147,6 @@ #define TEST_HARD_REG_BIT(SET, BIT) \
#define CLEAR_HARD_REG_SET(TO) ((TO) = HARD_CONST (0))
#define SET_HARD_REG_SET(TO) ((TO) = ~ HARD_CONST (0))
-#define IOR_COMPL_HARD_REG_SET(TO, FROM) ((TO) |= ~ (FROM))
-
static inline bool
hard_reg_set_subset_p (const_hard_reg_set x, const_hard_reg_set y)
{
@@ -215,13 +208,6 @@ SET_HARD_REG_SET (HARD_REG_SET &set)
set.elts[i] = -1;
}
-inline void
-IOR_COMPL_HARD_REG_SET (HARD_REG_SET &to, const_hard_reg_set from)
-{
- for (unsigned int i = 0; i < ARRAY_SIZE (to.elts); ++i)
- to.elts[i] |= ~from.elts[i];
-}
-
static inline bool
hard_reg_set_subset_p (const_hard_reg_set x, const_hard_reg_set y)
{
Index: gcc/config/aarch64/cortex-a57-fma-steering.c
===================================================================
--- gcc/config/aarch64/cortex-a57-fma-steering.c 2019-04-08 21:55:28.290369445 +0100
+++ gcc/config/aarch64/cortex-a57-fma-steering.c 2019-09-09 16:10:50.379298529 +0100
@@ -267,7 +267,7 @@ rename_single_chain (du_head_p head, HAR
if (DEBUG_INSN_P (tmp->insn))
continue;
n_uses++;
- IOR_COMPL_HARD_REG_SET (*unavailable, reg_class_contents[tmp->cl]);
+ *unavailable |= ~reg_class_contents[tmp->cl];
super_class = reg_class_superunion[(int) super_class][(int) tmp->cl];
}
Index: gcc/config/aarch64/falkor-tag-collision-avoidance.c
===================================================================
--- gcc/config/aarch64/falkor-tag-collision-avoidance.c 2019-03-08 18:15:38.224734558 +0000
+++ gcc/config/aarch64/falkor-tag-collision-avoidance.c 2019-09-09 16:10:50.379298529 +0100
@@ -229,7 +229,7 @@ init_unavailable (tag_insn_info *insn_in
if (DEBUG_INSN_P (tmp->insn))
continue;
- IOR_COMPL_HARD_REG_SET (*unavailable, reg_class_contents[tmp->cl]);
+ *unavailable |= ~reg_class_contents[tmp->cl];
super_class = reg_class_superunion[(int) super_class][(int) tmp->cl];
}
Index: gcc/ira-build.c
===================================================================
--- gcc/ira-build.c 2019-09-09 16:08:54.792113779 +0100
+++ gcc/ira-build.c 2019-09-09 16:10:50.379298529 +0100
@@ -458,10 +458,8 @@ ira_create_object (ira_allocno_t a, int
OBJECT_NUM_CONFLICTS (obj) = 0;
OBJECT_CONFLICT_HARD_REGS (obj) = ira_no_alloc_regs;
OBJECT_TOTAL_CONFLICT_HARD_REGS (obj) = ira_no_alloc_regs;
- IOR_COMPL_HARD_REG_SET (OBJECT_CONFLICT_HARD_REGS (obj),
- reg_class_contents[aclass]);
- IOR_COMPL_HARD_REG_SET (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj),
- reg_class_contents[aclass]);
+ OBJECT_CONFLICT_HARD_REGS (obj) |= ~reg_class_contents[aclass];
+ OBJECT_TOTAL_CONFLICT_HARD_REGS (obj) |= ~reg_class_contents[aclass];
OBJECT_MIN (obj) = INT_MAX;
OBJECT_MAX (obj) = -1;
OBJECT_LIVE_RANGES (obj) = NULL;
@@ -549,10 +547,8 @@ ira_set_allocno_class (ira_allocno_t a,
ALLOCNO_CLASS (a) = aclass;
FOR_EACH_ALLOCNO_OBJECT (a, obj, oi)
{
- IOR_COMPL_HARD_REG_SET (OBJECT_CONFLICT_HARD_REGS (obj),
- reg_class_contents[aclass]);
- IOR_COMPL_HARD_REG_SET (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj),
- reg_class_contents[aclass]);
+ OBJECT_CONFLICT_HARD_REGS (obj) |= ~reg_class_contents[aclass];
+ OBJECT_TOTAL_CONFLICT_HARD_REGS (obj) |= ~reg_class_contents[aclass];
}
}
Index: gcc/ira.c
===================================================================
--- gcc/ira.c 2019-09-09 16:10:15.307545816 +0100
+++ gcc/ira.c 2019-09-09 16:10:50.379298529 +0100
@@ -2370,8 +2370,8 @@ setup_reg_renumber (void)
for (i = 0; i < nwords; i++)
{
obj = ALLOCNO_OBJECT (a, i);
- IOR_COMPL_HARD_REG_SET (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj),
- reg_class_contents[pclass]);
+ OBJECT_TOTAL_CONFLICT_HARD_REGS (obj)
+ |= ~reg_class_contents[pclass];
}
if (ALLOCNO_CALLS_CROSSED_NUM (a) != 0
&& ira_hard_reg_set_intersection_p (hard_regno, ALLOCNO_MODE (a),
Index: gcc/lra-assigns.c
===================================================================
--- gcc/lra-assigns.c 2019-09-09 16:10:15.307545816 +0100
+++ gcc/lra-assigns.c 2019-09-09 16:10:50.379298529 +0100
@@ -611,7 +611,7 @@ find_hard_regno_for_1 (int regno, int *c
}
/* Make sure that all registers in a multi-word pseudo belong to the
required class. */
- IOR_COMPL_HARD_REG_SET (conflict_set, reg_class_contents[rclass]);
+ conflict_set |= ~reg_class_contents[rclass];
lra_assert (rclass != NO_REGS);
rclass_size = ira_class_hard_regs_num[rclass];
best_hard_regno = -1;
Index: gcc/regrename.c
===================================================================
--- gcc/regrename.c 2019-09-09 16:08:54.796113751 +0100
+++ gcc/regrename.c 2019-09-09 16:10:50.379298529 +0100
@@ -441,8 +441,7 @@ regrename_find_superclass (du_head_p hea
if (DEBUG_INSN_P (tmp->insn))
continue;
n_uses++;
- IOR_COMPL_HARD_REG_SET (*punavailable,
- reg_class_contents[tmp->cl]);
+ *punavailable |= ~reg_class_contents[tmp->cl];
super_class
= reg_class_superunion[(int) super_class][(int) tmp->cl];
}
Index: gcc/reload1.c
===================================================================
--- gcc/reload1.c 2019-09-09 16:10:15.307545816 +0100
+++ gcc/reload1.c 2019-09-09 16:10:50.383298501 +0100
@@ -1823,8 +1823,9 @@ find_reg (class insn_chain *chain, int o
static int regno_pseudo_regs[FIRST_PSEUDO_REGISTER];
static int best_regno_pseudo_regs[FIRST_PSEUDO_REGISTER];
- not_usable = bad_spill_regs | bad_spill_regs_global;
- IOR_COMPL_HARD_REG_SET (not_usable, reg_class_contents[rl->rclass]);
+ not_usable = (bad_spill_regs
+ | bad_spill_regs_global
+ | ~reg_class_contents[rl->rclass]);
CLEAR_HARD_REG_SET (used_by_other_reload);
for (k = 0; k < order; k++)
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [7/9] Remove IOR_COMPL_HARD_REG_SET
2019-09-09 16:01 ` [7/9] Remove IOR_COMPL_HARD_REG_SET Richard Sandiford
@ 2019-09-09 17:41 ` Jeff Law
0 siblings, 0 replies; 21+ messages in thread
From: Jeff Law @ 2019-09-09 17:41 UTC (permalink / raw)
To: gcc-patches, richard.sandiford
On 9/9/19 10:01 AM, Richard Sandiford wrote:
> Use "x |= ~y" instead of "IOR_COMPL_HARD_REG_SET (x, y)", or just
> "x | ~y" if the result is a temporary.
>
>
> 2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
>
> gcc/
> * hard-reg-set.h (IOR_COMPL_HARD_REG_SET): Delete.
> * config/aarch64/cortex-a57-fma-steering.c (rename_single_chain):
> Use "|~" instead of IOR_COMPL_HARD_REG_SET.
> * config/aarch64/falkor-tag-collision-avoidance.c (init_unavailable):
> Likewise.
> * ira-build.c (ira_create_object, ira_set_allocno_class): Likewise.
> * ira.c (setup_reg_renumber): Likewise.
> * lra-assigns.c (find_hard_regno_for_1): Likewise.
> * regrename.c (regrename_find_superclass): Likewise.
> * reload1.c (find_reg): Likewise.
OK
jeff
^ permalink raw reply [flat|nested] 21+ messages in thread
* [6/9] Remove AND_COMPL_HARD_REG_SET
2019-09-09 15:52 [0/9] Make HARD_REG_SETs easier to use Richard Sandiford
` (5 preceding siblings ...)
2019-09-09 16:01 ` [7/9] Remove IOR_COMPL_HARD_REG_SET Richard Sandiford
@ 2019-09-09 16:01 ` Richard Sandiford
2019-09-09 17:40 ` Jeff Law
2019-09-09 16:02 ` [8/9] Remove hard_reg_set_equal_p Richard Sandiford
2019-09-09 16:03 ` [9/9] Tweak interface to ira-build.c:ior_hard_reg_conflicts Richard Sandiford
8 siblings, 1 reply; 21+ messages in thread
From: Richard Sandiford @ 2019-09-09 16:01 UTC (permalink / raw)
To: gcc-patches
Use "x &= ~y" instead of "AND_COMPL_HARD_REG_SET (x, y)", or just
"x & ~y" if the result is a temporary. This means that we're splitting
it into two operations, but the compiler should be able to combine them
for reasonable values of FIRST_PSEUDO_REGISTER.
2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* hard-reg-set.h (AND_COMPL_HARD_REG_SET): Delete.
* caller-save.c (setup_save_areas): Use "&~" instead of
AND_COMPL_HARD_REG_SET.
(save_call_clobbered_regs): Likewise.
* config/epiphany/epiphany.c (epiphany_conditional_register_usage):
Likewise.
* config/frv/frv.c (frv_ifcvt_modify_tests): Likewise.
* config/gcn/gcn.c (gcn_md_reorg): Likewise.
* config/i386/i386.c (ix86_conditional_register_usage): Likewise.
* config/mips/mips.c (mips_class_max_nregs): Likewise.
(mips_conditional_register_usage): Likewise.
* config/sh/sh.c (output_stack_adjust): Likewise.
* ira-color.c (form_allocno_hard_regs_nodes_forest): Likewise.
(setup_profitable_hard_regs): Likewise.
(get_conflict_and_start_profitable_regs): Likewise.
* ira-conflicts.c (print_allocno_conflicts): Likewise.
(ira_build_conflicts): Likewise.
* ira-costs.c (restrict_cost_classes): Likewise.
(setup_regno_cost_classes_by_aclass): Likewise.
* ira-lives.c (process_bb_node_lives): Likewise.
* ira.c (setup_class_hard_regs, setup_reg_subclasses): Likewise.
(setup_class_subset_and_memory_move_costs, setup_pressure_classes)
(setup_allocno_and_important_classes, setup_class_translate_array)
(setup_reg_class_relations, setup_prohibited_class_mode_regs):
Likewise.
* lra-assigns.c (find_hard_regno_for_1): Likewise.
* lra-constraints.c (prohibited_class_reg_set_mode_p): Likewise.
(process_alt_operands, inherit_in_ebb): Likewise.
* lra-eliminations.c (update_reg_eliminate): Likewise.
* lra-lives.c (process_bb_lives): Likewise.
* reload1.c (update_eliminables_and_spill, reload_as_needed): Likewise.
* resource.c (find_dead_or_set_registers): Likewise.
(mark_target_live_regs): Likewise.
* sched-deps.c (get_implicit_reg_pending_clobbers): Likewise.
* sel-sched.c (mark_unavailable_hard_regs): Likewise.
(implicit_clobber_conflict_p): Likewise.
* shrink-wrap.c (requires_stack_frame_p): Likewise.
(try_shrink_wrapping): Likewise.
Index: gcc/hard-reg-set.h
===================================================================
--- gcc/hard-reg-set.h 2019-09-09 16:08:54.788113807 +0100
+++ gcc/hard-reg-set.h 2019-09-09 16:10:15.303545844 +0100
@@ -127,8 +127,8 @@ #define HARD_CONST(X) ((HARD_REG_ELT_TYP
These take just one argument.
Also define:
- IOR_COMPL_HARD_REG_SET and AND_COMPL_HARD_REG_SET
- These take two arguments TO and FROM; they read from FROM
+ IOR_COMPL_HARD_REG_SET
+ This takes two arguments TO and FROM; it reads from FROM
and combines its complement bitwise into TO.
Also define:
@@ -153,7 +153,6 @@ #define CLEAR_HARD_REG_SET(TO) ((TO) = H
#define SET_HARD_REG_SET(TO) ((TO) = ~ HARD_CONST (0))
#define IOR_COMPL_HARD_REG_SET(TO, FROM) ((TO) |= ~ (FROM))
-#define AND_COMPL_HARD_REG_SET(TO, FROM) ((TO) &= ~ (FROM))
static inline bool
hard_reg_set_subset_p (const_hard_reg_set x, const_hard_reg_set y)
@@ -217,13 +216,6 @@ SET_HARD_REG_SET (HARD_REG_SET &set)
}
inline void
-AND_COMPL_HARD_REG_SET (HARD_REG_SET &to, const_hard_reg_set from)
-{
- for (unsigned int i = 0; i < ARRAY_SIZE (to.elts); ++i)
- to.elts[i] &= ~from.elts[i];
-}
-
-inline void
IOR_COMPL_HARD_REG_SET (HARD_REG_SET &to, const_hard_reg_set from)
{
for (unsigned int i = 0; i < ARRAY_SIZE (to.elts); ++i)
Index: gcc/caller-save.c
===================================================================
--- gcc/caller-save.c 2019-09-09 16:07:28.364726810 +0100
+++ gcc/caller-save.c 2019-09-09 16:10:15.291545927 +0100
@@ -455,8 +455,7 @@ setup_save_areas (void)
if (SIBLING_CALL_P (insn) && crtl->return_rtx)
mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets);
- AND_COMPL_HARD_REG_SET (used_regs, call_fixed_reg_set);
- AND_COMPL_HARD_REG_SET (used_regs, this_insn_sets);
+ used_regs &= ~(call_fixed_reg_set | this_insn_sets);
hard_regs_to_save &= used_regs;
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
@@ -540,8 +539,7 @@ setup_save_areas (void)
if (SIBLING_CALL_P (insn) && crtl->return_rtx)
mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets);
- AND_COMPL_HARD_REG_SET (used_regs, call_fixed_reg_set);
- AND_COMPL_HARD_REG_SET (used_regs, this_insn_sets);
+ used_regs &= ~(call_fixed_reg_set | this_insn_sets);
hard_regs_to_save &= used_regs;
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
@@ -796,7 +794,7 @@ save_call_clobbered_regs (void)
afterwards. */
CLEAR_HARD_REG_SET (this_insn_sets);
note_stores (insn, mark_set_regs, &this_insn_sets);
- AND_COMPL_HARD_REG_SET (hard_regs_saved, this_insn_sets);
+ hard_regs_saved &= ~this_insn_sets;
}
if (code == CALL_INSN
@@ -852,9 +850,9 @@ save_call_clobbered_regs (void)
note_stores (insn, mark_set_regs, &this_insn_sets);
/* Compute which hard regs must be saved before this call. */
- AND_COMPL_HARD_REG_SET (hard_regs_to_save, call_fixed_reg_set);
- AND_COMPL_HARD_REG_SET (hard_regs_to_save, this_insn_sets);
- AND_COMPL_HARD_REG_SET (hard_regs_to_save, hard_regs_saved);
+ hard_regs_to_save &= ~(call_fixed_reg_set
+ | this_insn_sets
+ | hard_regs_saved);
get_call_reg_set_usage (insn, &call_def_reg_set,
call_used_reg_set);
hard_regs_to_save &= call_def_reg_set;
Index: gcc/config/epiphany/epiphany.c
===================================================================
--- gcc/config/epiphany/epiphany.c 2019-09-09 16:06:17.629228543 +0100
+++ gcc/config/epiphany/epiphany.c 2019-09-09 16:10:15.291545927 +0100
@@ -2242,7 +2242,7 @@ epiphany_conditional_register_usage (voi
CLEAR_HARD_REG_SET (reg_class_contents[SHORT_INSN_REGS]);
reg_class_contents[SIBCALL_REGS] = reg_class_contents[GENERAL_REGS];
/* It would be simpler and quicker if we could just use
- AND_COMPL_HARD_REG_SET, alas, call_used_reg_set is yet uninitialized;
+ &~, alas, call_used_reg_set is yet uninitialized;
it is set up later by our caller. */
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
if (!call_used_regs[i])
Index: gcc/config/frv/frv.c
===================================================================
--- gcc/config/frv/frv.c 2019-09-09 16:06:17.633228515 +0100
+++ gcc/config/frv/frv.c 2019-09-09 16:10:15.291545927 +0100
@@ -5201,8 +5201,7 @@ frv_ifcvt_modify_tests (ce_if_block *ce_
not fixed. However, allow the ICC/ICR temporary registers to be allocated
if we did not need to use them in reloading other registers. */
memset (&tmp_reg->regs, 0, sizeof (tmp_reg->regs));
- tmp_reg->regs = call_used_reg_set;
- AND_COMPL_HARD_REG_SET (tmp_reg->regs, fixed_reg_set);
+ tmp_reg->regs = call_used_reg_set &~ fixed_reg_set;
SET_HARD_REG_BIT (tmp_reg->regs, ICC_TEMP);
SET_HARD_REG_BIT (tmp_reg->regs, ICR_TEMP);
@@ -5311,7 +5310,7 @@ frv_ifcvt_modify_tests (ce_if_block *ce_
CLEAR_HARD_REG_SET (mentioned_regs);
find_all_hard_regs (PATTERN (insn), &mentioned_regs);
- AND_COMPL_HARD_REG_SET (tmp_reg->regs, mentioned_regs);
+ tmp_reg->regs &= ~mentioned_regs;
pattern = PATTERN (insn);
if (GET_CODE (pattern) == COND_EXEC)
@@ -5347,8 +5346,7 @@ frv_ifcvt_modify_tests (ce_if_block *ce_
}
if (! skip_nested_if)
- AND_COMPL_HARD_REG_SET (frv_ifcvt.nested_cc_ok_rewrite,
- mentioned_regs);
+ frv_ifcvt.nested_cc_ok_rewrite &= ~mentioned_regs;
}
if (insn == last_insn)
Index: gcc/config/gcn/gcn.c
===================================================================
--- gcc/config/gcn/gcn.c 2019-09-09 16:08:54.784113835 +0100
+++ gcc/config/gcn/gcn.c 2019-09-09 16:10:15.295545899 +0100
@@ -4628,7 +4628,7 @@ gcn_md_reorg (void)
prev_insn->age += 1 + nops_rqd;
written |= iwrites;
- AND_COMPL_HARD_REG_SET (prev_insn->writes, written);
+ prev_insn->writes &= ~written;
}
/* Track the current instruction as a previous instruction. */
Index: gcc/config/i386/i386.c
===================================================================
--- gcc/config/i386/i386.c 2019-09-09 12:27:14.250372346 +0100
+++ gcc/config/i386/i386.c 2019-09-09 16:10:15.299545870 +0100
@@ -497,18 +497,15 @@ ix86_conditional_register_usage (void)
/* If MMX is disabled, disable the registers. */
if (! TARGET_MMX)
- AND_COMPL_HARD_REG_SET (accessible_reg_set,
- reg_class_contents[(int) MMX_REGS]);
+ accessible_reg_set &= ~reg_class_contents[MMX_REGS];
/* If SSE is disabled, disable the registers. */
if (! TARGET_SSE)
- AND_COMPL_HARD_REG_SET (accessible_reg_set,
- reg_class_contents[(int) ALL_SSE_REGS]);
+ accessible_reg_set &= ~reg_class_contents[ALL_SSE_REGS];
/* If the FPU is disabled, disable the registers. */
if (! (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387))
- AND_COMPL_HARD_REG_SET (accessible_reg_set,
- reg_class_contents[(int) FLOAT_REGS]);
+ accessible_reg_set &= ~reg_class_contents[FLOAT_REGS];
/* If AVX512F is disabled, disable the registers. */
if (! TARGET_AVX512F)
@@ -516,8 +513,7 @@ ix86_conditional_register_usage (void)
for (i = FIRST_EXT_REX_SSE_REG; i <= LAST_EXT_REX_SSE_REG; i++)
CLEAR_HARD_REG_BIT (accessible_reg_set, i);
- AND_COMPL_HARD_REG_SET (accessible_reg_set,
- reg_class_contents[(int) ALL_MASK_REGS]);
+ accessible_reg_set &= ~reg_class_contents[ALL_MASK_REGS];
}
}
Index: gcc/config/mips/mips.c
===================================================================
--- gcc/config/mips/mips.c 2019-09-09 16:06:17.641228458 +0100
+++ gcc/config/mips/mips.c 2019-09-09 16:10:15.299545870 +0100
@@ -12981,7 +12981,7 @@ mips_class_max_nregs (enum reg_class rcl
if (mips_hard_regno_mode_ok (ST_REG_FIRST, mode))
size = MIN (size, 4);
- AND_COMPL_HARD_REG_SET (left, reg_class_contents[(int) ST_REGS]);
+ left &= ~reg_class_contents[ST_REGS];
}
if (hard_reg_set_intersect_p (left, reg_class_contents[(int) FP_REGS]))
{
@@ -12993,7 +12993,7 @@ mips_class_max_nregs (enum reg_class rcl
size = MIN (size, UNITS_PER_FPREG);
}
- AND_COMPL_HARD_REG_SET (left, reg_class_contents[(int) FP_REGS]);
+ left &= ~reg_class_contents[FP_REGS];
}
if (!hard_reg_set_empty_p (left))
size = MIN (size, UNITS_PER_WORD);
@@ -20431,27 +20431,20 @@ mips_conditional_register_usage (void)
global_regs[CCDSP_SC_REGNUM] = 1;
}
else
- AND_COMPL_HARD_REG_SET (accessible_reg_set,
- reg_class_contents[(int) DSP_ACC_REGS]);
+ accessible_reg_set &= ~reg_class_contents[DSP_ACC_REGS];
if (!ISA_HAS_HILO)
- AND_COMPL_HARD_REG_SET (accessible_reg_set,
- reg_class_contents[(int) MD_REGS]);
+ accessible_reg_set &= ~reg_class_contents[MD_REGS];
if (!TARGET_HARD_FLOAT)
- {
- AND_COMPL_HARD_REG_SET (accessible_reg_set,
- reg_class_contents[(int) FP_REGS]);
- AND_COMPL_HARD_REG_SET (accessible_reg_set,
- reg_class_contents[(int) ST_REGS]);
- }
+ accessible_reg_set &= ~(reg_class_contents[FP_REGS]
+ | reg_class_contents[ST_REGS]);
else if (!ISA_HAS_8CC)
{
/* We only have a single condition-code register. We implement
this by fixing all the condition-code registers and generating
RTL that refers directly to ST_REG_FIRST. */
- AND_COMPL_HARD_REG_SET (accessible_reg_set,
- reg_class_contents[(int) ST_REGS]);
+ accessible_reg_set &= ~reg_class_contents[ST_REGS];
if (!ISA_HAS_CCF)
SET_HARD_REG_BIT (accessible_reg_set, FPSW_REGNUM);
fixed_regs[FPSW_REGNUM] = call_used_regs[FPSW_REGNUM] = 1;
@@ -20493,8 +20486,7 @@ mips_conditional_register_usage (void)
/* Do not allow HI and LO to be treated as register operands.
There are no MTHI or MTLO instructions (or any real need
for them) and one-way registers cannot easily be reloaded. */
- AND_COMPL_HARD_REG_SET (operand_reg_set,
- reg_class_contents[(int) MD_REGS]);
+ operand_reg_set &= ~reg_class_contents[MD_REGS];
}
/* $f20-$f23 are call-clobbered for n64. */
if (mips_abi == ABI_64)
Index: gcc/config/sh/sh.c
===================================================================
--- gcc/config/sh/sh.c 2019-09-09 16:06:54.720965449 +0100
+++ gcc/config/sh/sh.c 2019-09-09 16:10:15.303545844 +0100
@@ -6707,9 +6707,7 @@ output_stack_adjust (int size, rtx reg,
temp = -1;
if (temp < 0 && ! current_function_interrupt && epilogue_p >= 0)
{
- HARD_REG_SET temps;
- temps = call_used_reg_set;
- AND_COMPL_HARD_REG_SET (temps, call_fixed_reg_set);
+ HARD_REG_SET temps = call_used_reg_set & ~call_fixed_reg_set;
if (epilogue_p > 0)
{
int nreg = 0;
Index: gcc/ira-color.c
===================================================================
--- gcc/ira-color.c 2019-09-09 16:08:54.792113779 +0100
+++ gcc/ira-color.c 2019-09-09 16:10:15.303545844 +0100
@@ -716,8 +716,7 @@ form_allocno_hard_regs_nodes_forest (voi
(allocno_data->profitable_hard_regs,
ALLOCNO_MEMORY_COST (a) - ALLOCNO_CLASS_COST (a)));
}
- SET_HARD_REG_SET (temp);
- AND_COMPL_HARD_REG_SET (temp, ira_no_alloc_regs);
+ temp = ~ira_no_alloc_regs;
add_allocno_hard_regs (temp, 0);
qsort (allocno_hard_regs_vec.address () + start,
allocno_hard_regs_vec.length () - start,
@@ -1047,8 +1046,8 @@ setup_profitable_hard_regs (void)
{
ira_object_t obj = ALLOCNO_OBJECT (a, k);
- AND_COMPL_HARD_REG_SET (data->profitable_hard_regs,
- OBJECT_TOTAL_CONFLICT_HARD_REGS (obj));
+ data->profitable_hard_regs
+ &= ~OBJECT_TOTAL_CONFLICT_HARD_REGS (obj);
}
}
}
@@ -1089,9 +1088,8 @@ setup_profitable_hard_regs (void)
hard_regno + num);
}
else
- AND_COMPL_HARD_REG_SET
- (ALLOCNO_COLOR_DATA (conflict_a)->profitable_hard_regs,
- ira_reg_mode_hard_regset[hard_regno][mode]);
+ ALLOCNO_COLOR_DATA (conflict_a)->profitable_hard_regs
+ &= ~ira_reg_mode_hard_regset[hard_regno][mode];
}
}
}
@@ -1590,12 +1588,10 @@ get_conflict_and_start_profitable_regs (
conflict_regs[i] = OBJECT_TOTAL_CONFLICT_HARD_REGS (obj);
}
if (retry_p)
- {
- *start_profitable_regs = reg_class_contents[ALLOCNO_CLASS (a)];
- AND_COMPL_HARD_REG_SET (*start_profitable_regs,
- ira_prohibited_class_mode_regs
- [ALLOCNO_CLASS (a)][ALLOCNO_MODE (a)]);
- }
+ *start_profitable_regs
+ = (reg_class_contents[ALLOCNO_CLASS (a)]
+ &~ (ira_prohibited_class_mode_regs
+ [ALLOCNO_CLASS (a)][ALLOCNO_MODE (a)]));
else
*start_profitable_regs = ALLOCNO_COLOR_DATA (a)->profitable_hard_regs;
}
Index: gcc/ira-conflicts.c
===================================================================
--- gcc/ira-conflicts.c 2019-09-09 16:08:54.792113779 +0100
+++ gcc/ira-conflicts.c 2019-09-09 16:10:15.303545844 +0100
@@ -660,15 +660,15 @@ print_allocno_conflicts (FILE * file, bo
putc (')', file);
}
}
- conflicting_hard_regs = OBJECT_TOTAL_CONFLICT_HARD_REGS (obj);
- AND_COMPL_HARD_REG_SET (conflicting_hard_regs, ira_no_alloc_regs);
- conflicting_hard_regs &= reg_class_contents[ALLOCNO_CLASS (a)];
+ conflicting_hard_regs = (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj)
+ & ~ira_no_alloc_regs
+ & reg_class_contents[ALLOCNO_CLASS (a)]);
print_hard_reg_set (file, "\n;; total conflict hard regs:",
conflicting_hard_regs);
- conflicting_hard_regs = OBJECT_CONFLICT_HARD_REGS (obj);
- AND_COMPL_HARD_REG_SET (conflicting_hard_regs, ira_no_alloc_regs);
- conflicting_hard_regs &= reg_class_contents[ALLOCNO_CLASS (a)];
+ conflicting_hard_regs = (OBJECT_CONFLICT_HARD_REGS (obj)
+ & ~ira_no_alloc_regs
+ & reg_class_contents[ALLOCNO_CLASS (a)]);
print_hard_reg_set (file, ";; conflict hard regs:",
conflicting_hard_regs);
putc ('\n', file);
@@ -738,11 +738,9 @@ ira_build_conflicts (void)
if (! targetm.class_likely_spilled_p (base))
CLEAR_HARD_REG_SET (temp_hard_reg_set);
else
- {
- temp_hard_reg_set = reg_class_contents[base];
- AND_COMPL_HARD_REG_SET (temp_hard_reg_set, ira_no_alloc_regs);
- temp_hard_reg_set &= call_used_reg_set;
- }
+ temp_hard_reg_set = (reg_class_contents[base]
+ & ~ira_no_alloc_regs
+ & call_used_reg_set);
FOR_EACH_ALLOCNO (a, ai)
{
int i, n = ALLOCNO_NUM_OBJECTS (a);
Index: gcc/ira-costs.c
===================================================================
--- gcc/ira-costs.c 2019-09-09 16:07:28.372726754 +0100
+++ gcc/ira-costs.c 2019-09-09 16:10:15.303545844 +0100
@@ -255,9 +255,8 @@ restrict_cost_classes (cost_classes_t fu
/* Calculate the set of registers in CL that belong to REGS and
are valid for MODE. */
HARD_REG_SET valid_for_cl = reg_class_contents[cl] & regs;
- AND_COMPL_HARD_REG_SET (valid_for_cl,
- ira_prohibited_class_mode_regs[cl][mode]);
- AND_COMPL_HARD_REG_SET (valid_for_cl, ira_no_alloc_regs);
+ valid_for_cl &= ~(ira_prohibited_class_mode_regs[cl][mode]
+ | ira_no_alloc_regs);
if (hard_reg_set_empty_p (valid_for_cl))
continue;
@@ -341,8 +340,7 @@ setup_regno_cost_classes_by_aclass (int
if ((classes_ptr = cost_classes_aclass_cache[aclass]) == NULL)
{
- temp = reg_class_contents[aclass];
- AND_COMPL_HARD_REG_SET (temp, ira_no_alloc_regs);
+ temp = reg_class_contents[aclass] & ~ira_no_alloc_regs;
/* We exclude classes from consideration which are subsets of
ACLASS only if ACLASS is an uniform class. */
exclude_p = ira_uniform_class_p[aclass];
@@ -354,8 +352,7 @@ setup_regno_cost_classes_by_aclass (int
{
/* Exclude non-uniform classes which are subsets of
ACLASS. */
- temp2 = reg_class_contents[cl];
- AND_COMPL_HARD_REG_SET (temp2, ira_no_alloc_regs);
+ temp2 = reg_class_contents[cl] & ~ira_no_alloc_regs;
if (hard_reg_set_subset_p (temp2, temp) && cl != aclass)
continue;
}
Index: gcc/ira-lives.c
===================================================================
--- gcc/ira-lives.c 2019-09-09 16:08:54.792113779 +0100
+++ gcc/ira-lives.c 2019-09-09 16:10:15.303545844 +0100
@@ -1129,8 +1129,7 @@ process_bb_node_lives (ira_loop_tree_nod
reg_live_out = df_get_live_out (bb);
sparseset_clear (objects_live);
REG_SET_TO_HARD_REG_SET (hard_regs_live, reg_live_out);
- AND_COMPL_HARD_REG_SET (hard_regs_live, eliminable_regset);
- AND_COMPL_HARD_REG_SET (hard_regs_live, ira_no_alloc_regs);
+ hard_regs_live &= ~(eliminable_regset | ira_no_alloc_regs);
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
if (TEST_HARD_REG_BIT (hard_regs_live, i))
{
Index: gcc/ira.c
===================================================================
--- gcc/ira.c 2019-09-09 16:08:54.792113779 +0100
+++ gcc/ira.c 2019-09-09 16:10:15.307545816 +0100
@@ -471,8 +471,7 @@ setup_class_hard_regs (void)
ira_assert (SHRT_MAX >= FIRST_PSEUDO_REGISTER);
for (cl = (int) N_REG_CLASSES - 1; cl >= 0; cl--)
{
- temp_hard_regset = reg_class_contents[cl];
- AND_COMPL_HARD_REG_SET (temp_hard_regset, no_unit_alloc_regs);
+ temp_hard_regset = reg_class_contents[cl] & ~no_unit_alloc_regs;
CLEAR_HARD_REG_SET (processed_hard_reg_set);
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
{
@@ -541,8 +540,7 @@ setup_reg_subclasses (void)
if (i == (int) NO_REGS)
continue;
- temp_hard_regset = reg_class_contents[i];
- AND_COMPL_HARD_REG_SET (temp_hard_regset, no_unit_alloc_regs);
+ temp_hard_regset = reg_class_contents[i] & ~no_unit_alloc_regs;
if (hard_reg_set_empty_p (temp_hard_regset))
continue;
for (j = 0; j < N_REG_CLASSES; j++)
@@ -550,8 +548,7 @@ setup_reg_subclasses (void)
{
enum reg_class *p;
- temp_hard_regset2 = reg_class_contents[j];
- AND_COMPL_HARD_REG_SET (temp_hard_regset2, no_unit_alloc_regs);
+ temp_hard_regset2 = reg_class_contents[j] & ~no_unit_alloc_regs;
if (! hard_reg_set_subset_p (temp_hard_regset,
temp_hard_regset2))
continue;
@@ -605,10 +602,8 @@ setup_class_subset_and_memory_move_costs
for (cl = (int) N_REG_CLASSES - 1; cl >= 0; cl--)
for (cl2 = (int) N_REG_CLASSES - 1; cl2 >= 0; cl2--)
{
- temp_hard_regset = reg_class_contents[cl];
- AND_COMPL_HARD_REG_SET (temp_hard_regset, no_unit_alloc_regs);
- temp_hard_regset2 = reg_class_contents[cl2];
- AND_COMPL_HARD_REG_SET (temp_hard_regset2, no_unit_alloc_regs);
+ temp_hard_regset = reg_class_contents[cl] & ~no_unit_alloc_regs;
+ temp_hard_regset2 = reg_class_contents[cl2] & ~no_unit_alloc_regs;
ira_class_subset_p[cl][cl2]
= hard_reg_set_subset_p (temp_hard_regset, temp_hard_regset2);
if (! hard_reg_set_empty_p (temp_hard_regset2)
@@ -815,10 +810,10 @@ setup_pressure_classes (void)
register pressure class. */
for (m = 0; m < NUM_MACHINE_MODES; m++)
{
- temp_hard_regset = reg_class_contents[cl];
- AND_COMPL_HARD_REG_SET (temp_hard_regset, no_unit_alloc_regs);
- AND_COMPL_HARD_REG_SET (temp_hard_regset,
- ira_prohibited_class_mode_regs[cl][m]);
+ temp_hard_regset
+ = (reg_class_contents[cl]
+ & ~(no_unit_alloc_regs
+ | ira_prohibited_class_mode_regs[cl][m]));
if (hard_reg_set_empty_p (temp_hard_regset))
continue;
ira_init_register_move_cost_if_necessary ((machine_mode) m);
@@ -832,8 +827,7 @@ setup_pressure_classes (void)
}
curr = 0;
insert_p = true;
- temp_hard_regset = reg_class_contents[cl];
- AND_COMPL_HARD_REG_SET (temp_hard_regset, no_unit_alloc_regs);
+ temp_hard_regset = reg_class_contents[cl] & ~no_unit_alloc_regs;
/* Remove so far added pressure classes which are subset of the
current candidate class. Prefer GENERAL_REGS as a pressure
register class to another class containing the same
@@ -844,8 +838,8 @@ setup_pressure_classes (void)
for (i = 0; i < n; i++)
{
cl2 = pressure_classes[i];
- temp_hard_regset2 = reg_class_contents[cl2];
- AND_COMPL_HARD_REG_SET (temp_hard_regset2, no_unit_alloc_regs);
+ temp_hard_regset2 = (reg_class_contents[cl2]
+ & ~no_unit_alloc_regs);
if (hard_reg_set_subset_p (temp_hard_regset, temp_hard_regset2)
&& (! hard_reg_set_equal_p (temp_hard_regset,
temp_hard_regset2)
@@ -907,8 +901,8 @@ setup_pressure_classes (void)
for which no reg class is defined. */
if (REGNO_REG_CLASS (i) == NO_REGS)
SET_HARD_REG_BIT (ignore_hard_regs, i);
- AND_COMPL_HARD_REG_SET (temp_hard_regset, ignore_hard_regs);
- AND_COMPL_HARD_REG_SET (temp_hard_regset2, ignore_hard_regs);
+ temp_hard_regset &= ~ignore_hard_regs;
+ temp_hard_regset2 &= ~ignore_hard_regs;
ira_assert (hard_reg_set_subset_p (temp_hard_regset2, temp_hard_regset));
}
#endif
@@ -1000,14 +994,11 @@ setup_allocno_and_important_classes (voi
same set of hard registers. */
for (i = 0; i < LIM_REG_CLASSES; i++)
{
- temp_hard_regset = reg_class_contents[i];
- AND_COMPL_HARD_REG_SET (temp_hard_regset, no_unit_alloc_regs);
+ temp_hard_regset = reg_class_contents[i] & ~no_unit_alloc_regs;
for (j = 0; j < n; j++)
{
cl = classes[j];
- temp_hard_regset2 = reg_class_contents[cl];
- AND_COMPL_HARD_REG_SET (temp_hard_regset2,
- no_unit_alloc_regs);
+ temp_hard_regset2 = reg_class_contents[cl] & ~no_unit_alloc_regs;
if (hard_reg_set_equal_p (temp_hard_regset,
temp_hard_regset2))
break;
@@ -1036,13 +1027,12 @@ setup_allocno_and_important_classes (voi
for (cl = 0; cl < N_REG_CLASSES; cl++)
if (ira_class_hard_regs_num[cl] > 0)
{
- temp_hard_regset = reg_class_contents[cl];
- AND_COMPL_HARD_REG_SET (temp_hard_regset, no_unit_alloc_regs);
+ temp_hard_regset = reg_class_contents[cl] & ~no_unit_alloc_regs;
set_p = false;
for (j = 0; j < ira_allocno_classes_num; j++)
{
- temp_hard_regset2 = reg_class_contents[ira_allocno_classes[j]];
- AND_COMPL_HARD_REG_SET (temp_hard_regset2, no_unit_alloc_regs);
+ temp_hard_regset2 = (reg_class_contents[ira_allocno_classes[j]]
+ & ~no_unit_alloc_regs);
if ((enum reg_class) cl == ira_allocno_classes[j])
break;
else if (hard_reg_set_subset_p (temp_hard_regset,
@@ -1117,8 +1107,8 @@ setup_class_translate_array (enum reg_cl
{
aclass = classes[i];
temp_hard_regset = (reg_class_contents[aclass]
- & reg_class_contents[cl]);
- AND_COMPL_HARD_REG_SET (temp_hard_regset, no_unit_alloc_regs);
+ & reg_class_contents[cl]
+ & ~no_unit_alloc_regs);
if (! hard_reg_set_empty_p (temp_hard_regset))
{
min_cost = INT_MAX;
@@ -1220,10 +1210,8 @@ setup_reg_class_relations (void)
ira_reg_classes_intersect_p[cl1][cl2] = false;
ira_reg_class_intersect[cl1][cl2] = NO_REGS;
ira_reg_class_subset[cl1][cl2] = NO_REGS;
- temp_hard_regset = reg_class_contents[cl1];
- AND_COMPL_HARD_REG_SET (temp_hard_regset, no_unit_alloc_regs);
- temp_set2 = reg_class_contents[cl2];
- AND_COMPL_HARD_REG_SET (temp_set2, no_unit_alloc_regs);
+ temp_hard_regset = reg_class_contents[cl1] & ~no_unit_alloc_regs;
+ temp_set2 = reg_class_contents[cl2] & ~no_unit_alloc_regs;
if (hard_reg_set_empty_p (temp_hard_regset)
&& hard_reg_set_empty_p (temp_set2))
{
@@ -1262,14 +1250,13 @@ setup_reg_class_relations (void)
ira_reg_class_subunion[cl1][cl2] = NO_REGS;
ira_reg_class_superunion[cl1][cl2] = NO_REGS;
intersection_set = (reg_class_contents[cl1]
- & reg_class_contents[cl2]);
- AND_COMPL_HARD_REG_SET (intersection_set, no_unit_alloc_regs);
- union_set = reg_class_contents[cl1] | reg_class_contents[cl2];
- AND_COMPL_HARD_REG_SET (union_set, no_unit_alloc_regs);
+ & reg_class_contents[cl2]
+ & ~no_unit_alloc_regs);
+ union_set = ((reg_class_contents[cl1] | reg_class_contents[cl2])
+ & ~no_unit_alloc_regs);
for (cl3 = 0; cl3 < N_REG_CLASSES; cl3++)
{
- temp_hard_regset = reg_class_contents[cl3];
- AND_COMPL_HARD_REG_SET (temp_hard_regset, no_unit_alloc_regs);
+ temp_hard_regset = reg_class_contents[cl3] & ~no_unit_alloc_regs;
if (hard_reg_set_subset_p (temp_hard_regset, intersection_set))
{
/* CL3 allocatable hard register set is inside of
@@ -1280,7 +1267,7 @@ setup_reg_class_relations (void)
temp_set2
= (reg_class_contents
[ira_reg_class_intersect[cl1][cl2]]);
- AND_COMPL_HARD_REG_SET (temp_set2, no_unit_alloc_regs);
+ temp_set2 &= ~no_unit_alloc_regs;
if (! hard_reg_set_subset_p (temp_hard_regset, temp_set2)
/* If the allocatable hard register sets are
the same, prefer GENERAL_REGS or the
@@ -1298,8 +1285,8 @@ setup_reg_class_relations (void)
ira_reg_class_intersect[cl1][cl2] = (enum reg_class) cl3;
}
temp_set2
- = reg_class_contents[ira_reg_class_subset[cl1][cl2]];
- AND_COMPL_HARD_REG_SET (temp_set2, no_unit_alloc_regs);
+ = (reg_class_contents[ira_reg_class_subset[cl1][cl2]]
+ & ~no_unit_alloc_regs);
if (! hard_reg_set_subset_p (temp_hard_regset, temp_set2)
/* Ignore unavailable hard registers and prefer
smallest class for debugging purposes. */
@@ -1317,8 +1304,8 @@ setup_reg_class_relations (void)
union of allocatable hard register sets of CL1
and CL2. */
temp_set2
- = reg_class_contents[ira_reg_class_subunion[cl1][cl2]];
- AND_COMPL_HARD_REG_SET (temp_set2, no_unit_alloc_regs);
+ = (reg_class_contents[ira_reg_class_subunion[cl1][cl2]]
+ & ~no_unit_alloc_regs);
if (ira_reg_class_subunion[cl1][cl2] == NO_REGS
|| (hard_reg_set_subset_p (temp_set2, temp_hard_regset)
@@ -1341,8 +1328,8 @@ setup_reg_class_relations (void)
of allocatable hard register sets of CL1 and
CL2. */
temp_set2
- = reg_class_contents[ira_reg_class_superunion[cl1][cl2]];
- AND_COMPL_HARD_REG_SET (temp_set2, no_unit_alloc_regs);
+ = (reg_class_contents[ira_reg_class_superunion[cl1][cl2]]
+ & ~no_unit_alloc_regs);
if (ira_reg_class_superunion[cl1][cl2] == NO_REGS
|| (hard_reg_set_subset_p (temp_hard_regset, temp_set2)
@@ -1491,8 +1478,7 @@ setup_prohibited_class_mode_regs (void)
for (cl = (int) N_REG_CLASSES - 1; cl >= 0; cl--)
{
- temp_hard_regset = reg_class_contents[cl];
- AND_COMPL_HARD_REG_SET (temp_hard_regset, no_unit_alloc_regs);
+ temp_hard_regset = reg_class_contents[cl] & ~no_unit_alloc_regs;
for (j = 0; j < NUM_MACHINE_MODES; j++)
{
count = 0;
Index: gcc/lra-assigns.c
===================================================================
--- gcc/lra-assigns.c 2019-09-09 16:08:54.792113779 +0100
+++ gcc/lra-assigns.c 2019-09-09 16:10:15.307545816 +0100
@@ -619,8 +619,7 @@ find_hard_regno_for_1 (int regno, int *c
biggest_nregs = hard_regno_nregs (hard_regno, biggest_mode);
nregs_diff = (biggest_nregs
- hard_regno_nregs (hard_regno, PSEUDO_REGNO_MODE (regno)));
- available_regs = reg_class_contents[rclass];
- AND_COMPL_HARD_REG_SET (available_regs, lra_no_alloc_regs);
+ available_regs = reg_class_contents[rclass] & ~lra_no_alloc_regs;
for (i = 0; i < rclass_size; i++)
{
if (try_only_hard_regno >= 0)
Index: gcc/lra-constraints.c
===================================================================
--- gcc/lra-constraints.c 2019-09-09 16:08:54.796113751 +0100
+++ gcc/lra-constraints.c 2019-09-09 16:10:15.307545816 +0100
@@ -1854,8 +1854,7 @@ prohibited_class_reg_set_mode_p (enum re
HARD_REG_SET temp;
lra_assert (hard_reg_set_subset_p (reg_class_contents[rclass], set));
- temp = set;
- AND_COMPL_HARD_REG_SET (temp, lra_no_alloc_regs);
+ temp = set & ~lra_no_alloc_regs;
return (hard_reg_set_subset_p
(temp, ira_prohibited_class_mode_regs[rclass][mode]));
}
@@ -2513,13 +2512,11 @@ process_alt_operands (int only_alternati
if (this_alternative != NO_REGS)
{
- HARD_REG_SET available_regs;
-
- available_regs = reg_class_contents[this_alternative];
- AND_COMPL_HARD_REG_SET
- (available_regs,
- ira_prohibited_class_mode_regs[this_alternative][mode]);
- AND_COMPL_HARD_REG_SET (available_regs, lra_no_alloc_regs);
+ HARD_REG_SET available_regs
+ = (reg_class_contents[this_alternative]
+ & ~((ira_prohibited_class_mode_regs
+ [this_alternative][mode])
+ | lra_no_alloc_regs));
if (hard_reg_set_empty_p (available_regs))
{
/* There are no hard regs holding a value of given
@@ -6407,8 +6404,8 @@ inherit_in_ebb (rtx_insn *head, rtx_insn
else
add_to_hard_reg_set (&s, PSEUDO_REGNO_MODE (dst_regno),
reg_renumber[dst_regno]);
- AND_COMPL_HARD_REG_SET (live_hard_regs, s);
- AND_COMPL_HARD_REG_SET (potential_reload_hard_regs, s);
+ live_hard_regs &= ~s;
+ potential_reload_hard_regs &= ~s;
}
/* We should invalidate potential inheritance or
splitting for the current insn usages to the next
Index: gcc/lra-eliminations.c
===================================================================
--- gcc/lra-eliminations.c 2019-09-09 16:08:54.796113751 +0100
+++ gcc/lra-eliminations.c 2019-09-09 16:10:15.307545816 +0100
@@ -1203,7 +1203,7 @@ update_reg_eliminate (bitmap insns_with_
}
}
lra_no_alloc_regs |= temp_hard_reg_set;
- AND_COMPL_HARD_REG_SET (eliminable_regset, temp_hard_reg_set);
+ eliminable_regset &= ~temp_hard_reg_set;
spill_pseudos (temp_hard_reg_set);
return result;
}
Index: gcc/lra-lives.c
===================================================================
--- gcc/lra-lives.c 2019-09-09 16:08:54.796113751 +0100
+++ gcc/lra-lives.c 2019-09-09 16:10:15.307545816 +0100
@@ -671,7 +671,7 @@ process_bb_lives (basic_block bb, int &c
sparseset_clear (pseudos_live_through_setjumps);
CLEAR_HARD_REG_SET (last_call_used_reg_set);
REG_SET_TO_HARD_REG_SET (hard_regs_live, reg_live_out);
- AND_COMPL_HARD_REG_SET (hard_regs_live, eliminable_regset);
+ hard_regs_live &= ~eliminable_regset;
EXECUTE_IF_SET_IN_BITMAP (reg_live_out, FIRST_PSEUDO_REGISTER, j, bi)
{
update_pseudo_point (j, curr_point, USE_POINT);
Index: gcc/reload1.c
===================================================================
--- gcc/reload1.c 2019-09-09 16:08:54.800113722 +0100
+++ gcc/reload1.c 2019-09-09 16:10:15.307545816 +0100
@@ -3929,7 +3929,7 @@ update_eliminables_and_spill (void)
HARD_REG_SET to_spill;
CLEAR_HARD_REG_SET (to_spill);
update_eliminables (&to_spill);
- AND_COMPL_HARD_REG_SET (used_spill_regs, to_spill);
+ used_spill_regs &= ~to_spill;
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
if (TEST_HARD_REG_BIT (to_spill, i))
@@ -4783,8 +4783,8 @@ reload_as_needed (int live_known)
be partially clobbered by the call. */
else if (CALL_P (insn))
{
- AND_COMPL_HARD_REG_SET (reg_reloaded_valid, call_used_reg_set);
- AND_COMPL_HARD_REG_SET (reg_reloaded_valid, reg_reloaded_call_part_clobbered);
+ reg_reloaded_valid &= ~(call_used_reg_set
+ | reg_reloaded_call_part_clobbered);
/* If this is a call to a setjmp-type function, we must not
reuse any reload reg contents across the call; that will
Index: gcc/resource.c
===================================================================
--- gcc/resource.c 2019-09-09 16:08:54.800113722 +0100
+++ gcc/resource.c 2019-09-09 16:10:15.307545816 +0100
@@ -450,8 +450,8 @@ find_dead_or_set_registers (rtx_insn *ta
case CODE_LABEL:
/* After a label, any pending dead registers that weren't yet
used can be made dead. */
- AND_COMPL_HARD_REG_SET (pending_dead_regs, needed.regs);
- AND_COMPL_HARD_REG_SET (res->regs, pending_dead_regs);
+ pending_dead_regs &= ~needed.regs;
+ res->regs &= ~pending_dead_regs;
CLEAR_HARD_REG_SET (pending_dead_regs);
continue;
@@ -565,14 +565,12 @@ find_dead_or_set_registers (rtx_insn *ta
}
target_res = *res;
- scratch = target_set.regs;
- AND_COMPL_HARD_REG_SET (scratch, needed.regs);
- AND_COMPL_HARD_REG_SET (target_res.regs, scratch);
+ scratch = target_set.regs & ~needed.regs;
+ target_res.regs &= ~scratch;
fallthrough_res = *res;
- scratch = set.regs;
- AND_COMPL_HARD_REG_SET (scratch, needed.regs);
- AND_COMPL_HARD_REG_SET (fallthrough_res.regs, scratch);
+ scratch = set.regs & ~needed.regs;
+ fallthrough_res.regs &= ~scratch;
if (!ANY_RETURN_P (this_jump_insn->jump_label ()))
find_dead_or_set_registers
@@ -601,9 +599,8 @@ find_dead_or_set_registers (rtx_insn *ta
mark_referenced_resources (insn, &needed, true);
mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
- scratch = set.regs;
- AND_COMPL_HARD_REG_SET (scratch, needed.regs);
- AND_COMPL_HARD_REG_SET (res->regs, scratch);
+ scratch = set.regs & ~needed.regs;
+ res->regs &= ~scratch;
}
return jump_insn;
@@ -1048,8 +1045,7 @@ mark_target_live_regs (rtx_insn *insns,
/* CALL clobbers all call-used regs that aren't fixed except
sp, ap, and fp. Do this before setting the result of the
call live. */
- AND_COMPL_HARD_REG_SET (current_live_regs,
- regs_invalidated_by_this_call);
+ current_live_regs &= ~regs_invalidated_by_this_call;
}
/* A CALL_INSN sets any global register live, since it may
@@ -1097,7 +1093,7 @@ mark_target_live_regs (rtx_insn *insns,
/* A label clobbers the pending dead registers since neither
reload nor jump will propagate a value across a label. */
- AND_COMPL_HARD_REG_SET (current_live_regs, pending_dead_regs);
+ current_live_regs &= ~pending_dead_regs;
CLEAR_HARD_REG_SET (pending_dead_regs);
/* We must conservatively assume that all registers that used
@@ -1160,8 +1156,7 @@ mark_target_live_regs (rtx_insn *insns,
{
mark_referenced_resources (insn, &needed, true);
- scratch = needed.regs;
- AND_COMPL_HARD_REG_SET (scratch, set.regs);
+ scratch = needed.regs & ~set.regs;
new_resources.regs |= scratch;
mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
Index: gcc/sched-deps.c
===================================================================
--- gcc/sched-deps.c 2019-09-09 16:08:54.800113722 +0100
+++ gcc/sched-deps.c 2019-09-09 16:10:15.307545816 +0100
@@ -2885,7 +2885,7 @@ get_implicit_reg_pending_clobbers (HARD_
preprocess_constraints (insn);
alternative_mask preferred = get_preferred_alternatives (insn);
ira_implicitly_set_insn_hard_regs (temp, preferred);
- AND_COMPL_HARD_REG_SET (*temp, ira_no_alloc_regs);
+ *temp &= ~ira_no_alloc_regs;
}
/* Analyze an INSN with pattern X to find all dependencies. */
Index: gcc/sel-sched.c
===================================================================
--- gcc/sel-sched.c 2019-09-09 16:08:54.804113694 +0100
+++ gcc/sel-sched.c 2019-09-09 16:10:15.311545787 +0100
@@ -1248,8 +1248,8 @@ mark_unavailable_hard_regs (def_t def, s
/* Exclude registers that are partially call clobbered. */
if (def->crosses_call
&& !targetm.hard_regno_call_part_clobbered (NULL, regno, mode))
- AND_COMPL_HARD_REG_SET (reg_rename_p->available_for_renaming,
- sel_hrd.regs_for_call_clobbered[mode]);
+ reg_rename_p->available_for_renaming
+ &= ~sel_hrd.regs_for_call_clobbered[mode];
/* Leave only those that are ok to rename. */
EXECUTE_IF_SET_IN_HARD_REG_SET (reg_rename_p->available_for_renaming,
@@ -1270,8 +1270,7 @@ mark_unavailable_hard_regs (def_t def, s
cur_reg);
}
- AND_COMPL_HARD_REG_SET (reg_rename_p->available_for_renaming,
- reg_rename_p->unavailable_hard_regs);
+ reg_rename_p->available_for_renaming &= ~reg_rename_p->unavailable_hard_regs;
/* Regno is always ok from the renaming part of view, but it really
could be in *unavailable_hard_regs already, so set it here instead
@@ -2105,7 +2104,7 @@ implicit_clobber_conflict_p (insn_t thro
preprocess_constraints (insn);
alternative_mask prefrred = get_preferred_alternatives (insn);
ira_implicitly_set_insn_hard_regs (&temp, prefrred);
- AND_COMPL_HARD_REG_SET (temp, ira_no_alloc_regs);
+ temp &= ~ira_no_alloc_regs;
/* If any implicit clobber registers intersect with regular ones in
through_insn, we have a dependency and thus bail out. */
Index: gcc/shrink-wrap.c
===================================================================
--- gcc/shrink-wrap.c 2019-09-09 16:08:54.804113694 +0100
+++ gcc/shrink-wrap.c 2019-09-09 16:10:15.311545787 +0100
@@ -76,7 +76,7 @@ requires_stack_frame_p (rtx_insn *insn,
}
if (hard_reg_set_intersect_p (hardregs, prologue_used))
return true;
- AND_COMPL_HARD_REG_SET (hardregs, call_used_reg_set);
+ hardregs &= ~call_used_reg_set;
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
if (TEST_HARD_REG_BIT (hardregs, regno)
&& df_regs_ever_live_p (regno))
@@ -687,7 +687,7 @@ try_shrink_wrapping (edge *entry_edge, r
HARD_REG_SET this_used;
CLEAR_HARD_REG_SET (this_used);
note_uses (&PATTERN (insn), record_hard_reg_uses, &this_used);
- AND_COMPL_HARD_REG_SET (this_used, prologue_clobbered);
+ this_used &= ~prologue_clobbered;
prologue_used |= this_used;
note_stores (insn, record_hard_reg_sets, &prologue_clobbered);
}
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [6/9] Remove AND_COMPL_HARD_REG_SET
2019-09-09 16:01 ` [6/9] Remove AND_COMPL_HARD_REG_SET Richard Sandiford
@ 2019-09-09 17:40 ` Jeff Law
0 siblings, 0 replies; 21+ messages in thread
From: Jeff Law @ 2019-09-09 17:40 UTC (permalink / raw)
To: gcc-patches, richard.sandiford
On 9/9/19 10:01 AM, Richard Sandiford wrote:
> Use "x &= ~y" instead of "AND_COMPL_HARD_REG_SET (x, y)", or just
> "x & ~y" if the result is a temporary. This means that we're splitting
> it into two operations, but the compiler should be able to combine them
> for reasonable values of FIRST_PSEUDO_REGISTER.
>
>
> 2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
>
> gcc/
> * hard-reg-set.h (AND_COMPL_HARD_REG_SET): Delete.
> * caller-save.c (setup_save_areas): Use "&~" instead of
> AND_COMPL_HARD_REG_SET.
> (save_call_clobbered_regs): Likewise.
> * config/epiphany/epiphany.c (epiphany_conditional_register_usage):
> Likewise.
> * config/frv/frv.c (frv_ifcvt_modify_tests): Likewise.
> * config/gcn/gcn.c (gcn_md_reorg): Likewise.
> * config/i386/i386.c (ix86_conditional_register_usage): Likewise.
> * config/mips/mips.c (mips_class_max_nregs): Likewise.
> (mips_conditional_register_usage): Likewise.
> * config/sh/sh.c (output_stack_adjust): Likewise.
> * ira-color.c (form_allocno_hard_regs_nodes_forest): Likewise.
> (setup_profitable_hard_regs): Likewise.
> (get_conflict_and_start_profitable_regs): Likewise.
> * ira-conflicts.c (print_allocno_conflicts): Likewise.
> (ira_build_conflicts): Likewise.
> * ira-costs.c (restrict_cost_classes): Likewise.
> (setup_regno_cost_classes_by_aclass): Likewise.
> * ira-lives.c (process_bb_node_lives): Likewise.
> * ira.c (setup_class_hard_regs, setup_reg_subclasses): Likewise.
> (setup_class_subset_and_memory_move_costs, setup_pressure_classes)
> (setup_allocno_and_important_classes, setup_class_translate_array)
> (setup_reg_class_relations, setup_prohibited_class_mode_regs):
> Likewise.
> * lra-assigns.c (find_hard_regno_for_1): Likewise.
> * lra-constraints.c (prohibited_class_reg_set_mode_p): Likewise.
> (process_alt_operands, inherit_in_ebb): Likewise.
> * lra-eliminations.c (update_reg_eliminate): Likewise.
> * lra-lives.c (process_bb_lives): Likewise.
> * reload1.c (update_eliminables_and_spill, reload_as_needed): Likewise.
> * resource.c (find_dead_or_set_registers): Likewise.
> (mark_target_live_regs): Likewise.
> * sched-deps.c (get_implicit_reg_pending_clobbers): Likewise.
> * sel-sched.c (mark_unavailable_hard_regs): Likewise.
> (implicit_clobber_conflict_p): Likewise.
> * shrink-wrap.c (requires_stack_frame_p): Likewise.
> (try_shrink_wrapping): Likewise.
OK
jeff
^ permalink raw reply [flat|nested] 21+ messages in thread
* [8/9] Remove hard_reg_set_equal_p
2019-09-09 15:52 [0/9] Make HARD_REG_SETs easier to use Richard Sandiford
` (6 preceding siblings ...)
2019-09-09 16:01 ` [6/9] Remove AND_COMPL_HARD_REG_SET Richard Sandiford
@ 2019-09-09 16:02 ` Richard Sandiford
2019-09-09 17:41 ` Jeff Law
2019-09-09 16:03 ` [9/9] Tweak interface to ira-build.c:ior_hard_reg_conflicts Richard Sandiford
8 siblings, 1 reply; 21+ messages in thread
From: Richard Sandiford @ 2019-09-09 16:02 UTC (permalink / raw)
To: gcc-patches
Use "x == y" instead of "hard_reg_set_equal_p (x, y)".
2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* hard-reg-set.h (HARD_REG_SET::operator==): New function.
(HARD_REG_SET::operator!=): Likewise.
(hard_reg_set_equal_p): Delete.
* cfgcleanup.c (old_insns_match_p): Use == instead of
hard_reg_set_equal_p and != instead of !hard_reg_set_equal_p.
* ira-color.c (allocno_hard_regs_hasher::equal): Likewise.
(add_allocno_hard_regs_to_forest): Likewise.
(setup_allocno_available_regs_num): Likewise.
* ira.c (setup_pressure_classes): Likewise.
(setup_allocno_and_important_classes): Likewise.
(setup_reg_class_relations): Likewise.
* lra-lives.c (process_bb_lives): Likewise.
* reg-stack.c (change_stack, convert_regs_1): Likewise.
Index: gcc/hard-reg-set.h
===================================================================
--- gcc/hard-reg-set.h 2019-09-09 16:10:50.379298529 +0100
+++ gcc/hard-reg-set.h 2019-09-09 16:11:16.431114836 +0100
@@ -96,6 +96,21 @@ struct HARD_REG_SET
return *this;
}
+ bool
+ operator== (const HARD_REG_SET &other) const
+ {
+ HARD_REG_ELT_TYPE bad = 0;
+ for (unsigned int i = 0; i < ARRAY_SIZE (elts); ++i)
+ bad |= (elts[i] ^ other.elts[i]);
+ return bad == 0;
+ }
+
+ bool
+ operator!= (const HARD_REG_SET &other) const
+ {
+ return !operator== (other);
+ }
+
HARD_REG_ELT_TYPE elts[HARD_REG_SET_LONGS];
};
typedef const HARD_REG_SET &const_hard_reg_set;
@@ -129,7 +144,6 @@ #define HARD_CONST(X) ((HARD_REG_ELT_TYP
Also define:
hard_reg_set_subset_p (X, Y), which returns true if X is a subset of Y.
- hard_reg_set_equal_p (X, Y), which returns true if X and Y are equal.
hard_reg_set_intersect_p (X, Y), which returns true if X and Y intersect.
hard_reg_set_empty_p (X), which returns true if X is empty. */
@@ -154,12 +168,6 @@ hard_reg_set_subset_p (const_hard_reg_se
}
static inline bool
-hard_reg_set_equal_p (const_hard_reg_set x, const_hard_reg_set y)
-{
- return x == y;
-}
-
-static inline bool
hard_reg_set_intersect_p (const_hard_reg_set x, const_hard_reg_set y)
{
return (x & y) != HARD_CONST (0);
@@ -217,15 +225,6 @@ hard_reg_set_subset_p (const_hard_reg_se
return bad == 0;
}
-static inline bool
-hard_reg_set_equal_p (const_hard_reg_set x, const_hard_reg_set y)
-{
- HARD_REG_ELT_TYPE bad = 0;
- for (unsigned int i = 0; i < ARRAY_SIZE (x.elts); ++i)
- bad |= (x.elts[i] ^ y.elts[i]);
- return bad == 0;
-}
-
static inline bool
hard_reg_set_intersect_p (const_hard_reg_set x, const_hard_reg_set y)
{
Index: gcc/cfgcleanup.c
===================================================================
--- gcc/cfgcleanup.c 2019-07-18 09:23:02.893376178 +0100
+++ gcc/cfgcleanup.c 2019-09-09 16:11:16.431114836 +0100
@@ -1231,7 +1231,7 @@ old_insns_match_p (int mode ATTRIBUTE_UN
get_call_reg_set_usage (i1, &i1_used, call_used_reg_set);
get_call_reg_set_usage (i2, &i2_used, call_used_reg_set);
- if (!hard_reg_set_equal_p (i1_used, i2_used))
+ if (i1_used != i2_used)
return dir_none;
}
@@ -1265,7 +1265,7 @@ old_insns_match_p (int mode ATTRIBUTE_UN
if (REG_NOTE_KIND (note) == REG_DEAD && STACK_REG_P (XEXP (note, 0)))
SET_HARD_REG_BIT (i2_regset, REGNO (XEXP (note, 0)));
- if (!hard_reg_set_equal_p (i1_regset, i2_regset))
+ if (i1_regset != i2_regset)
return dir_none;
}
#endif
Index: gcc/ira-color.c
===================================================================
--- gcc/ira-color.c 2019-09-09 16:10:15.303545844 +0100
+++ gcc/ira-color.c 2019-09-09 16:11:16.431114836 +0100
@@ -218,7 +218,7 @@ allocno_hard_regs_hasher::hash (const al
allocno_hard_regs_hasher::equal (const allocno_hard_regs *hv1,
const allocno_hard_regs *hv2)
{
- return hard_reg_set_equal_p (hv1->set, hv2->set);
+ return hv1->set == hv2->set;
}
/* Hash table of unique allocno hard registers. */
@@ -371,7 +371,7 @@ add_allocno_hard_regs_to_forest (allocno
start = hard_regs_node_vec.length ();
for (node = *roots; node != NULL; node = node->next)
{
- if (hard_reg_set_equal_p (hv->set, node->hard_regs->set))
+ if (hv->set == node->hard_regs->set)
return;
if (hard_reg_set_subset_p (hv->set, node->hard_regs->set))
{
@@ -2688,8 +2688,7 @@ setup_allocno_available_regs_num (ira_al
reg_class_names[aclass], ira_class_hard_regs_num[aclass], n);
print_hard_reg_set (ira_dump_file, data->profitable_hard_regs, false);
fprintf (ira_dump_file, ", %snode: ",
- hard_reg_set_equal_p (data->profitable_hard_regs,
- data->hard_regs_node->hard_regs->set)
+ data->profitable_hard_regs == data->hard_regs_node->hard_regs->set
? "" : "^");
print_hard_reg_set (ira_dump_file,
data->hard_regs_node->hard_regs->set, false);
Index: gcc/ira.c
===================================================================
--- gcc/ira.c 2019-09-09 16:10:50.379298529 +0100
+++ gcc/ira.c 2019-09-09 16:11:16.431114836 +0100
@@ -841,8 +841,7 @@ setup_pressure_classes (void)
temp_hard_regset2 = (reg_class_contents[cl2]
& ~no_unit_alloc_regs);
if (hard_reg_set_subset_p (temp_hard_regset, temp_hard_regset2)
- && (! hard_reg_set_equal_p (temp_hard_regset,
- temp_hard_regset2)
+ && (temp_hard_regset != temp_hard_regset2
|| cl2 == (int) GENERAL_REGS))
{
pressure_classes[curr++] = (enum reg_class) cl2;
@@ -850,11 +849,10 @@ setup_pressure_classes (void)
continue;
}
if (hard_reg_set_subset_p (temp_hard_regset2, temp_hard_regset)
- && (! hard_reg_set_equal_p (temp_hard_regset2,
- temp_hard_regset)
+ && (temp_hard_regset2 != temp_hard_regset
|| cl == (int) GENERAL_REGS))
continue;
- if (hard_reg_set_equal_p (temp_hard_regset2, temp_hard_regset))
+ if (temp_hard_regset2 == temp_hard_regset)
insert_p = false;
pressure_classes[curr++] = (enum reg_class) cl2;
}
@@ -999,8 +997,7 @@ setup_allocno_and_important_classes (voi
{
cl = classes[j];
temp_hard_regset2 = reg_class_contents[cl] & ~no_unit_alloc_regs;
- if (hard_reg_set_equal_p (temp_hard_regset,
- temp_hard_regset2))
+ if (temp_hard_regset == temp_hard_regset2)
break;
}
if (j >= n || targetm.additional_allocno_class_p (i))
@@ -1273,7 +1270,7 @@ setup_reg_class_relations (void)
the same, prefer GENERAL_REGS or the
smallest class for debugging
purposes. */
- || (hard_reg_set_equal_p (temp_hard_regset, temp_set2)
+ || (temp_hard_regset == temp_set2
&& (cl3 == GENERAL_REGS
|| ((ira_reg_class_intersect[cl1][cl2]
!= GENERAL_REGS)
@@ -1290,7 +1287,7 @@ setup_reg_class_relations (void)
if (! hard_reg_set_subset_p (temp_hard_regset, temp_set2)
/* Ignore unavailable hard registers and prefer
smallest class for debugging purposes. */
- || (hard_reg_set_equal_p (temp_hard_regset, temp_set2)
+ || (temp_hard_regset == temp_set2
&& hard_reg_set_subset_p
(reg_class_contents[cl3],
reg_class_contents
@@ -1309,8 +1306,7 @@ setup_reg_class_relations (void)
if (ira_reg_class_subunion[cl1][cl2] == NO_REGS
|| (hard_reg_set_subset_p (temp_set2, temp_hard_regset)
- && (! hard_reg_set_equal_p (temp_set2,
- temp_hard_regset)
+ && (temp_set2 != temp_hard_regset
|| cl3 == GENERAL_REGS
/* If the allocatable hard register sets are the
same, prefer GENERAL_REGS or the smallest
@@ -1333,8 +1329,7 @@ setup_reg_class_relations (void)
if (ira_reg_class_superunion[cl1][cl2] == NO_REGS
|| (hard_reg_set_subset_p (temp_hard_regset, temp_set2)
- && (! hard_reg_set_equal_p (temp_set2,
- temp_hard_regset)
+ && (temp_set2 != temp_hard_regset
|| cl3 == GENERAL_REGS
/* If the allocatable hard register sets are the
same, prefer GENERAL_REGS or the smallest
Index: gcc/lra-lives.c
===================================================================
--- gcc/lra-lives.c 2019-09-09 16:10:15.307545816 +0100
+++ gcc/lra-lives.c 2019-09-09 16:11:16.435114808 +0100
@@ -936,8 +936,8 @@ process_bb_lives (basic_block bb, int &c
call_used_reg_set);
bool flush = (! hard_reg_set_empty_p (last_call_used_reg_set)
- && ( ! hard_reg_set_equal_p (last_call_used_reg_set,
- this_call_used_reg_set)))
+ && (last_call_used_reg_set
+ != this_call_used_reg_set))
|| (last_call_insn && ! calls_have_same_clobbers_p
(call_insn,
last_call_insn));
Index: gcc/reg-stack.c
===================================================================
--- gcc/reg-stack.c 2019-09-09 16:06:17.653228374 +0100
+++ gcc/reg-stack.c 2019-09-09 16:11:16.435114808 +0100
@@ -2643,7 +2643,7 @@ change_stack (rtx_insn *insn, stack_ptr
/* By now, the only difference should be the order of the stack,
not their depth or liveliness. */
- gcc_assert (hard_reg_set_equal_p (old->reg_set, new_stack->reg_set));
+ gcc_assert (old->reg_set == new_stack->reg_set);
gcc_assert (old->top == new_stack->top);
/* If the stack is not empty (new_stack->top != -1), loop here emitting
@@ -3158,8 +3158,7 @@ convert_regs_1 (basic_block block)
asms, we zapped the instruction itself, but that didn't produce the
same pattern of register kills as before. */
- gcc_assert (hard_reg_set_equal_p (regstack.reg_set, bi->out_reg_set)
- || any_malformed_asm);
+ gcc_assert (regstack.reg_set == bi->out_reg_set || any_malformed_asm);
bi->stack_out = regstack;
bi->done = true;
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [8/9] Remove hard_reg_set_equal_p
2019-09-09 16:02 ` [8/9] Remove hard_reg_set_equal_p Richard Sandiford
@ 2019-09-09 17:41 ` Jeff Law
0 siblings, 0 replies; 21+ messages in thread
From: Jeff Law @ 2019-09-09 17:41 UTC (permalink / raw)
To: gcc-patches, richard.sandiford
On 9/9/19 10:02 AM, Richard Sandiford wrote:
> Use "x == y" instead of "hard_reg_set_equal_p (x, y)".
>
>
> 2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
>
> gcc/
> * hard-reg-set.h (HARD_REG_SET::operator==): New function.
> (HARD_REG_SET::operator!=): Likewise.
> (hard_reg_set_equal_p): Delete.
> * cfgcleanup.c (old_insns_match_p): Use == instead of
> hard_reg_set_equal_p and != instead of !hard_reg_set_equal_p.
> * ira-color.c (allocno_hard_regs_hasher::equal): Likewise.
> (add_allocno_hard_regs_to_forest): Likewise.
> (setup_allocno_available_regs_num): Likewise.
> * ira.c (setup_pressure_classes): Likewise.
> (setup_allocno_and_important_classes): Likewise.
> (setup_reg_class_relations): Likewise.
> * lra-lives.c (process_bb_lives): Likewise.
> * reg-stack.c (change_stack, convert_regs_1): Likewise.
>
OK
jeff
^ permalink raw reply [flat|nested] 21+ messages in thread
* [9/9] Tweak interface to ira-build.c:ior_hard_reg_conflicts
2019-09-09 15:52 [0/9] Make HARD_REG_SETs easier to use Richard Sandiford
` (7 preceding siblings ...)
2019-09-09 16:02 ` [8/9] Remove hard_reg_set_equal_p Richard Sandiford
@ 2019-09-09 16:03 ` Richard Sandiford
2019-09-09 17:42 ` Jeff Law
8 siblings, 1 reply; 21+ messages in thread
From: Richard Sandiford @ 2019-09-09 16:03 UTC (permalink / raw)
To: gcc-patches
This patch makes ior_hard_reg_conflicts take a const_hard_reg_set
rather than a pointer, so that it can be passed a temporary object
in later patches.
2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* ira-int.h (ior_hard_reg_conflicts): Take a const_hard_reg_set
instead of a HARD_REG_SET *.
* ira-build.c (ior_hard_reg_conflicts): Likewise.
(ira_build): Update call accordingly.
* ira-emit.c (add_range_and_copies_from_move_list): Likewise.
Index: gcc/ira-int.h
===================================================================
--- gcc/ira-int.h 2019-09-09 17:02:41.677375853 +0100
+++ gcc/ira-int.h 2019-09-09 17:02:41.669375909 +0100
@@ -998,7 +998,7 @@ extern void ira_set_allocno_class (ira_a
extern bool ira_conflict_vector_profitable_p (ira_object_t, int);
extern void ira_allocate_conflict_vec (ira_object_t, int);
extern void ira_allocate_object_conflicts (ira_object_t, int);
-extern void ior_hard_reg_conflicts (ira_allocno_t, HARD_REG_SET *);
+extern void ior_hard_reg_conflicts (ira_allocno_t, const_hard_reg_set);
extern void ira_print_expanded_allocno (ira_allocno_t);
extern void ira_add_live_range_to_object (ira_object_t, int, int);
extern live_range_t ira_create_live_range (ira_object_t, int, int,
Index: gcc/ira-build.c
===================================================================
--- gcc/ira-build.c 2019-09-09 17:02:41.677375853 +0100
+++ gcc/ira-build.c 2019-09-09 17:02:41.669375909 +0100
@@ -614,15 +614,15 @@ merge_hard_reg_conflicts (ira_allocno_t
/* Update hard register conflict information for all objects associated with
A to include the regs in SET. */
void
-ior_hard_reg_conflicts (ira_allocno_t a, HARD_REG_SET *set)
+ior_hard_reg_conflicts (ira_allocno_t a, const_hard_reg_set set)
{
ira_allocno_object_iterator i;
ira_object_t obj;
FOR_EACH_ALLOCNO_OBJECT (a, obj, i)
{
- OBJECT_CONFLICT_HARD_REGS (obj) |= *set;
- OBJECT_TOTAL_CONFLICT_HARD_REGS (obj) |= *set;
+ OBJECT_CONFLICT_HARD_REGS (obj) |= set;
+ OBJECT_TOTAL_CONFLICT_HARD_REGS (obj) |= set;
}
}
@@ -3462,7 +3462,7 @@ ira_build (void)
allocno crossing calls. */
FOR_EACH_ALLOCNO (a, ai)
if (ALLOCNO_CALLS_CROSSED_NUM (a) != 0)
- ior_hard_reg_conflicts (a, &call_used_reg_set);
+ ior_hard_reg_conflicts (a, call_used_reg_set);
}
if (internal_flag_ira_verbose > 2 && ira_dump_file != NULL)
print_copies (ira_dump_file);
Index: gcc/ira-emit.c
===================================================================
--- gcc/ira-emit.c 2019-09-09 17:02:41.677375853 +0100
+++ gcc/ira-emit.c 2019-09-09 17:02:41.669375909 +0100
@@ -1122,8 +1122,8 @@ add_range_and_copies_from_move_list (mov
ira_allocate_object_conflicts (to_obj, n);
}
}
- ior_hard_reg_conflicts (from, &hard_regs_live);
- ior_hard_reg_conflicts (to, &hard_regs_live);
+ ior_hard_reg_conflicts (from, hard_regs_live);
+ ior_hard_reg_conflicts (to, hard_regs_live);
update_costs (from, true, freq);
update_costs (to, false, freq);
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [9/9] Tweak interface to ira-build.c:ior_hard_reg_conflicts
2019-09-09 16:03 ` [9/9] Tweak interface to ira-build.c:ior_hard_reg_conflicts Richard Sandiford
@ 2019-09-09 17:42 ` Jeff Law
0 siblings, 0 replies; 21+ messages in thread
From: Jeff Law @ 2019-09-09 17:42 UTC (permalink / raw)
To: gcc-patches, richard.sandiford
On 9/9/19 10:02 AM, Richard Sandiford wrote:
> This patch makes ior_hard_reg_conflicts take a const_hard_reg_set
> rather than a pointer, so that it can be passed a temporary object
> in later patches.
>
>
> 2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
>
> gcc/
> * ira-int.h (ior_hard_reg_conflicts): Take a const_hard_reg_set
> instead of a HARD_REG_SET *.
> * ira-build.c (ior_hard_reg_conflicts): Likewise.
> (ira_build): Update call accordingly.
> * ira-emit.c (add_range_and_copies_from_move_list): Likewise.
OK
jeff
^ permalink raw reply [flat|nested] 21+ messages in thread