From: Richard Sandiford <richard.sandiford@arm.com>
To: Stam Markianos-Wright <Stam.Markianos-Wright@arm.com>
Cc: "gcc-patches\@gcc.gnu.org" <gcc-patches@gcc.gnu.org>,
Richard Earnshaw <Richard.Earnshaw@arm.com>,
Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>,
Marcus Shawcroft <Marcus.Shawcroft@arm.com>
Subject: Re: [GCC][PATCH][AArch64]Add ACLE intrinsics for dot product (usdot - vector, <us/su>dot - by element) for AArch64 AdvSIMD ARMv8.6 Extension
Date: Fri, 13 Dec 2019 11:03:00 -0000 [thread overview]
Message-ID: <mptwob0zdwd.fsf@arm.com> (raw)
In-Reply-To: <a988becf-e7f3-c7df-d23c-983b6ca35db4@arm.com> (Stam Markianos-Wright's message of "Fri, 13 Dec 2019 10:18:28 +0000")
Stam Markianos-Wright <Stam.Markianos-Wright@arm.com> writes:
> @@ -573,6 +586,44 @@
> [(set_attr "type" "neon_dot<q>")]
> )
>
> +;; These instructions map to the __builtins for the armv8.6a I8MM usdot, sudot
> +;; (by element) Dot Product operations.
> +(define_insn "aarch64_<sur>dot_lane<vsi2qi>"
> + [(set (match_operand:VS 0 "register_operand" "=w")
> + (plus:VS (match_operand:VS 1 "register_operand" "0")
> + (unspec:VS [(match_operand:<VSI2QI> 2 "register_operand" "w")
> + (match_operand:V8QI 3 "register_operand" "<h_con>")
> + (match_operand:SI 4 "immediate_operand" "i")]
> + DOTPROD_I8MM)))]
> + "TARGET_SIMD && TARGET_I8MM"
> + {
> + int nunits = GET_MODE_NUNITS (V8QImode).to_constant ();
> + int lane = INTVAL (operands[4]);
> + operands[4]
> + = gen_int_mode (ENDIAN_LANE_N (nunits / 4, lane), SImode);
> + return "<sur>dot\\t%0.<Vtype>, %2.<Vdottype>, %3.4b[%4]";
> + }
> + [(set_attr "type" "neon_dot<q>")]
> +)
> +
> +(define_insn "aarch64_<sur>dot_laneq<vsi2qi>"
> + [(set (match_operand:VS 0 "register_operand" "=w")
> + (plus:VS (match_operand:VS 1 "register_operand" "0")
> + (unspec:VS [(match_operand:<VSI2QI> 2 "register_operand" "w")
> + (match_operand:V16QI 3 "register_operand" "<h_con>")
Using <h_con> seems a bit redundant when it's always "w" in this context,
but either's fine.
> + (match_operand:SI 4 "immediate_operand" "i")]
> + DOTPROD_I8MM)))]
> + "TARGET_SIMD && TARGET_I8MM"
> + {
> + int nunits = GET_MODE_NUNITS (V16QImode).to_constant ();
> + int lane = INTVAL (operands[4]);
> + operands[4]
> + = gen_int_mode (ENDIAN_LANE_N (nunits / 4, lane), SImode);
Nit: = should be indented two spaces more, and there should be only
one space afterwards. But the statement fits on one line, so probably
better not to have the line break at all.
> + return "<sur>dot\\t%0.<Vtype>, %2.<Vdottype>, %3.4b[%4]";
> + }
> + [(set_attr "type" "neon_dot<q>")]
> +)
These two patterns can be merged using :VB for operand 3.
LGTM otherwise, thanks.
Richard
next prev parent reply other threads:[~2019-12-13 11:03 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-13 10:18 Stam Markianos-Wright
2019-12-13 11:03 ` Richard Sandiford [this message]
2019-12-20 13:44 ` Stam Markianos-Wright
2019-12-20 14:24 ` Richard Sandiford
2019-12-30 9:22 ` Stam Markianos-Wright
2019-12-30 10:29 ` Richard Sandiford
2020-01-09 14:48 ` Stam Markianos-Wright
2020-01-09 15:53 ` Richard Sandiford
2020-01-16 16:14 ` Stam Markianos-Wright
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