From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 0CAA8383938C for ; Tue, 28 Nov 2023 22:46:12 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 0CAA8383938C Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=arm.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 0CAA8383938C Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1701211573; cv=none; b=AaSHEJSCHgJ3ooE3xOO5NLBPcyAVR7TJNze3Obl3aBIrlrveXdhPQVyoAYSaWROD2GcxVExiYq2TDbe8UlW9gZHY1YJBMdkboTDoDz9S3AdbawP0cWUPu2zeeDp+kpRxHvPR590efpTPrtFjvWQK/DD/jmykoquqws7EQ5oo0v4= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1701211573; c=relaxed/simple; bh=8CfVblSKgKaA4KPoOxguavb5nsvdKNtb+6jGBlm4FFg=; h=From:To:Subject:Date:Message-ID:MIME-Version; b=S+fME9VWpyPfrQe6+WBeUhfI29Hx0pbUEDqxQPL3UGNuRpcoAGgpPXS0uvvlwMtXyihIEVGqcE4JEiqq7xmXgyDH2RG17SFeFNlahxDUOdjcEl4AVNoI0VdNdKNPxxmVvJrLiTd0aVuSz836BPj8ZQ/N+kT3V+hgIk0pEEHcrw8= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E9ACD1FB; Tue, 28 Nov 2023 14:46:58 -0800 (PST) Received: from localhost (e121540-lin.manchester.arm.com [10.32.110.72]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E1E673F6C4; Tue, 28 Nov 2023 14:46:10 -0800 (PST) From: Richard Sandiford To: Victor Do Nascimento Mail-Followup-To: Victor Do Nascimento ,, , , richard.sandiford@arm.com Cc: , , Subject: Re: [PATCH v2 0/5] aarch64: Add Armv9.4-a 128-bit system-register read/write support References: <20231128155609.198744-1-victor.donascimento@arm.com> Date: Tue, 28 Nov 2023 22:46:09 +0000 In-Reply-To: <20231128155609.198744-1-victor.donascimento@arm.com> (Victor Do Nascimento's message of "Tue, 28 Nov 2023 15:55:42 +0000") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-Spam-Status: No, score=-16.4 required=5.0 tests=BAYES_00,KAM_DMARC_NONE,KAM_DMARC_STATUS,KAM_LAZY_DOMAIN_SECURITY,KAM_SHORT,SPF_HELO_NONE,SPF_NONE,TXREP,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Victor Do Nascimento writes: > Changes from v1 - > https://gcc.gnu.org/pipermail/gcc-patches/2023-November/635531.html > > * [PATCH 4/5] - For `error_at' message, put feature name in quotes. > * [PATCH 4/5] - For `aarch64_retrieve_sysreg' function, add > description of new parameter to comments. > * [PATCH 5/5] - Reduce the minimum arch requirements of the system > register unit tests, selectively using `#pragma GCC target' when > testing 128-bit sysreg r/w functions. OK for the series, thanks, with the changelog tweak that Kyrill asked for. 1-3 had already been approved and I agree that the new versions of 4 and 5 address the review comments. Richard > --- > > Given the introduction of optional 128-bit page table descriptor and > translation hardening extension support with the Arm9.4-a > architecture, this patch series introduces the necessary changes to > the aarch64-specific builtin code to enable the reading and writing of > 128-bit system registers. In so doing, the following ACLE builtins and > feature macro are made available to the compiler: > > * __uint128_t __arm_rsr128(const char *special_register); > * void __arm_wsr128(const char *special_register, __uint128_t value); > * __ARM_FEATURE_SYSREG128. > > Finally, in order to update the GCC system-register database bringing > it in line with Binutils, and in so doing add the relevant 128-bit > system registers to GCC, this patch also introduces the Guarded > Control Stack (GCS) `+gcs' architecture modifier flag, allowing the > inclusion of the novel GCS system registers which are now supported > and also present in the `aarch64-sys-regs.def' system register > database. > > Victor Do Nascimento (5): > aarch64: Add march flags for +the and +d128 arch extensions > aarch64: Add support for GCS system registers with the +gcs modifier > aarch64: Sync `aarch64-sys-regs.def' with Binutils. > aarch64: Implement 128-bit extension to ACLE sysreg r/w builtins > aarch64: Add rsr128 and wsr128 ACLE tests > > gcc/config/aarch64/aarch64-arches.def | 2 + > gcc/config/aarch64/aarch64-builtins.cc | 50 ++++++++++++++++--- > gcc/config/aarch64/aarch64-c.cc | 1 + > .../aarch64/aarch64-option-extensions.def | 6 +++ > gcc/config/aarch64/aarch64-protos.h | 2 +- > gcc/config/aarch64/aarch64-sys-regs.def | 30 +++++++---- > gcc/config/aarch64/aarch64.cc | 9 +++- > gcc/config/aarch64/aarch64.h | 21 ++++++++ > gcc/config/aarch64/aarch64.md | 18 +++++++ > gcc/config/aarch64/arm_acle.h | 11 ++++ > gcc/doc/invoke.texi | 8 +++ > gcc/testsuite/gcc.target/aarch64/acle/rwsr.c | 32 ++++++++++++ > 12 files changed, 170 insertions(+), 20 deletions(-)