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From: Richard Sandiford <richard.sandiford@arm.com>
To: Christophe Lyon <christophe.lyon@linaro.org>
Cc: gcc-patches@gcc.gnu.org,  Kyrylo.Tkachov@arm.com
Subject: Re: [PATCH] aarch64: Add pattern for bswap + rotate [PR 110039]
Date: Wed, 31 May 2023 11:22:16 +0100	[thread overview]
Message-ID: <mpty1l44x7r.fsf@arm.com> (raw)
In-Reply-To: <CAPS5khYP_RWi_zd66KCzU0TOQ4c8tB7+HH7nEsHBKZ5=jwr_6A@mail.gmail.com> (Christophe Lyon's message of "Wed, 31 May 2023 12:08:20 +0200")

Christophe Lyon <christophe.lyon@linaro.org> writes:
> On Wed, 31 May 2023 at 11:49, Richard Sandiford <richard.sandiford@arm.com>
> wrote:
>
>> Christophe Lyon <christophe.lyon@linaro.org> writes:
>> > After commit g:d8545fb2c71683f407bfd96706103297d4d6e27b, we missed a
>> > pattern to match the new GIMPLE form.
>> >
>> > With this patch, gcc.target/aarch64/rev16_2.c passes again.
>> >
>> > 2023-05-31  Christophe Lyon  <christophe.lyon@linaro.org>
>> >
>> >       PR target/110039
>> >       gcc/
>> >       * config/aarch64/aarch64.md (aarch64_rev16<mode>2_alt3): New
>> >       pattern.
>> > ---
>> >  gcc/config/aarch64/aarch64.md | 10 ++++++++++
>> >  1 file changed, 10 insertions(+)
>> >
>> > diff --git a/gcc/config/aarch64/aarch64.md
>> b/gcc/config/aarch64/aarch64.md
>> > index 8b8951d7b14..663353791fd 100644
>> > --- a/gcc/config/aarch64/aarch64.md
>> > +++ b/gcc/config/aarch64/aarch64.md
>> > @@ -6267,6 +6267,16 @@
>> >    [(set_attr "type" "rev")]
>> >  )
>> >
>> > +;; Similar pattern to mache (rotate (bswap) 16)
>> > +(define_insn "aarch64_rev16<mode>2_alt3"
>> > +  [(set (match_operand:GPI 0 "register_operand" "=r")
>> > +        (rotate:GPI (bswap:GPI (match_operand:GPI 1 "register_operand"
>> "r"))
>> > +                    (const_int 16)))]
>> > +  ""
>> > +  "rev16\\t%<w>0, %<w>1"
>> > +  [(set_attr "type" "rev")]
>> > +)
>> > +
>>
>> Doesn't this have to be :SI only?  The rtl expression and the
>> instruction are different for :DI.
>>
> Do you mean the other two examples in the testcase?
> ( __rev16_64_alt, __rev16_64)
> They currently use aarch64_rev16di2_alt1 and aarch64_rev16di2_alt2
> respectively.

I meant more that the new pattern would generate wrong code if someone
wrote a 64-bit bswap followed by a 64-bit rotate left.

Richard

  reply	other threads:[~2023-05-31 10:22 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-31  9:28 Christophe Lyon
2023-05-31  9:49 ` Richard Sandiford
2023-05-31 10:08   ` Christophe Lyon
2023-05-31 10:22     ` Richard Sandiford [this message]
2023-05-31 13:13       ` [PATCH v2] " Christophe Lyon
2023-05-31 13:15         ` Richard Sandiford

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