From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 0A4C43896C11 for ; Tue, 15 Nov 2022 14:54:03 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 0A4C43896C11 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id F017E13D5; Tue, 15 Nov 2022 06:54:08 -0800 (PST) Received: from localhost (e121540-lin.manchester.arm.com [10.32.98.62]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D5DFB3F587; Tue, 15 Nov 2022 06:54:01 -0800 (PST) From: Richard Sandiford To: Tamar Christina Mail-Followup-To: Tamar Christina ,Tamar Christina via Gcc-patches , nd , "rguenther\@suse.de" , "jlaw\@ventanamicro.com" , richard.sandiford@arm.com Cc: Tamar Christina via Gcc-patches , nd , "rguenther\@suse.de" , "jlaw\@ventanamicro.com" Subject: Re: [PATCH]middle-end: replace GET_MODE_WIDER_MODE with GET_MODE_NEXT_MODE References: Date: Tue, 15 Nov 2022 14:54:00 +0000 In-Reply-To: (Tamar Christina's message of "Tue, 15 Nov 2022 13:15:53 +0000") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-Spam-Status: No, score=-40.8 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_NONE,KAM_DMARC_STATUS,KAM_LAZY_DOMAIN_SECURITY,SPF_HELO_NONE,SPF_NONE,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Tamar Christina writes: >> -----Original Message----- >> From: Richard Sandiford >> Sent: Tuesday, November 15, 2022 11:59 AM >> To: Tamar Christina via Gcc-patches >> Cc: Tamar Christina ; nd ; >> rguenther@suse.de; jlaw@ventanamicro.com >> Subject: Re: [PATCH]middle-end: replace GET_MODE_WIDER_MODE with >> GET_MODE_NEXT_MODE >> >> Tamar Christina via Gcc-patches writes: >> > Hi All, >> > >> > After the fix to the addsub patch yesterday for bootstrap I had only >> regtested on x86. >> > While looking today it seemed the new tests were failing, this was >> > caused by a change in the behavior of the GET_MODE_WIDER_MODE >> macro on trunk. >> > >> > This patch fixes that issue. Sorry for the mess, have rebased all branches >> now. >> > >> > Bootstrapped Regtested on aarch64-none-linux-gnu and no issues. >> > >> > Ok for master? >> > >> > Thanks, >> > Tamar >> > >> > gcc/ChangeLog: >> > >> > * match.pd: Replace GET_MODE_WIDER_MODE with >> > GET_MODE_NEXT_MODE. >> > >> > --- inline copy of patch -- >> > diff --git a/gcc/match.pd b/gcc/match.pd index >> > >> 1b0ab7cf60fa4772fbe8304c622b0b8fab1bdefa..28191a992039c6f3a1dab5f7c0 >> e3 >> > 5dd58dc47092 100644 >> > --- a/gcc/match.pd >> > +++ b/gcc/match.pd >> > @@ -7997,7 +7997,7 @@ and, >> > machine_mode wide_mode; >> > } >> > (if (sel.series_p (0, 2, 0, 2) >> > - && GET_MODE_WIDER_MODE (vec_mode).exists (&wide_mode) >> > + && GET_MODE_NEXT_MODE (vec_mode).exists (&wide_mode) >> > && VECTOR_MODE_P (wide_mode) >> > && (GET_MODE_UNIT_BITSIZE (vec_mode) * 2 >> > == GET_MODE_UNIT_BITSIZE (wide_mode))) >> >> Does anything guarantee that the next mode will be the right one? >> It think it would be safer to replace the last three && conditions with: >> >> && GET_MODE_2XWIDER_MODE (GET_MODE_INNER (vec_mode)).exists >> (&wide_elt_mode) >> && multiple_p (GET_MODE_NUNITS (vec_mode), 2, &wide_nunits) >> && related_vector_mode (vec_mode, wide_elt_mode, >> wide_nunits).exists (&wide_mode) > > I see, respun patch accordingly. LGTM, but I'm nervous when it comes to match.pd stuff so I'd prefer Richi or Jeff to have the final say. Thanks, Richard > > Ok for master? > > --- inline copy of patch --- > > diff --git a/gcc/match.pd b/gcc/match.pd > index 1b0ab7cf60fa4772fbe8304c622b0b8fab1bdefa..82f05bbc912e4f80f3984d930c4a8dcb010136e1 100644 > --- a/gcc/match.pd > +++ b/gcc/match.pd > @@ -7995,12 +7995,15 @@ and, > vec_perm_indices sel (builder, 2, nelts); > machine_mode vec_mode = TYPE_MODE (type); > machine_mode wide_mode; > + scalar_mode wide_elt_mode; > + poly_uint64 wide_nunits; > + scalar_mode inner_mode = GET_MODE_INNER (vec_mode); > } > (if (sel.series_p (0, 2, 0, 2) > - && GET_MODE_WIDER_MODE (vec_mode).exists (&wide_mode) > - && VECTOR_MODE_P (wide_mode) > - && (GET_MODE_UNIT_BITSIZE (vec_mode) * 2 > - == GET_MODE_UNIT_BITSIZE (wide_mode))) > + && GET_MODE_2XWIDER_MODE (inner_mode).exists (&wide_elt_mode) > + && multiple_p (GET_MODE_NUNITS (vec_mode), 2, &wide_nunits) > + && related_vector_mode (vec_mode, wide_elt_mode, > + wide_nunits).exists (&wide_mode)) > (with > { > tree stype