* [PR target/25111] New patterns for m68k bit insns
@ 2016-11-19 17:55 Jeff Law
2017-06-19 15:07 ` Andreas Schwab
0 siblings, 1 reply; 4+ messages in thread
From: Jeff Law @ 2016-11-19 17:55 UTC (permalink / raw)
To: gcc-patches
[-- Attachment #1: Type: text/plain, Size: 541 bytes --]
This BZ is a request to improve the code we generate for single bit
set/clear/flip on the m68k where the target bit varies *and* is properly
masked to avoid undefined behavior.
I wasn't able to trigger this in GCC or newlib's runtime, but in the
past Kazu was looking at real embedded code, so I'm going to go with the
assumption that's where this request came from.
Tested by building the GCC and newlib runtimes (where it does not
trigger) and the m68k testsuite (where I've added a trivial test).
Installing on the trunk.
Jeff
[-- Attachment #2: P --]
[-- Type: text/plain, Size: 3157 bytes --]
commit adfa4e7a5d603569c0ab401ec89af574dff04bcf
Author: law <law@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Sat Nov 19 17:52:04 2016 +0000
PR target/25111
* config/m68k/m68k.md (bsetdreg): New pattern.
(bchgdreg, bclrdreg): Likewise.
PR target/25111
* gcc.target/m68k/pr25111.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@242623 138bc75d-0d04-0410-961f-82ee72b054a4
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index fd09a79..1d560f5 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2016-11-19 Jeff Law <law@redhat.com>
+
+ PR target/25111
+ * config/m68k/m68k.md (bsetdreg): New pattern.
+ (bchgdreg, bclrdreg): Likewise.
+
2016-11-19 Kaz Kojima <kkojima@gcc.gnu.org>
PR target/78426
diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md
index 7b7f373..2085619 100644
--- a/gcc/config/m68k/m68k.md
+++ b/gcc/config/m68k/m68k.md
@@ -5336,6 +5336,45 @@
}
[(set_attr "type" "bitrw")])
+(define_insn "*bsetdreg"
+ [(set (match_operand:SI 0 "register_operand" "+d")
+ (ior:SI (ashift:SI (const_int 1)
+ (and:SI (match_operand:SI 1 "register_operand" "d")
+ (const_int 31)))
+ (match_operand:SI 2 "register_operand" "0")))]
+ ""
+{
+ CC_STATUS_INIT;
+ return "bset %1,%0";
+}
+ [(set_attr "type" "bitrw")])
+
+(define_insn "*bchgdreg"
+ [(set (match_operand:SI 0 "register_operand" "+d")
+ (xor:SI (ashift:SI (const_int 1)
+ (and:SI (match_operand:SI 1 "register_operand" "d")
+ (const_int 31)))
+ (match_operand:SI 2 "register_operand" "0")))]
+ ""
+{
+ CC_STATUS_INIT;
+ return "bchg %1,%0";
+}
+ [(set_attr "type" "bitrw")])
+
+(define_insn "*bclrdreg"
+ [(set (match_operand:SI 0 "register_operand" "+d")
+ (and:SI (rotate:SI (const_int -2)
+ (and:SI (match_operand:SI 1 "register_operand" "d")
+ (const_int 31)))
+ (match_operand:SI 2 "register_operand" "0")))]
+ ""
+{
+ CC_STATUS_INIT;
+ return "bclr %1,%0";
+}
+ [(set_attr "type" "bitrw")])
+
;; clear bit, bit number is int
(define_insn "bclrmemqi"
[(set (zero_extract:SI (match_operand:QI 0 "memory_operand" "+m")
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 50b8888..41133d8 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2016-11-18 Jeff Law <law@redhat.com>
+
+ PR target/25111
+ * gcc.target/m68k/pr25111.c: New test.
+
2016-11-18 Jakub Jelinek <jakub@redhat.com>
PR c++/68180
diff --git a/gcc/testsuite/gcc.target/m68k/pr25111.c b/gcc/testsuite/gcc.target/m68k/pr25111.c
new file mode 100644
index 0000000..950eeda
--- /dev/null
+++ b/gcc/testsuite/gcc.target/m68k/pr25111.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+/* { dg-final { scan-assembler-times "bset" 1 } } */
+/* { dg-final { scan-assembler-times "bchg" 1 } } */
+/* { dg-final { scan-assembler-times "bclr" 1 } } */
+
+int bar (void);
+
+int
+foo1 (int b)
+{
+ int a = bar ();
+ return ( a | (1 << (b & 31)));
+}
+
+int
+foo2 (int b)
+{
+ int a = bar ();
+ return ( a ^ (1 << (b & 31)));
+}
+
+
+int
+foo3 (int b)
+{
+ int a = bar ();
+ return ( a & ~(1 << (b & 31)));
+}
+
+
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PR target/25111] New patterns for m68k bit insns
2016-11-19 17:55 [PR target/25111] New patterns for m68k bit insns Jeff Law
@ 2017-06-19 15:07 ` Andreas Schwab
2017-06-20 10:28 ` Andreas Schwab
0 siblings, 1 reply; 4+ messages in thread
From: Andreas Schwab @ 2017-06-19 15:07 UTC (permalink / raw)
To: Jeff Law; +Cc: gcc-patches
On Nov 19 2016, Jeff Law <law@redhat.com> wrote:
> diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md
> index 7b7f373..2085619 100644
> --- a/gcc/config/m68k/m68k.md
> +++ b/gcc/config/m68k/m68k.md
> @@ -5336,6 +5336,45 @@
> }
> [(set_attr "type" "bitrw")])
>
> +(define_insn "*bsetdreg"
> + [(set (match_operand:SI 0 "register_operand" "+d")
I think you want "=d" insted of "+d". That fixes PR 80970.
Andreas.
--
Andreas Schwab, SUSE Labs, schwab@suse.de
GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE 1748 E4D4 88E3 0EEA B9D7
"And now for something completely different."
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PR target/25111] New patterns for m68k bit insns
2017-06-19 15:07 ` Andreas Schwab
@ 2017-06-20 10:28 ` Andreas Schwab
2017-06-23 4:18 ` Jeff Law
0 siblings, 1 reply; 4+ messages in thread
From: Andreas Schwab @ 2017-06-20 10:28 UTC (permalink / raw)
To: Jeff Law; +Cc: gcc-patches
Tested on m68k, installed on trunk and gcc-7 branch.
Andreas.
PR target/80970
* config/m68k/m68k.md (bsetdreg, bchgdreg, bclrdreg): Use "=d"
instead of "+d".
Index: config/m68k/m68k.md
===================================================================
--- config/m68k/m68k.md (revision 249400)
+++ config/m68k/m68k.md (working copy)
@@ -5337,7 +5337,7 @@
[(set_attr "type" "bitrw")])
(define_insn "*bsetdreg"
- [(set (match_operand:SI 0 "register_operand" "+d")
+ [(set (match_operand:SI 0 "register_operand" "=d")
(ior:SI (ashift:SI (const_int 1)
(and:SI (match_operand:SI 1 "register_operand" "d")
(const_int 31)))
@@ -5350,7 +5350,7 @@
[(set_attr "type" "bitrw")])
(define_insn "*bchgdreg"
- [(set (match_operand:SI 0 "register_operand" "+d")
+ [(set (match_operand:SI 0 "register_operand" "=d")
(xor:SI (ashift:SI (const_int 1)
(and:SI (match_operand:SI 1 "register_operand" "d")
(const_int 31)))
@@ -5363,7 +5363,7 @@
[(set_attr "type" "bitrw")])
(define_insn "*bclrdreg"
- [(set (match_operand:SI 0 "register_operand" "+d")
+ [(set (match_operand:SI 0 "register_operand" "=d")
(and:SI (rotate:SI (const_int -2)
(and:SI (match_operand:SI 1 "register_operand" "d")
(const_int 31)))
Index: testsuite/gcc.dg/torture/pr80970.c
===================================================================
--- testsuite/gcc.dg/torture/pr80970.c (nonexistent)
+++ testsuite/gcc.dg/torture/pr80970.c (working copy)
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+
+int a, b, c, d, e;
+void f ()
+{
+ long g, h;
+ if (c)
+ e = d;
+ g = d & 31;
+ h = 1 << g;
+ a = e | h;
+ b = a;
+}
--
Andreas Schwab, SUSE Labs, schwab@suse.de
GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE 1748 E4D4 88E3 0EEA B9D7
"And now for something completely different."
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PR target/25111] New patterns for m68k bit insns
2017-06-20 10:28 ` Andreas Schwab
@ 2017-06-23 4:18 ` Jeff Law
0 siblings, 0 replies; 4+ messages in thread
From: Jeff Law @ 2017-06-23 4:18 UTC (permalink / raw)
To: Andreas Schwab; +Cc: gcc-patches
On 06/20/2017 04:28 AM, Andreas Schwab wrote:
> Tested on m68k, installed on trunk and gcc-7 branch.
>
> Andreas.
>
> PR target/80970
> * config/m68k/m68k.md (bsetdreg, bchgdreg, bclrdreg): Use "=d"
> instead of "+d".
Thanks for taking care of this. I've been buried in the land of stack
clash for the last few weeks.
jeff
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2017-06-23 4:18 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-11-19 17:55 [PR target/25111] New patterns for m68k bit insns Jeff Law
2017-06-19 15:07 ` Andreas Schwab
2017-06-20 10:28 ` Andreas Schwab
2017-06-23 4:18 ` Jeff Law
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).