4 instruction sequences can be implemented for AArch64 TLS LE model
based on relocations provided.

These instruction sequences are the same for tiny/small/large, We just
need to choose the most efficient one to use accoding to tls size.

the 12bit version give us 4K TLS size, 24bit give us 16M, 32bit give us
4G while 48bit gives us 256TB.

sequence 1
==========
  add  t0, tp, #:tprel_lo12:x1           R_AARCH64_TLSLE_ADD_TPREL_LO12       x1


sequence 2
==========
  add  t0, tp, #:tprel_hi12:x1, lsl #12  R_AARCH64_TLSLE_ADD_TPREL_HI12       x2
  add  t0, #:tprel_lo12_nc:x1            R_AARCH64_TLSLE_ADD_TPREL_LO12_NC    x2

sequence 2
==========
  movz t0, #:tprel_g1:x3                 R_AARCH64_TLSLE_MOVW_TPREL_G1        x3
  movk t0, #:tprel_g0_nc:x3              R_AARCH64_TLSLE_MOVW_TPREL_G0_NC     x3
  add  t0, tp, t0

sequence 4
==========
  movz t0, #:tprel_g2:x4                 R_AARCH64_TLSLE_MOVW_TPREL_G2        x4
  movk t0, #:tprel_g1_nc:x4              R_AARCH64_TLSLE_MOVW_TPREL_G1_NC     x4
  movk t0, #:tprel_g0_nc:x4              R_AARCH64_TLSLE_MOVW_TPREL_G0_NC     x4
  add  t0, t0, tp

OK for trunk?

2015-05-14  Jiong Wang  <jiong.wang@arm.com>
gcc/
  * config/aarch64/aarch64.c (aarch64_print_operand): Support tls_size.
  * config/aarch64/aarch64.md (tlsle): Choose proper instruction
  sequences.
  (tlsle_<mode>): New define_insn.
  (tlsle_movsym_<mode>): Ditto.
  * config/aarch64/constraints.md (Uta): New constraint.
  (Utb): Ditto.
  (Utc): Ditto.
  (Utd): Ditto.

gcc/testsuite/
  * gcc.target/aarch64/tlsle.c: New test source.
  * gcc.target/aarch64/tlsle12.c: New testcase.
  * gcc.target/aarch64/tlsle24.c: New testcase.
  * gcc.target/aarch64/tlsle32.c: New testcase.
-- 
Regards,
Jiong