From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 54723 invoked by alias); 24 Jul 2015 09:09:11 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 54705 invoked by uid 89); 24 Jul 2015 09:09:10 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.3 required=5.0 tests=AWL,BAYES_00,KAM_ASCII_DIVIDERS,SPF_PASS autolearn=no version=3.3.2 X-HELO: eu-smtp-delivery-143.mimecast.com Received: from eu-smtp-delivery-143.mimecast.com (HELO eu-smtp-delivery-143.mimecast.com) (146.101.78.143) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 24 Jul 2015 09:09:09 +0000 Received: from cam-owa2.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) by eu-smtp-1.mimecast.com with ESMTP id uk-mta-11-mPvq96ddRM2WSNeSXSTKRw-1; Fri, 24 Jul 2015 10:09:04 +0100 Received: from e104437-lin ([10.1.2.79]) by cam-owa2.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Fri, 24 Jul 2015 10:09:03 +0100 References: <20150722112203.GA17314@arm.com> From: Jiong Wang To: James Greenhalgh Cc: "gcc-patches\@gcc.gnu.org" Subject: [Revert][AArch64] PR 63521 Define REG_ALLOC_ORDER/HONOR_REG_ALLOC_ORDER Date: Fri, 24 Jul 2015 09:11:00 -0000 In-reply-to: <20150722112203.GA17314@arm.com> Message-ID: MIME-Version: 1.0 X-MC-Unique: mPvq96ddRM2WSNeSXSTKRw-1 Content-Type: multipart/mixed; boundary="=-=-=" X-SW-Source: 2015-07/txt/msg02023.txt.bz2 --=-=-= Content-Type: text/plain; charset=WINDOWS-1252 Content-Transfer-Encoding: quoted-printable Content-length: 984 James Greenhalgh writes: > On Wed, May 20, 2015 at 01:35:41PM +0100, Jiong Wang wrote: >> Current IRA still use both target macros in a few places. >>=20 >> Tell IRA to use the order we defined rather than with it's own cost >> calculation. Allocate caller saved first, then callee saved. >>=20 >> This is especially useful for LR/x30, as it's free to allocate and is >> pure caller saved when used in leaf function. >>=20 >> Haven't noticed significant impact on benchmarks, but by grepping some >> keywords like "Spilling", "Push.*spill" etc in ira rtl dump, the number >> is smaller. >>=20 >> OK for trunk? > > OK, sorry for the delay. > > It might be mail client mangling, but please check that the trailing slas= hes > line up in the version that gets committed. > > Thanks, > James > >> 2015-05-19 Jiong. Wang >>=20 >> gcc/ >> PR 63521 >> * config/aarch64/aarch64.h (REG_ALLOC_ORDER): Define. >> (HONOR_REG_ALLOC_ORDER): Define. Patch reverted. --=-=-= Content-Type: text/x-diff; charset=WINDOWS-1252 Content-Transfer-Encoding: quoted-printable Content-Disposition: inline; filename=revert.patch Content-length: 2086 Index: gcc/ChangeLog =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- gcc/ChangeLog (revision 226140) +++ gcc/ChangeLog (working copy) @@ -1,3 +1,11 @@ +2015-07-24 Jiong Wang + + Revert: + 2015-07-22 Jiong Wang + PR target/63521 + * config/aarch64/aarch64.h (REG_ALLOC_ORDER): Define. + (HONOR_REG_ALLOC_ORDER): Define. + 2015-07-24 Richard Biener =20 * genmatch.c (add_operator): Allow SSA_NAME as predicate. Index: gcc/config/aarch64/aarch64.h =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- gcc/config/aarch64/aarch64.h (revision 226140) +++ gcc/config/aarch64/aarch64.h (working copy) @@ -344,31 +344,6 @@ V_ALIASES(28), V_ALIASES(29), V_ALIASES(30), V_ALIASES(31) \ } =20 -#define REG_ALLOC_ORDER \ - { \ - /* Reverse order for argument registers. */ \ - 7, 6, 5, 4, 3, 2, 1, 0, \ - /* Other caller-saved registers. */ \ - 8, 9, 10, 11, 12, 13, 14, 15, \ - 16, 17, 18, 30, \ - /* Callee-saved registers. */ \ - 19, 20, 21, 22, 23, 24, 25, 26, \ - 27, 28, \ - /* All other registers. */ \ - 29, 31, \ - /* Reverse order for argument vregisters. */ \ - 39, 38, 37, 36, 35, 34, 33, 32, \ - /* Other caller-saved vregisters. */ \ - 48, 49, 50, 51, 52, 53, 54, 55, \ - 56, 57, 58, 59, 60, 61, 62, 63, \ - /* Callee-saved vregisters. */ \ - 40, 41, 42, 43, 44, 45, 46, 47, \ - /* Other pseudo registers. */ \ - 64, 65, 66 \ -} - -#define HONOR_REG_ALLOC_ORDER 1 - /* Say that the epilogue uses the return address register. Note that in the case of sibcalls, the values "used by the epilogue" are considered live at the start of the called function. */ --=-=-=--