From: Richard Biener <rguenther@suse.de>
To: Tamar Christina <tamar.christina@arm.com>
Cc: gcc-patches@gcc.gnu.org, nd@arm.com
Subject: Re: [PATCH] Vect: Remove restrictions on dotprod signedness
Date: Fri, 7 May 2021 13:46:14 +0200 (CEST) [thread overview]
Message-ID: <nycvar.YFH.7.76.2105071345590.9200@zhemvz.fhfr.qr> (raw)
In-Reply-To: <patch-14398-tamar@arm.com>
On Wed, 5 May 2021, Tamar Christina wrote:
> Hi All,
>
> There's no reason that the sign of the operands of dot-product have to all be
> the same. The only restriction really is that the sign of the multiplicands
> are the same, however the sign between the multiplier and the accumulator need
> not be the same.
>
> The type of the overall operations should be determined by the sign of the
> multiplicand which is already being done by optabs-tree.c.
>
> Bootstrapped Regtested on aarch64-none-linux-gnu and no issues.
>
> Ok for master?
OK if the rest of the series is.
Richard.
> Thanks,
> Tamar
>
> gcc/ChangeLog:
>
> * tree-vect-patterns.c (vect_recog_dot_prod_pattern): Remove sign check.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.dg/vect/vect-reduc-dot-2.c: Expect to pass.
> * gcc.dg/vect/vect-reduc-dot-3.c: Likewise.
> * gcc.dg/vect/vect-reduc-dot-6.c: Likewise.
> * gcc.dg/vect/vect-reduc-dot-7.c: Likewise.
>
> --- inline copy of patch --
> diff --git a/gcc/testsuite/gcc.dg/vect/vect-reduc-dot-2.c b/gcc/testsuite/gcc.dg/vect/vect-reduc-dot-2.c
> index 25757d2b6713b53a325979b96f89396dbf4675b8..2ebe98887a6072b9e674846af1df38cdc94258dd 100644
> --- a/gcc/testsuite/gcc.dg/vect/vect-reduc-dot-2.c
> +++ b/gcc/testsuite/gcc.dg/vect/vect-reduc-dot-2.c
> @@ -6,5 +6,5 @@
>
> #include "vect-reduc-dot-1.c"
>
> -/* { dg-final { scan-tree-dump-not "vect_recog_dot_prod_pattern: detected" "vect" } } */
> +/* { dg-final { scan-tree-dump "vect_recog_dot_prod_pattern: detected" "vect" } } */
>
> diff --git a/gcc/testsuite/gcc.dg/vect/vect-reduc-dot-3.c b/gcc/testsuite/gcc.dg/vect/vect-reduc-dot-3.c
> index b1deb64e186da99ef42cb687d107445c0b800bd8..6a6679d522350ab4c19836f5537119122f0e654e 100644
> --- a/gcc/testsuite/gcc.dg/vect/vect-reduc-dot-3.c
> +++ b/gcc/testsuite/gcc.dg/vect/vect-reduc-dot-3.c
> @@ -6,5 +6,5 @@
>
> #include "vect-reduc-dot-1.c"
>
> -/* { dg-final { scan-tree-dump-not "vect_recog_dot_prod_pattern: detected" "vect" } } */
> +/* { dg-final { scan-tree-dump "vect_recog_dot_prod_pattern: detected" "vect" } } */
>
> diff --git a/gcc/testsuite/gcc.dg/vect/vect-reduc-dot-6.c b/gcc/testsuite/gcc.dg/vect/vect-reduc-dot-6.c
> index b690c9f2eb18b34f4b147d779bb3da582e285399..0cd4b823643bd4fadd529b2fe4e1d664aa1159ad 100644
> --- a/gcc/testsuite/gcc.dg/vect/vect-reduc-dot-6.c
> +++ b/gcc/testsuite/gcc.dg/vect/vect-reduc-dot-6.c
> @@ -6,5 +6,5 @@
>
> #include "vect-reduc-dot-1.c"
>
> -/* { dg-final { scan-tree-dump-not "vect_recog_dot_prod_pattern: detected" "vect" } } */
> +/* { dg-final { scan-tree-dump "vect_recog_dot_prod_pattern: detected" "vect" } } */
>
> diff --git a/gcc/testsuite/gcc.dg/vect/vect-reduc-dot-7.c b/gcc/testsuite/gcc.dg/vect/vect-reduc-dot-7.c
> index 29e442e8bbf7176cf861518dc171a83d82967764..eefee2e2ca27d749cd3af2238723aeae4e60a429 100644
> --- a/gcc/testsuite/gcc.dg/vect/vect-reduc-dot-7.c
> +++ b/gcc/testsuite/gcc.dg/vect/vect-reduc-dot-7.c
> @@ -6,5 +6,5 @@
>
> #include "vect-reduc-dot-1.c"
>
> -/* { dg-final { scan-tree-dump-not "vect_recog_dot_prod_pattern: detected" "vect" } } */
> +/* { dg-final { scan-tree-dump "vect_recog_dot_prod_pattern: detected" "vect" } } */
>
> diff --git a/gcc/tree-vect-patterns.c b/gcc/tree-vect-patterns.c
> index 803de3fc287371fa202610a55b17e2c8934672f3..441d6cd28c4eaded7abd756164890dbcffd2f3b8 100644
> --- a/gcc/tree-vect-patterns.c
> +++ b/gcc/tree-vect-patterns.c
> @@ -946,7 +946,8 @@ vect_recog_dot_prod_pattern (vec_info *vinfo,
> In which
> - DX is double the size of X
> - DY is double the size of Y
> - - DX, DY, DPROD all have the same type
> + - DX, DY, DPROD all have the same type but the sign
> + between DX, DY and DPROD can differ.
> - sum is the same size of DPROD or bigger
> - sum has been recognized as a reduction variable.
>
> @@ -988,12 +989,6 @@ vect_recog_dot_prod_pattern (vec_info *vinfo,
> false, 2, unprom0, &half_type))
> return NULL;
>
> - /* If there are two widening operations, make sure they agree on
> - the sign of the extension. */
> - if (TYPE_PRECISION (unprom_mult.type) != TYPE_PRECISION (type)
> - && TYPE_SIGN (unprom_mult.type) != TYPE_SIGN (half_type))
> - return NULL;
> -
> vect_pattern_detected ("vect_recog_dot_prod_pattern", last_stmt);
>
> tree half_vectype;
>
>
>
--
Richard Biener <rguenther@suse.de>
SUSE Software Solutions Germany GmbH, Maxfeldstrasse 5, 90409 Nuernberg,
Germany; GF: Felix Imendörffer; HRB 36809 (AG Nuernberg)
prev parent reply other threads:[~2021-05-07 11:46 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-05 17:37 Tamar Christina
2021-05-07 11:46 ` Richard Biener [this message]
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