[r14-4629 Regression] FAIL: gcc.dg/vect/vect-simd-clone-18f.c scan-tree-dump-times vect "[\\n\\r] [^\\n]* = foo\\.simdclone" 2 on Linux/x86_64

[r14-4629 Regression] FAIL: gcc.dg/vect/vect-simd-clone-18f.c scan-tree-dump-times vect "[\\n\\r] [^\\n]* = foo\\.simdclone" 2 on Linux/x86_64

[Jiang, Haochen]

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On Linux/x86_64,

3179ad72f67f31824c444ef30ef171ad7495d274 is the first bad commit
commit 3179ad72f67f31824c444ef30ef171ad7495d274
Author: Richard Biener rguenther@suse.de<mailto:rguenther@suse.de>
Date:   Fri Oct 13 12:32:51 2023 +0200

    OMP SIMD inbranch call vectorization for AVX512 style masks

caused

FAIL: gcc.dg/vect/vect-simd-clone-16b.c scan-tree-dump-times vect "[\\n\\r] [^\\n]* = foo\\.simdclone" 3
FAIL: gcc.dg/vect/vect-simd-clone-16.c scan-tree-dump-times vect "[\\n\\r] [^\\n]* = foo\\.simdclone" 2
FAIL: gcc.dg/vect/vect-simd-clone-16e.c scan-tree-dump-times vect "[\\n\\r] [^\\n]* = foo\\.simdclone" 3
FAIL: gcc.dg/vect/vect-simd-clone-16f.c scan-tree-dump-times vect "[\\n\\r] [^\\n]* = foo\\.simdclone" 2
FAIL: gcc.dg/vect/vect-simd-clone-17b.c scan-tree-dump-times vect "[\\n\\r] [^\\n]* = foo\\.simdclone" 3
FAIL: gcc.dg/vect/vect-simd-clone-17.c scan-tree-dump-times vect "[\\n\\r] [^\\n]* = foo\\.simdclone" 2
FAIL: gcc.dg/vect/vect-simd-clone-17e.c scan-tree-dump-times vect "[\\n\\r] [^\\n]* = foo\\.simdclone" 3
FAIL: gcc.dg/vect/vect-simd-clone-17f.c scan-tree-dump-times vect "[\\n\\r] [^\\n]* = foo\\.simdclone" 2
FAIL: gcc.dg/vect/vect-simd-clone-18b.c scan-tree-dump-times vect "[\\n\\r] [^\\n]* = foo\\.simdclone" 3
FAIL: gcc.dg/vect/vect-simd-clone-18.c scan-tree-dump-times vect "[\\n\\r] [^\\n]* = foo\\.simdclone" 2
FAIL: gcc.dg/vect/vect-simd-clone-18e.c scan-tree-dump-times vect "[\\n\\r] [^\\n]* = foo\\.simdclone" 3
FAIL: gcc.dg/vect/vect-simd-clone-18f.c scan-tree-dump-times vect "[\\n\\r] [^\\n]* = foo\\.simdclone" 2

with GCC configured with

../../gcc/configure --prefix=/export/users/haochenj/src/gcc-bisect/master/master/r14-4629/usr --enable-clocale=gnu --with-system-zlib --with-demangler-in-ld --with-fpmath=sse --enable-languages=c,c++,fortran --enable-cet --without-isl --enable-libmpx x86_64-linux --disable-bootstrap

To reproduce:

$ cd {build_dir}/gcc && make check RUNTESTFLAGS="vect.exp=gcc.dg/vect/vect-simd-clone-16b.c --target_board='unix{-m32\ -march=cascadelake}'"
$ cd {build_dir}/gcc && make check RUNTESTFLAGS="vect.exp=gcc.dg/vect/vect-simd-clone-16b.c --target_board='unix{-m64\ -march=cascadelake}'"
$ cd {build_dir}/gcc && make check RUNTESTFLAGS="vect.exp=gcc.dg/vect/vect-simd-clone-16.c --target_board='unix{-m32\ -march=cascadelake}'"
$ cd {build_dir}/gcc && make check RUNTESTFLAGS="vect.exp=gcc.dg/vect/vect-simd-clone-16.c --target_board='unix{-m64\ -march=cascadelake}'"
$ cd {build_dir}/gcc && make check RUNTESTFLAGS="vect.exp=gcc.dg/vect/vect-simd-clone-16e.c --target_board='unix{-m64\ -march=cascadelake}'"
$ cd {build_dir}/gcc && make check RUNTESTFLAGS="vect.exp=gcc.dg/vect/vect-simd-clone-16f.c --target_board='unix{-m64\ -march=cascadelake}'"
$ cd {build_dir}/gcc && make check RUNTESTFLAGS="vect.exp=gcc.dg/vect/vect-simd-clone-17b.c --target_board='unix{-m32\ -march=cascadelake}'"
$ cd {build_dir}/gcc && make check RUNTESTFLAGS="vect.exp=gcc.dg/vect/vect-simd-clone-17b.c --target_board='unix{-m64\ -march=cascadelake}'"
$ cd {build_dir}/gcc && make check RUNTESTFLAGS="vect.exp=gcc.dg/vect/vect-simd-clone-17.c --target_board='unix{-m32\ -march=cascadelake}'"
$ cd {build_dir}/gcc && make check RUNTESTFLAGS="vect.exp=gcc.dg/vect/vect-simd-clone-17.c --target_board='unix{-m64\ -march=cascadelake}'"
$ cd {build_dir}/gcc && make check RUNTESTFLAGS="vect.exp=gcc.dg/vect/vect-simd-clone-17e.c --target_board='unix{-m64\ -march=cascadelake}'"
$ cd {build_dir}/gcc && make check RUNTESTFLAGS="vect.exp=gcc.dg/vect/vect-simd-clone-17f.c --target_board='unix{-m64\ -march=cascadelake}'"
$ cd {build_dir}/gcc && make check RUNTESTFLAGS="vect.exp=gcc.dg/vect/vect-simd-clone-18b.c --target_board='unix{-m32\ -march=cascadelake}'"
$ cd {build_dir}/gcc && make check RUNTESTFLAGS="vect.exp=gcc.dg/vect/vect-simd-clone-18b.c --target_board='unix{-m64\ -march=cascadelake}'"
$ cd {build_dir}/gcc && make check RUNTESTFLAGS="vect.exp=gcc.dg/vect/vect-simd-clone-18.c --target_board='unix{-m32\ -march=cascadelake}'"
$ cd {build_dir}/gcc && make check RUNTESTFLAGS="vect.exp=gcc.dg/vect/vect-simd-clone-18.c --target_board='unix{-m64\ -march=cascadelake}'"
$ cd {build_dir}/gcc && make check RUNTESTFLAGS="vect.exp=gcc.dg/vect/vect-simd-clone-18e.c --target_board='unix{-m64\ -march=cascadelake}'"
$ cd {build_dir}/gcc && make check RUNTESTFLAGS="vect.exp=gcc.dg/vect/vect-simd-clone-18f.c --target_board='unix{-m64\ -march=cascadelake}'"

(If you met problems with cascadelake related, disabling AVX512F in command line might save that.)
(However, please make sure that there is no potential problems with AVX512.)

Re: [r14-4629 Regression] FAIL: gcc.dg/vect/vect-simd-clone-18f.c scan-tree-dump-times vect "[\\n\\r] [^\\n]* = foo\\.simdclone" 2 on Linux/x86_64

[Richard Biener]

On Wed, 18 Oct 2023, Jiang, Haochen wrote:

> On Linux/x86_64,
> 
> 3179ad72f67f31824c444ef30ef171ad7495d274 is the first bad commit
> commit 3179ad72f67f31824c444ef30ef171ad7495d274
> Author: Richard Biener rguenther@suse.de<mailto:rguenther@suse.de>
> Date:   Fri Oct 13 12:32:51 2023 +0200
> 
>     OMP SIMD inbranch call vectorization for AVX512 style masks
> 
> caused
> 
> FAIL: gcc.dg/vect/vect-simd-clone-16b.c scan-tree-dump-times vect "[\\n\\r] [^\\n]* = foo\\.simdclone" 3
> FAIL: gcc.dg/vect/vect-simd-clone-16.c scan-tree-dump-times vect "[\\n\\r] [^\\n]* = foo\\.simdclone" 2
> FAIL: gcc.dg/vect/vect-simd-clone-16e.c scan-tree-dump-times vect "[\\n\\r] [^\\n]* = foo\\.simdclone" 3
> FAIL: gcc.dg/vect/vect-simd-clone-16f.c scan-tree-dump-times vect "[\\n\\r] [^\\n]* = foo\\.simdclone" 2
> FAIL: gcc.dg/vect/vect-simd-clone-17b.c scan-tree-dump-times vect "[\\n\\r] [^\\n]* = foo\\.simdclone" 3
> FAIL: gcc.dg/vect/vect-simd-clone-17.c scan-tree-dump-times vect "[\\n\\r] [^\\n]* = foo\\.simdclone" 2
> FAIL: gcc.dg/vect/vect-simd-clone-17e.c scan-tree-dump-times vect "[\\n\\r] [^\\n]* = foo\\.simdclone" 3
> FAIL: gcc.dg/vect/vect-simd-clone-17f.c scan-tree-dump-times vect "[\\n\\r] [^\\n]* = foo\\.simdclone" 2
> FAIL: gcc.dg/vect/vect-simd-clone-18b.c scan-tree-dump-times vect "[\\n\\r] [^\\n]* = foo\\.simdclone" 3
> FAIL: gcc.dg/vect/vect-simd-clone-18.c scan-tree-dump-times vect "[\\n\\r] [^\\n]* = foo\\.simdclone" 2
> FAIL: gcc.dg/vect/vect-simd-clone-18e.c scan-tree-dump-times vect "[\\n\\r] [^\\n]* = foo\\.simdclone" 3
> FAIL: gcc.dg/vect/vect-simd-clone-18f.c scan-tree-dump-times vect "[\\n\\r] [^\\n]* = foo\\.simdclone" 2
...

It's interesting that when the target has AVX512 enabled we get
AVX512 style masks used also for SSE and AVX vector sizes but the
OMP SIMD clones for SSE and AVX vector sizes use SSE/AVX style
masks and only the AVX512 size clone uses the AVX512 integer mode
mask.  That necessarily requires an extra setup instruction for
the mask argument.

With my change I removed the ability to pass integer masks as traditional
vector mask arguments, will restore that - it's the other way around
we cannot easily support, the vectorizer using traditional vector masks
but the simd clone expecting integer modes.

Richard..

Re: [r14-4629 Regression] FAIL: gcc.dg/vect/vect-simd-clone-18f.c scan-tree-dump-times vect "[\\n\\r] [^\\n]* = foo\\.simdclone" 2 on Linux/x86_64

[Jakub Jelinek]

On Wed, Oct 18, 2023 at 07:14:36AM +0000, Richard Biener wrote:
> It's interesting that when the target has AVX512 enabled we get
> AVX512 style masks used also for SSE and AVX vector sizes but the
> OMP SIMD clones for SSE and AVX vector sizes use SSE/AVX style
> masks and only the AVX512 size clone uses the AVX512 integer mode
> mask.  That necessarily requires an extra setup instruction for
> the mask argument.

It is an ABI matter, the ABI of the clones shouldn't change just because
of a supposedly non ABI changing option (ISA flags like -mavx512f etc.).
Under the hood, if the callers are -mavx512f the expectation is that the
AVX512 simd clone will be used, but of course that doesn't have to be the
case either because of options requesting only 256 or 128-bit vector width
or loops with small safelen or number of iterations or other reasons.

	Jakub

Re: [r14-4629 Regression] FAIL: gcc.dg/vect/vect-simd-clone-18f.c scan-tree-dump-times vect "[\\n\\r] [^\\n]* = foo\\.simdclone" 2 on Linux/x86_64

[Richard Biener]

On Wed, 18 Oct 2023, Jakub Jelinek wrote:

> On Wed, Oct 18, 2023 at 07:14:36AM +0000, Richard Biener wrote:
> > It's interesting that when the target has AVX512 enabled we get
> > AVX512 style masks used also for SSE and AVX vector sizes but the
> > OMP SIMD clones for SSE and AVX vector sizes use SSE/AVX style
> > masks and only the AVX512 size clone uses the AVX512 integer mode
> > mask.  That necessarily requires an extra setup instruction for
> > the mask argument.
> 
> It is an ABI matter, the ABI of the clones shouldn't change just because
> of a supposedly non ABI changing option (ISA flags like -mavx512f etc.).
> Under the hood, if the callers are -mavx512f the expectation is that the
> AVX512 simd clone will be used, but of course that doesn't have to be the
> case either because of options requesting only 256 or 128-bit vector width
> or loops with small safelen or number of iterations or other reasons.

Yes, understood.  Just saying that with AVX10 we're going to hit that
oddball case by default (and on most Intel sub-archs the default is
256bit irrespective of AVX512 support).  Possibly extending the ABI
to add a "AVX10"(?) case with AVX vector width but AVX512 style
mask (but only up to SImode?) could make sense.

The mask fiddling for vect-simd-clone-16.c is for example

        movl    $1, %edx
..
        vpbroadcastd    %edx, %ymm5
        vmovdqa %ymm5, -144(%rbp)
..
.L6:
..
        vpblendmd       -144(%rbp), %ymm3, %ymm1{%k1}
..
        call    _ZGVdM8v_foo

so inside of the loop it's a single instruction, but
involving memory because of the call ABI.  I can't think
of a more efficient way to do %k ? { 1, .. } : { 0, .. }
besides doing the %k mask producing compare twice,
for the OMP SIMD call argument with AVX style (but that's
going to be difficult for the vectorizer, the mask is
not always going to be directly produced by a compare).

Richard.