--- gcc-local/sel-sched-dev/gcc/target.h	(revision 27672)
+++ gcc-local/sel-sched-dev/gcc/target.h	(revision 27673)
@@ -339,7 +339,7 @@ struct gcc_target
     /* Given the current cost, COST, of an insn, INSN, calculate and
        return a new cost based on its relationship to DEP_INSN through the
        dependence of type DEP_TYPE.  The default is to make no adjustment.  */
-    int (* adjust_cost_2) (rtx insn, int, rtx def_insn, int cost);
+    int (* adjust_cost_2) (rtx insn, int, rtx def_insn, int cost, int dw);
 
     /* The following member value is a pointer to a function called
        by the insn scheduler. This hook is called to notify the backend
--- gcc-local/sel-sched-dev/gcc/haifa-sched.c	(revision 27672)
+++ gcc-local/sel-sched-dev/gcc/haifa-sched.c	(revision 27673)
@@ -495,7 +495,7 @@ haifa_classify_insn (rtx insn)
 /* Forward declarations.  */
 
 HAIFA_INLINE static int insn_cost1 (rtx, enum reg_note, rtx, rtx);
-static int dep_cost_1 (rtx, enum reg_note, rtx, rtx, int);
+static int dep_cost_1 (rtx, enum reg_note, dw_t, rtx, rtx, int);
 static int priority (rtx);
 static int rank_for_schedule (const void *, const void *);
 static void swap_sort (rtx *, int);
@@ -644,12 +644,12 @@ insn_cost1 (rtx insn, enum reg_note dep_
   if (used == 0)
     return cost;
 
-  return dep_cost_1 (insn, dep_type, link, used, cost);
+  return dep_cost_1 (insn, dep_type, 0, link, used, cost);
 }
 
 /* Compute the cost of the INSN given the dependence attributes.  */
 static int
-dep_cost_1 (rtx insn, enum reg_note dep_type, rtx link, rtx used, int cost)
+dep_cost_1 (rtx insn, enum reg_note dep_type, dw_t dw, rtx link, rtx used, int cost)
 {
   /* A USE insn should never require the value used to be computed.
      This allows the computation of a function's result and parameter
@@ -678,7 +678,8 @@ dep_cost_1 (rtx insn, enum reg_note dep_
 	}
 
       if (targetm.sched.adjust_cost_2)
-	cost = targetm.sched.adjust_cost_2 (used, (int) dep_type, insn, cost);
+	cost = targetm.sched.adjust_cost_2 (used, (int) dep_type, insn, cost,
+					    dw);
       else
 	{
           if (!link && targetm.sched.adjust_cost)
@@ -704,9 +705,9 @@ dep_cost_1 (rtx insn, enum reg_note dep_
 
 /* A convenience wrapper.  */
 int
-dep_cost (rtx pro, enum reg_note dt, rtx con)
+dep_cost (rtx pro, enum reg_note dt, dw_t dw, rtx con)
 {
-  return dep_cost_1 (pro, dt, NULL, con, -1);
+  return dep_cost_1 (pro, dt, dw, NULL, con, -1);
 }
 
 /* Compute the priority number for INSN.
--- gcc-local/sel-sched-dev/gcc/sel-sched-ir.c	(revision 27672)
+++ gcc-local/sel-sched-dev/gcc/sel-sched-ir.c	(revision 27673)
@@ -1826,7 +1826,7 @@ tick_check_dep_with_dw (insn_t pro, ds_t
 {
   insn_t con;
   enum reg_note dt;
-  int tick, dc;
+  int tick;
 
   con = tick_check_insn;
 
@@ -1846,35 +1846,16 @@ tick_check_dep_with_dw (insn_t pro, ds_t
 	}
 
       gcc_assert (INSN_SCHED_CYCLE (pro) > 0);
-      
+
       dt = ds_to_dt (ds);
       if (dt == REG_DEP_TRUE)
         tick_check_seen_true_dep = 1;
 
-      /* Adjust cost depending on dependency kind.  */
-      switch (dw)
-	{
-	case 0:
-	  /* Not a true memory dependence, use default cost.  */
-	  dc = dep_cost (pro, dt, con);
-	  break;
-	case MIN_DEP_WEAK:
-	  /* Store and load are likely to alias, use higher cost to avoid stall.  */
-	  dc = PARAM_VALUE (PARAM_SELSCHED_MEM_TRUE_DEP_COST);
-	  break;
-	default:
-	  /* Store and load are likely to be independent.  */
-	  if (flag_sel_sched_mem_deps_zero_cost)
-	    dc = 0;
-	  else
-	    dc = dep_cost (pro, dt, con);
-	}
-
-      tick = INSN_SCHED_CYCLE (pro) + dc;
+      tick = INSN_SCHED_CYCLE (pro) + dep_cost (pro, dt, dw, con);
 
       /* When there are several kinds of dependencies between pro and con,
          only REG_DEP_TRUE should be taken into account.  */
-      if (tick > tick_check_cycle && (dt == REG_DEP_TRUE 
+      if (tick > tick_check_cycle && (dt == REG_DEP_TRUE
                                       || !tick_check_seen_true_dep))
 	tick_check_cycle = tick;
     }
--- gcc-local/sel-sched-dev/gcc/common.opt	(revision 27672)
+++ gcc-local/sel-sched-dev/gcc/common.opt	(revision 27673)
@@ -850,10 +850,6 @@ fsel-sched-substitution
 Common Report Var(flag_sel_sched_substitution) Init(0)
 Perform substitution in selective scheduling
 
-fsel-sched-mem-deps-zero-cost
-Common Report Var(flag_sel_sched_mem_deps_zero_cost) Init(1)
-Set the cost of may alias true mem deps to zero
-
 fsel-sched-verbose
 Common Report Var(flag_sel_sched_verbose) Init(0)
 Be verbose when running selective scheduling
--- gcc-local/sel-sched-dev/gcc/sched-int.h	(revision 27672)
+++ gcc-local/sel-sched-dev/gcc/sched-int.h	(revision 27673)
@@ -272,7 +272,6 @@ enum INSN_TRAP_CLASS
 extern size_t dfa_state_size;
 
 extern void advance_state (state_t);
-extern int dep_cost (rtx, enum reg_note, rtx);
 
 extern void sched_init (void);
 extern void sched_finish (void);
@@ -735,6 +734,7 @@ enum SPEC_SCHED_FLAGS {
 #endif
 
 /* Functions in haifa-sched.c.  */
+extern int dep_cost (rtx, enum reg_note, dw_t, rtx);
 extern int no_real_insns_p (rtx, rtx);
 
 extern int insn_cost (rtx, rtx, rtx);
--- gcc-local/sel-sched-dev/gcc/config/ia64/ia64.opt	(revision 27672)
+++ gcc-local/sel-sched-dev/gcc/config/ia64/ia64.opt	(revision 27673)
@@ -148,6 +148,10 @@ msched-stop-bits-after-every-cycle
 Target Report Var(mflag_sched_stop_bits_after_every_cycle) Init(1)
 Place a stop bit after every cycle when scheduling
 
+msched-fp-mem-deps-zero-cost
+Target Report Var(mflag_sched_fp_mem_deps_zero_cost) Init(1)
+Assume that floating-point stores and loads are not likely to cause conflict when placed into one instruction group
+
 msel-sched-renaming
 Common Report Var(mflag_sel_sched_renaming) Init(1)
 Do register renaming in selective scheduling
--- gcc-local/sel-sched-dev/gcc/config/ia64/ia64.c	(revision 27672)
+++ gcc-local/sel-sched-dev/gcc/config/ia64/ia64.c	(revision 27673)
@@ -218,7 +218,7 @@ static void ia64_output_function_epilogu
 static void ia64_output_function_end_prologue (FILE *);
 
 static int ia64_issue_rate (void);
-static int ia64_adjust_cost_2 (rtx, int, rtx, int);
+static int ia64_adjust_cost_2 (rtx, int, rtx, int, dw_t);
 static void ia64_sched_init (FILE *, int, int);
 static void ia64_sched_init_global (FILE *, int, int);
 static void ia64_sched_finish_global (FILE *, int);
@@ -6293,20 +6293,37 @@ ia64_single_set (rtx insn)
 
 /* Adjust the cost of a scheduling dependency.
    Return the new cost of a dependency of type DEP_TYPE or INSN on DEP_INSN.
-   COST is the current cost.  */
+   COST is the current cost, DW is dependency weakness.  */
 
 static int
-ia64_adjust_cost_2 (rtx insn, int dep_type1, rtx dep_insn, int cost)
+ia64_adjust_cost_2 (rtx insn, int dep_type1, rtx dep_insn, int cost, dw_t dw)
 {
   enum reg_note dep_type = (enum reg_note) dep_type1;
   enum attr_itanium_class dep_class;
   enum attr_itanium_class insn_class;
 
+  insn_class = ia64_safe_itanium_class (insn);
+  dep_class = ia64_safe_itanium_class (dep_insn);
+
+  /* Treat true memory dependencies separately.  */
+  if (dw == MIN_DEP_WEAK)
+    /* Store and load are likely to alias, use higher cost to avoid stall.  */
+    return PARAM_VALUE (PARAM_SCHED_MEM_TRUE_DEP_COST);
+  else if (dw > MIN_DEP_WEAK)
+    {
+      /* Store and load are less likely to alias.  */
+      if (mflag_sched_fp_mem_deps_zero_cost && dep_class == ITANIUM_CLASS_STF)
+	/* Assume there will be no cache conflict for floating-point data.
+	   For integer data, L1 conflict penalty is huge (17 cycles), so we
+	   never assume it will not cause a conflict.  */
+	return 0;
+      else
+	return cost;
+    }
+
   if (dep_type != REG_DEP_OUTPUT)
     return cost;
 
-  insn_class = ia64_safe_itanium_class (insn);
-  dep_class = ia64_safe_itanium_class (dep_insn);
   if (dep_class == ITANIUM_CLASS_ST || dep_class == ITANIUM_CLASS_STF
       || insn_class == ITANIUM_CLASS_ST || insn_class == ITANIUM_CLASS_STF)
     return 0;
@@ -9999,7 +10016,7 @@ ia64_optimization_options (int level ATT
   set_param_value ("simultaneous-prefetches", 6);
   set_param_value ("l1-cache-line-size", 32);
 
-  set_param_value("selsched-mem-true-dep-cost", 4);
+  set_param_value("sched-mem-true-dep-cost", 4);
 }
 
 /* HP-UX version_id attribute.
--- gcc-local/sel-sched-dev/gcc/params.def	(revision 27672)
+++ gcc-local/sel-sched-dev/gcc/params.def	(revision 27673)
@@ -555,9 +555,9 @@ DEFPARAM(PARAM_SELSCHED_MAX_LOOKAHEAD,
 /* Minimal distance (in CPU cycles) between store and load targeting same
    memory locations.  */
 
-DEFPARAM (PARAM_SELSCHED_MEM_TRUE_DEP_COST,
-	  "selsched-mem-true-dep-cost",
-	  "Minimal distance between overlapping store and load",
+DEFPARAM (PARAM_SCHED_MEM_TRUE_DEP_COST,
+	  "sched-mem-true-dep-cost",
+	  "Minimal distance between possibly conflicting store and load",
 	  1, 0, 0)
 
 DEFPARAM(PARAM_ALLOW_START,