From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from rock.gnat.com (rock.gnat.com [205.232.38.15]) by sourceware.org (Postfix) with ESMTPS id 7A6BE3856DFC for ; Thu, 5 May 2022 06:52:35 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 7A6BE3856DFC Received: from localhost (localhost.localdomain [127.0.0.1]) by filtered-rock.gnat.com (Postfix) with ESMTP id 095311166E5; Thu, 5 May 2022 02:52:27 -0400 (EDT) X-Virus-Scanned: Debian amavisd-new at gnat.com Received: from rock.gnat.com ([127.0.0.1]) by localhost (rock.gnat.com [127.0.0.1]) (amavisd-new, port 10024) with LMTP id nRCNbs5FDz2G; Thu, 5 May 2022 02:52:26 -0400 (EDT) Received: from free.home (tron.gnat.com [IPv6:2620:20:4000:0:46a8:42ff:fe0e:e294]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by rock.gnat.com (Postfix) with ESMTPS id 456D41166E4; Thu, 5 May 2022 02:52:25 -0400 (EDT) Received: from livre (livre.home [172.31.160.2]) by free.home (8.15.2/8.15.2) with ESMTPS id 2456q1F02738061 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 5 May 2022 03:52:07 -0300 From: Alexandre Oliva To: gcc-patches@gcc.gnu.org Cc: ebotcazou@libertysurf.fr, vmakarov@redhat.com, segher@kernel.crashing.org, dje.gcc@gmail.com Subject: [PATCH] [PR100106] Reject unaligned subregs when strict alignment is required Organization: Free thinker, does not speak for AdaCore Errors-To: aoliva@lxoliva.fsfla.org Date: Thu, 05 May 2022 03:52:01 -0300 Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/25.2 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-Scanned-By: MIMEDefang 2.84 X-Spam-Status: No, score=-12.3 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 05 May 2022 06:52:46 -0000 The testcase for pr100106, compiled with optimization for 32-bit powerpc -mcpu=604 with -mstrict-align expands the initialization of a union from a float _Complex value into a load from an SCmode constant pool entry, aligned to 4 bytes, into a DImode pseudo, requiring 8-byte alignment. The patch that introduced the testcase modified simplify_subreg to avoid changing the MEM to outermode, but simplify_gen_subreg still creates a SUBREG or a MEM that would require stricter alignment than MEM's, and lra_constraints appears to get confused by that, repeatedly creating unsatisfiable reloads for the SUBREG until it exceeds the insn count. Avoiding the unaligned SUBREG, expand splits the DImode dest into SUBREGs and loads each SImode word of the constant pool with the proper alignment. At the time of posting this patch, it occurred to me that maybe the test should allow paradoxical subregs of mems, or even that non-paradoxical subregs of mems should be allowed to change to a mode with stricter alignment, and the register allocator should deal with that somehow. WDYT? Regstrapped on x86_64-linux-gnu and ppc64le-linux-gnu, also tested targeting ppc- and ppc64-vx7r2. Ok to install? for gcc/ChangeLog PR target/100106 * emit-rtl.c (validate_subreg): Reject a SUBREG of a MEM that requires stricter alignment than MEM's. for gcc/testsuite/ChangeLog PR target/100106 * gcc.target/powerpc/pr100106-sa.c: New. --- gcc/emit-rtl.cc | 3 +++ gcc/testsuite/gcc.target/powerpc/pr100106-sa.c | 4 ++++ 2 files changed, 7 insertions(+) create mode 100644 gcc/testsuite/gcc.target/powerpc/pr100106-sa.c diff --git a/gcc/emit-rtl.cc b/gcc/emit-rtl.cc index 1e02ae254d012..642e47eada0d7 100644 --- a/gcc/emit-rtl.cc +++ b/gcc/emit-rtl.cc @@ -982,6 +982,9 @@ validate_subreg (machine_mode omode, machine_mode imode, return subreg_offset_representable_p (regno, imode, offset, omode); } + else if (reg && MEM_P (reg) + && STRICT_ALIGNMENT && MEM_ALIGN (reg) < GET_MODE_ALIGNMENT (omode)) + return false; /* The outer size must be ordered wrt the register size, otherwise we wouldn't know at compile time how many registers the outer diff --git a/gcc/testsuite/gcc.target/powerpc/pr100106-sa.c b/gcc/testsuite/gcc.target/powerpc/pr100106-sa.c new file mode 100644 index 0000000000000..6cc29595c8b25 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr100106-sa.c @@ -0,0 +1,4 @@ +/* { dg-do compile { target { ilp32 } } } */ +/* { dg-options "-mcpu=604 -O -mstrict-align" } */ + +#include "../../gcc.c-torture/compile/pr100106.c" -- Alexandre Oliva, happy hacker https://FSFLA.org/blogs/lxo/ Free Software Activist GNU Toolchain Engineer Disinformation flourishes because many people care deeply about injustice but very few check the facts. Ask me about