From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from rock.gnat.com (rock.gnat.com [205.232.38.15]) by sourceware.org (Postfix) with ESMTPS id 280133857BB5 for ; Wed, 27 Jul 2022 05:15:32 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 280133857BB5 Received: from localhost (localhost.localdomain [127.0.0.1]) by filtered-rock.gnat.com (Postfix) with ESMTP id B710111677B; Wed, 27 Jul 2022 01:15:31 -0400 (EDT) X-Virus-Scanned: Debian amavisd-new at gnat.com Received: from rock.gnat.com ([127.0.0.1]) by localhost (rock.gnat.com [127.0.0.1]) (amavisd-new, port 10024) with LMTP id Whr+1zQi8KXH; Wed, 27 Jul 2022 01:15:31 -0400 (EDT) Received: from free.home (tron.gnat.com [IPv6:2620:20:4000:0:46a8:42ff:fe0e:e294]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by rock.gnat.com (Postfix) with ESMTPS id DEA8C116771; Wed, 27 Jul 2022 01:15:28 -0400 (EDT) Received: from livre (livre.home [172.31.160.2]) by free.home (8.15.2/8.15.2) with ESMTPS id 26R5F7LT1760137 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 27 Jul 2022 02:15:08 -0300 From: Alexandre Oliva To: Mike Stump Cc: gcc-patches@gcc.gnu.org, Jan Hubicka , Uros Bizjak , Rainer Orth , Kirill Yukhin , Hongtao Liu Subject: Re: [PATCH] i386 testsuite: cope with --enable-default-pie Organization: Free thinker, does not speak for AdaCore References: Errors-To: aoliva@lxoliva.fsfla.org Date: Wed, 27 Jul 2022 02:15:07 -0300 In-Reply-To: (Mike Stump's message of "Mon, 11 Jul 2022 19:02:24 -0700") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/25.2 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-Scanned-By: MIMEDefang 2.84 X-Spam-Status: No, score=-12.3 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 27 Jul 2022 05:15:37 -0000 On Jul 11, 2022, Mike Stump wrote: > On Jul 11, 2022, at 6:47 PM, Alexandre Oliva wrote: >> >> Running the testsuite on a toolchain build with --enable-default-pie >> had some unexpected fails. >> Regstrapped on x86_64-linux-gnu, and also tested on i686-linux-gnu, with >> and without --enable-default-pie on both platforms. Ok to install? > Ok. Here's some more: i386 PIE: testsuite: cope with default pie on ia32 This patch continues the effort of cleaning up the testsuite for --enable-default-pie; the focus herein is mostly 32-bit x86. As much as I tried to avoid it, most of the changes to the testsuite simply disable PIC/PIE, for reasons I'm going to detail below. static-cdtor1.C gets new patterns to match PIE output. Some avx512fp16 tests change only in register allocation, because of the register used to hold the GOT base address. Interrupt tests changed in this regard as well, but here it also affected register saving and restoring. The previous patch modified cet-sjlj tests, mentioning a single regexp covering PIC and nonPIC got incorrect match counts. I found out that adding ?: to parenthesized subpatterns avoids miscounting matches. Other tests that count certain kinds of insns needed adjustment over insns in get_pc_thunk, extra loads from the GOT, or extra adds to compute addresses. In one case, namely stack-check-12, it is nonPIC that had extra insns, that PIC gets rid of, or rather, pushing and popping the PIC register obviates the dummy push and matching pop used for stack probing in nonpic. pr95126 tests were supposed to optimize loads into known constants, but the @GOTOFF addresses prevent that for reasons I have not investigated, but that would be clearly desirable, so I've XFAILed these. pr95852 is another case of missed optimization: sibcalls are not possible when the PIC register needs to be set up for the call, which prevents the expected constant propagation to the return block; I have adjusted the codegen expectations of these tests. As for tests that disable PIE... Some are judgment calls, that fail for similar reasons as tests described above, but I chose not to adjust their expectations; others are just not possible with PIC, or not worth the effort of adjusting. anon[14].C check for no global or comdat symbols, respectively, but -fPIE outputs get_pc_thunk, as global hidden comdat. initlist-const1.C wants .rodata and checks for no .data, but PIC outputs constant data that needs relocations in .data.rel.ro.local. no-stack-protector-attr-3.C and stackprotectexplicit2.C count stack_check_fail matches; -fPIE calls stack_check_fail_local instead, which matches the pattern, but this symbol is also marked as .hidden, so the match count needs to be adjusted. pr71694.C checks for no movl, but get_pc_thunk contains one. pr102892-1.c is a missed optimization, ivopts creates an induction variable because the array address can't be part of an indexing base address with PIE, and that ends up stopping a load from being resolved to a constant as expected. sibcall-11.c needs @PLT for the call, which requires the PIC register, which makes sibcalling impossible. builtin-self.c, in turn, expects no calls, but PIC calls get_pc_thunk. avx* vector tests that had PIE disabled were affected in that the need for GOT-based addressing modes changed instruction selection in ways that deviated from the expectations of the tests. Ditto other vector tests: pr100865*, pr101796-1, pr101846, pr101989-broadcast-1, and pr102021, pr54855-[37], and pr90773-17. pr15184* tests need a PIC register to access global variables, which affects register allocation, so the patterns would have to be adjusted. pr27971 can't use the expected addressing mode to dereference the array with PIC, so it ends up selecting an indexed addressing mode, obviating the expected separate shift insn. pr70263-2 is another case that implicitly expects a sibcall, impossible because of the need for the PIC register; without a sibcall, the expected REG_EQUIV for the reuse of the stack slot of an incoming argument does not occur. pr78035 duplicates the final compare in both then and else blocks with PIE, which deviates from the expected cmp count. pr81736-[57] test for no frame pointer, but the PIC register assignment to a call-saved register forces a frame; the former ends up not using the PIC register, but it's only optimized out after committing to a stack frame to preserve it. pr85620-6 also expects a tail call in a situation that is impossible on ia32 PIC. pr85667-6 doesn't expect the movl in get_pc_thunk. pr93492-5 tests -mfentry, not available with PIC on ia32. pr96539 expects a tail-call, to avoid copying a large-ish struct argument, but the call requires the PIC register, so no tail-call. stack-prot-sym.c expects a nonpic addressing mode. Regstrapped on x86_64-linux-gnu; also tested, along with other patches I'm posting today with "i386 PIE" in the subject, and compared default-PIE and default-nonPIE results on it, and on i686-linux-gnu. Ok to install? for gcc/testsuite/ChangeLog * g++.dg/abi/anon1.C: Disable pie on ia32. * g++.dg/abi/anon4.C: Likewise. * g++.dg/cpp0x/initlist-const1.C: Likewise. * g++.dg/no-stack-protector-attr-3.C: Likewise. * g++.dg/stackprotectexplicit2.C: Likewise. * g++.dg/pr71694.C: Likewise. * gcc.dg/pr102892-1.c: Likewise. * gcc.dg/sibcall-11.c: Likewise. * gcc.dg/torture/builtin-self.c: Likewise. * gcc.target/i386/avx2-dest-false-dep-for-glc.c: Likewise. * gcc.target/i386/avx512bf16-cvtsbh2ss-1.c: Likewise. * gcc.target/i386/avx512f-broadcast-pr87767-1.c: Likewise. * gcc.target/i386/avx512f-broadcast-pr87767-3.c: Likewise. * gcc.target/i386/avx512f-broadcast-pr87767-5.c: Likewise. * gcc.target/i386/avx512f-broadcast-pr87767-7.c: Likewise. * gcc.target/i386/avx512fp16-broadcast-1.c: Likewise. * gcc.target/i386/avx512fp16-pr101846.c: Likewise. * gcc.target/i386/avx512vl-broadcast-pr87767-1.c: Likewise. * gcc.target/i386/avx512vl-broadcast-pr87767-3.c: Likewise. * gcc.target/i386/avx512vl-broadcast-pr87767-5.c: Likewise. * gcc.target/i386/pr100865-2.c: Likewise. * gcc.target/i386/pr100865-3.c: Likewise. * gcc.target/i386/pr100865-4a.c: Likewise. * gcc.target/i386/pr100865-4b.c: Likewise. * gcc.target/i386/pr100865-5a.c: Likewise. * gcc.target/i386/pr100865-5b.c: Likewise. * gcc.target/i386/pr100865-6a.c: Likewise. * gcc.target/i386/pr100865-6b.c: Likewise. * gcc.target/i386/pr100865-6c.c: Likewise. * gcc.target/i386/pr100865-7b.c: Likewise. * gcc.target/i386/pr101796-1.c: Likewise. * gcc.target/i386/pr101846-2.c: Likewise. * gcc.target/i386/pr101989-broadcast-1.c: Likewise. * gcc.target/i386/pr102021.c: Likewise. * gcc.target/i386/pr90773-17.c: Likewise. * gcc.target/i386/pr54855-3.c: Likewise. * gcc.target/i386/pr54855-7.c: Likewise. * gcc.target/i386/pr15184-1.c: Likewise. * gcc.target/i386/pr15184-2.c: Likewise. * gcc.target/i386/pr27971.c: Likewise. * gcc.target/i386/pr70263-2.c: Likewise. * gcc.target/i386/pr78035.c: Likewise. * gcc.target/i386/pr81736-5.c: Likewise. * gcc.target/i386/pr81736-7.c: Likewise. * gcc.target/i386/pr85620-6.c: Likewise. * gcc.target/i386/pr85667-6.c: Likewise. * gcc.target/i386/pr93492-5.c: Likewise. * gcc.target/i386/pr96539.c: Likewise. PR target/81708 (%gs:my_guard) * gcc.target/i386/stack-prot-sym.c: Likewise. * g++.dg/init/static-cdtor1.C: Add alternate patterns for PIC. * gcc.target/i386/avx512fp16-vcvtsh2si-1a.c: Extend patterns for PIC/PIE register allocation. * gcc.target/i386/pr100704-3.c: Likewise. * gcc.target/i386/avx512fp16-vcvtsh2usi-1a.c: Likewise. * gcc.target/i386/avx512fp16-vcvttsh2si-1a.c: Likewise. * gcc.target/i386/avx512fp16-vcvttsh2usi-1a.c: Likewise. * gcc.target/i386/avx512fp16-vmovsh-1a.c: Likewise. * gcc.target/i386/interrupt-11.c: Likewise, allowing for preservation of the PIC register. * gcc.target/i386/interrupt-12.c: Likewise. * gcc.target/i386/interrupt-13.c: Likewise. * gcc.target/i386/interrupt-15.c: Likewise. * gcc.target/i386/interrupt-16.c: Likewise. * gcc.target/i386/interrupt-17.c: Likewise. * gcc.target/i386/interrupt-8.c: Likewise. * gcc.target/i386/cet-sjlj-6a.c: Combine patterns from previous change. * gcc.target/i386/cet-sjlj-6b.c: Likewise. * gcc.target/i386/pad-10.c: Accept insns in get_pc_thunk. * gcc.target/i386/pr70321.c: Likewise. * gcc.target/i386/pr81563.c: Likewise. * gcc.target/i386/pr84278.c: Likewise. * gcc.target/i386/pr90773-2.c: Likewise, plus extra loads from the GOT. * gcc.target/i386/pr90773-3.c: Likewise. * gcc.target/i386/pr94913-2.c: Accept additional PIC insns. * gcc.target/i386/stack-check-17.c: Likewise. * gcc.target/i386/stack-check-12.c: Do not require dummy stack probing obviated with PIC. * gcc.target/i386/pr95126-m32-1.c: Expect missed optimization with PIC. * gcc.target/i386/pr95126-m32-2.c: Likewise. * gcc.target/i386/pr95852-2.c: Accept different optimization with PIC. * gcc.target/i386/pr95852-4.c: Likewise. --- gcc/testsuite/g++.dg/abi/anon1.C | 1 + gcc/testsuite/g++.dg/abi/anon4.C | 2 +- gcc/testsuite/g++.dg/cpp0x/initlist-const1.C | 2 ++ gcc/testsuite/g++.dg/init/static-cdtor1.C | 6 ++++-- gcc/testsuite/g++.dg/no-stack-protector-attr-3.C | 1 + gcc/testsuite/g++.dg/pr71694.C | 1 + gcc/testsuite/g++.dg/stackprotectexplicit2.C | 1 + gcc/testsuite/gcc.dg/pr102892-1.c | 1 + gcc/testsuite/gcc.dg/sibcall-11.c | 1 + gcc/testsuite/gcc.dg/torture/builtin-self.c | 1 + .../gcc.target/i386/avx2-dest-false-dep-for-glc.c | 1 + .../gcc.target/i386/avx512bf16-cvtsbh2ss-1.c | 1 + .../gcc.target/i386/avx512f-broadcast-pr87767-1.c | 1 + .../gcc.target/i386/avx512f-broadcast-pr87767-3.c | 1 + .../gcc.target/i386/avx512f-broadcast-pr87767-5.c | 1 + .../gcc.target/i386/avx512f-broadcast-pr87767-7.c | 1 + .../gcc.target/i386/avx512fp16-broadcast-1.c | 1 + .../gcc.target/i386/avx512fp16-pr101846.c | 1 + .../gcc.target/i386/avx512fp16-vcvtsh2si-1a.c | 4 ++-- .../gcc.target/i386/avx512fp16-vcvtsh2usi-1a.c | 4 ++-- .../gcc.target/i386/avx512fp16-vcvttsh2si-1a.c | 4 ++-- .../gcc.target/i386/avx512fp16-vcvttsh2usi-1a.c | 4 ++-- .../gcc.target/i386/avx512fp16-vmovsh-1a.c | 6 +++--- .../gcc.target/i386/avx512vl-broadcast-pr87767-1.c | 1 + .../gcc.target/i386/avx512vl-broadcast-pr87767-3.c | 1 + .../gcc.target/i386/avx512vl-broadcast-pr87767-5.c | 1 + gcc/testsuite/gcc.target/i386/cet-sjlj-6a.c | 6 ++---- gcc/testsuite/gcc.target/i386/cet-sjlj-6b.c | 6 ++---- gcc/testsuite/gcc.target/i386/interrupt-11.c | 2 +- gcc/testsuite/gcc.target/i386/interrupt-12.c | 6 ++++-- gcc/testsuite/gcc.target/i386/interrupt-13.c | 6 ++++-- gcc/testsuite/gcc.target/i386/interrupt-15.c | 5 +++-- gcc/testsuite/gcc.target/i386/interrupt-16.c | 3 ++- gcc/testsuite/gcc.target/i386/interrupt-17.c | 3 ++- gcc/testsuite/gcc.target/i386/interrupt-8.c | 2 +- gcc/testsuite/gcc.target/i386/pad-10.c | 2 +- gcc/testsuite/gcc.target/i386/pr100704-3.c | 4 +++- gcc/testsuite/gcc.target/i386/pr100865-2.c | 1 + gcc/testsuite/gcc.target/i386/pr100865-3.c | 1 + gcc/testsuite/gcc.target/i386/pr100865-4a.c | 1 + gcc/testsuite/gcc.target/i386/pr100865-4b.c | 1 + gcc/testsuite/gcc.target/i386/pr100865-5a.c | 1 + gcc/testsuite/gcc.target/i386/pr100865-5b.c | 1 + gcc/testsuite/gcc.target/i386/pr100865-6a.c | 1 + gcc/testsuite/gcc.target/i386/pr100865-6b.c | 1 + gcc/testsuite/gcc.target/i386/pr100865-6c.c | 1 + gcc/testsuite/gcc.target/i386/pr100865-7b.c | 1 + gcc/testsuite/gcc.target/i386/pr101796-1.c | 1 + gcc/testsuite/gcc.target/i386/pr101846-2.c | 1 + .../gcc.target/i386/pr101989-broadcast-1.c | 1 + gcc/testsuite/gcc.target/i386/pr102021.c | 1 + gcc/testsuite/gcc.target/i386/pr15184-1.c | 1 + gcc/testsuite/gcc.target/i386/pr15184-2.c | 1 + gcc/testsuite/gcc.target/i386/pr27971.c | 2 +- gcc/testsuite/gcc.target/i386/pr54855-3.c | 1 + gcc/testsuite/gcc.target/i386/pr54855-7.c | 1 + gcc/testsuite/gcc.target/i386/pr70263-2.c | 3 +++ gcc/testsuite/gcc.target/i386/pr70321.c | 4 +++- gcc/testsuite/gcc.target/i386/pr78035.c | 1 + gcc/testsuite/gcc.target/i386/pr81563.c | 2 +- gcc/testsuite/gcc.target/i386/pr81736-5.c | 1 + gcc/testsuite/gcc.target/i386/pr81736-7.c | 1 + gcc/testsuite/gcc.target/i386/pr84278.c | 4 +++- gcc/testsuite/gcc.target/i386/pr85620-6.c | 1 + gcc/testsuite/gcc.target/i386/pr85667-6.c | 1 + gcc/testsuite/gcc.target/i386/pr90773-17.c | 1 + gcc/testsuite/gcc.target/i386/pr90773-2.c | 5 ++++- gcc/testsuite/gcc.target/i386/pr90773-3.c | 5 ++++- gcc/testsuite/gcc.target/i386/pr93492-5.c | 1 + gcc/testsuite/gcc.target/i386/pr94913-2.c | 6 +++++- gcc/testsuite/gcc.target/i386/pr95126-m32-1.c | 9 +++++---- gcc/testsuite/gcc.target/i386/pr95126-m32-2.c | 9 +++++---- gcc/testsuite/gcc.target/i386/pr95852-2.c | 8 +++++++- gcc/testsuite/gcc.target/i386/pr95852-4.c | 8 +++++++- gcc/testsuite/gcc.target/i386/pr96539.c | 3 +++ gcc/testsuite/gcc.target/i386/stack-check-12.c | 9 +++++---- gcc/testsuite/gcc.target/i386/stack-check-17.c | 8 +++++--- gcc/testsuite/gcc.target/i386/stack-prot-sym.c | 2 ++ 78 files changed, 149 insertions(+), 58 deletions(-) diff --git a/gcc/testsuite/g++.dg/abi/anon1.C b/gcc/testsuite/g++.dg/abi/anon1.C index 0fb4ae8fe72ca..52018c317c45f 100644 --- a/gcc/testsuite/g++.dg/abi/anon1.C +++ b/gcc/testsuite/g++.dg/abi/anon1.C @@ -1,4 +1,5 @@ // PR c++/54883 +// { dg-additional-options "-fno-pie" { target ia32 } } namespace { enum E { E1 }; } void f(E e) { } diff --git a/gcc/testsuite/g++.dg/abi/anon4.C b/gcc/testsuite/g++.dg/abi/anon4.C index 8200f4bb270f9..517cc5284437b 100644 --- a/gcc/testsuite/g++.dg/abi/anon4.C +++ b/gcc/testsuite/g++.dg/abi/anon4.C @@ -1,5 +1,5 @@ // PR c++/65209 -// { dg-additional-options "-fno-pie" { target sparc*-*-* } } +// { dg-additional-options "-fno-pie" { target { ia32 || sparc*-*-* } } } // { dg-final { scan-assembler-not "comdat" } } // Everything involving the anonymous namespace bits should be private, not diff --git a/gcc/testsuite/g++.dg/cpp0x/initlist-const1.C b/gcc/testsuite/g++.dg/cpp0x/initlist-const1.C index de807316be6c1..4a690d64a594d 100644 --- a/gcc/testsuite/g++.dg/cpp0x/initlist-const1.C +++ b/gcc/testsuite/g++.dg/cpp0x/initlist-const1.C @@ -1,4 +1,6 @@ // { dg-do compile { target c++11 } } +/* PIC uses .data.rel.ro.local rather than .rodata. */ +/* { dg-additional-options "-fno-PIE" } */ #include diff --git a/gcc/testsuite/g++.dg/init/static-cdtor1.C b/gcc/testsuite/g++.dg/init/static-cdtor1.C index 343178a611409..d4d85f99c43c1 100644 --- a/gcc/testsuite/g++.dg/init/static-cdtor1.C +++ b/gcc/testsuite/g++.dg/init/static-cdtor1.C @@ -3,9 +3,11 @@ // Make sure we emit initializers in the correct order. // ctors -// { dg-final { scan-assembler {_Z41__static_initialization_and_destruction_0v:.*movl \$var1[^\n]*\n[^\n]*_ZN5LeelaC1Ev[^\n]*\n[^\n]*movl \$var2[^\n]*\n[^\n]*_ZN5LeelaC1Ev[^\n]*\n[^\n]*movl \$var3[^\n]*\n[^\n]*_ZN5LeelaC1Ev} } } +// { dg-final { scan-assembler {_Z41__static_initialization_and_destruction_0v:.*movl \$var1[^\n]*\n[^\n]*_ZN5LeelaC1Ev[^\n]*\n[^\n]*movl \$var2[^\n]*\n[^\n]*_ZN5LeelaC1Ev[^\n]*\n[^\n]*movl \$var3[^\n]*\n[^\n]*_ZN5LeelaC1Ev} { target nonpic } } } +// { dg-final { scan-assembler {_Z41__static_initialization_and_destruction_0v:.*leaq var1[^\n]*\n[^\n]*(?:|movq[^\n]*\n[^\n]*)_ZN5LeelaC1Ev[^\n]*\n[^\n]*leaq var2[^\n]*\n[^\n]*(?:|movq[^\n]*\n[^\n]*)_ZN5LeelaC1Ev[^\n]*\n[^\n]*leaq var3[^\n]*\n[^\n]*(?:|movq[^\n]*\n[^\n]*)_ZN5LeelaC1Ev} { target { ! nonpic } } } } // dtors -// { dg-final { scan-assembler {_Z41__static_initialization_and_destruction_1v:.*movl \$var3[^\n]*\n[^\n]*_ZN5LeelaD1Ev[^\n]*\n[^\n]*movl \$var2[^\n]*\n[^\n]*_ZN5LeelaD1Ev[^\n]*\n[^\n]*movl \$var1[^\n]*\n[^\n]*_ZN5LeelaD1Ev} } } +// { dg-final { scan-assembler {_Z41__static_initialization_and_destruction_1v:.*movl \$var3[^\n]*\n[^\n]*_ZN5LeelaD1Ev[^\n]*\n[^\n]*movl \$var2[^\n]*\n[^\n]*_ZN5LeelaD1Ev[^\n]*\n[^\n]*movl \$var1[^\n]*\n[^\n]*_ZN5LeelaD1Ev} { target nonpic } } } +// { dg-final { scan-assembler {_Z41__static_initialization_and_destruction_1v:.*leaq var3[^\n]*\n[^\n]*(?:|movq[^\n]*\n[^\n]*)_ZN5LeelaD1Ev[^\n]*\n[^\n]*leaq var2[^\n]*\n[^\n]*(?:|movq[^\n]*\n[^\n]*)_ZN5LeelaD1Ev[^\n]*\n[^\n]*leaq var1[^\n]*\n[^\n]*(?:|movq[^\n]*\n[^\n]*)_ZN5LeelaD1Ev} { target { ! nonpic } } } } struct Leela { Leela (); diff --git a/gcc/testsuite/g++.dg/no-stack-protector-attr-3.C b/gcc/testsuite/g++.dg/no-stack-protector-attr-3.C index 76a5ec0868145..147c2b79f780b 100644 --- a/gcc/testsuite/g++.dg/no-stack-protector-attr-3.C +++ b/gcc/testsuite/g++.dg/no-stack-protector-attr-3.C @@ -3,6 +3,7 @@ /* { dg-do compile { target i?86-*-* x86_64-*-* } } */ /* { dg-options "-O2 -fstack-protector-explicit" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ /* { dg-do compile { target { ! hppa*-*-* } } } */ diff --git a/gcc/testsuite/g++.dg/pr71694.C b/gcc/testsuite/g++.dg/pr71694.C index 5b59f879fbf95..60f246ff83ee8 100644 --- a/gcc/testsuite/g++.dg/pr71694.C +++ b/gcc/testsuite/g++.dg/pr71694.C @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -fno-store-merging" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ /* { dg-additional-options "-fno-common -mdynamic-no-pic" { target { ia32 && { x86_64-*-darwin* i?86-*-darwin* } } } } */ struct B { diff --git a/gcc/testsuite/g++.dg/stackprotectexplicit2.C b/gcc/testsuite/g++.dg/stackprotectexplicit2.C index 35d9e886ccf70..70d8df4c73de2 100644 --- a/gcc/testsuite/g++.dg/stackprotectexplicit2.C +++ b/gcc/testsuite/g++.dg/stackprotectexplicit2.C @@ -2,6 +2,7 @@ /* { dg-do compile { target i?86-*-* x86_64-*-* } } */ /* { dg-options "-O2 -fstack-protector-explicit" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ int A() { diff --git a/gcc/testsuite/gcc.dg/pr102892-1.c b/gcc/testsuite/gcc.dg/pr102892-1.c index a9302b536df6b..f08b2b84f525b 100644 --- a/gcc/testsuite/gcc.dg/pr102892-1.c +++ b/gcc/testsuite/gcc.dg/pr102892-1.c @@ -1,5 +1,6 @@ /* { dg-do link } */ /* { dg-options "-O3" } */ +/* { dg-additional-options "-fno-PIC" { target ia32 } } */ /* { dg-additional-sources "pr102892-2.c" } */ static long b[2][1] = {0}; diff --git a/gcc/testsuite/gcc.dg/sibcall-11.c b/gcc/testsuite/gcc.dg/sibcall-11.c index ae5877082363e..12f6d9c9c34ea 100644 --- a/gcc/testsuite/gcc.dg/sibcall-11.c +++ b/gcc/testsuite/gcc.dg/sibcall-11.c @@ -1,5 +1,6 @@ // Test for sibcall optimization with empty struct. // { dg-options "-O2" } +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ // { dg-final { scan-assembler "jmp" { target i?86-*-* x86_64-*-* } } } struct A { }; diff --git a/gcc/testsuite/gcc.dg/torture/builtin-self.c b/gcc/testsuite/gcc.dg/torture/builtin-self.c index 6d1719f7517d9..56188fcc468a9 100644 --- a/gcc/testsuite/gcc.dg/torture/builtin-self.c +++ b/gcc/testsuite/gcc.dg/torture/builtin-self.c @@ -1,4 +1,5 @@ /* { dg-do compile { target i?86-*-* x86_64-*-* } } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ /* Check that we can use this idiom to define out-of-line copies of built-in functions. This is used by libgcc/sync.c, for example. */ void __sync_synchronize (void) diff --git a/gcc/testsuite/gcc.target/i386/avx2-dest-false-dep-for-glc.c b/gcc/testsuite/gcc.target/i386/avx2-dest-false-dep-for-glc.c index 787b1d08f804e..fe331fe5e2c37 100644 --- a/gcc/testsuite/gcc.target/i386/avx2-dest-false-dep-for-glc.c +++ b/gcc/testsuite/gcc.target/i386/avx2-dest-false-dep-for-glc.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-mavx2 -mtune=generic -mtune-ctrl=dest_false_dep_for_glc -O2" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ #include diff --git a/gcc/testsuite/gcc.target/i386/avx512bf16-cvtsbh2ss-1.c b/gcc/testsuite/gcc.target/i386/avx512bf16-cvtsbh2ss-1.c index bf29a69a5b5ee..831abd37d8073 100644 --- a/gcc/testsuite/gcc.target/i386/avx512bf16-cvtsbh2ss-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512bf16-cvtsbh2ss-1.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-mavx512bf16 -O2" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ /* { dg-final { scan-assembler-times "sall\[ \\t\]+\[^\{\n\]*16" 1 } } */ /* { dg-final { scan-assembler-times "movl" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx512f-broadcast-pr87767-1.c b/gcc/testsuite/gcc.target/i386/avx512f-broadcast-pr87767-1.c index a2664d87f2982..0fa93e031359e 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-broadcast-pr87767-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-broadcast-pr87767-1.c @@ -1,6 +1,7 @@ /* PR target/87767 */ /* { dg-do compile } */ /* { dg-options "-O2 -mavx512f -mavx512dq" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ /* { dg-additional-options "-mdynamic-no-pic" { target { *-*-darwin* && ia32 } } } /* { dg-final { scan-assembler-times "\[^\n\]*\\\{1to8\\\}" 2 { target { ! ia32 } } } } */ /* { dg-final { scan-assembler-times "\[^\n\]*\\\{1to8\\\}" 5 { target ia32 } } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx512f-broadcast-pr87767-3.c b/gcc/testsuite/gcc.target/i386/avx512f-broadcast-pr87767-3.c index e57a5682c3111..b1a75f22daf57 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-broadcast-pr87767-3.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-broadcast-pr87767-3.c @@ -1,6 +1,7 @@ /* PR target/87767 */ /* { dg-do compile } */ /* { dg-options "-O2 -mavx512f" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ /* { dg-additional-options "-mdynamic-no-pic" { target { *-*-darwin* && ia32 } } } /* { dg-final { scan-assembler-times "\[^\n\]*\\\{1to8\\\}" 4 } } */ /* { dg-final { scan-assembler-times "\[^\n\]*\\\{1to16\\\}" 4 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx512f-broadcast-pr87767-5.c b/gcc/testsuite/gcc.target/i386/avx512f-broadcast-pr87767-5.c index 477f9ca128220..f1b672aba4db0 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-broadcast-pr87767-5.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-broadcast-pr87767-5.c @@ -1,6 +1,7 @@ /* PR target/87767 */ /* { dg-do compile } */ /* { dg-options "-O2 -mavx512f" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ /* { dg-additional-options "-mdynamic-no-pic" { target { *-*-darwin* && ia32 } } } /* { dg-final { scan-assembler-times "\[^\n\]*\\\{1to8\\\}" 4 { target ia32 } } } */ /* { dg-final { scan-assembler-times "vpbroadcastd\[\\t \]+%(?:r|e)\[^\n\]*, %zmm\[0-9\]+" 4 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx512f-broadcast-pr87767-7.c b/gcc/testsuite/gcc.target/i386/avx512f-broadcast-pr87767-7.c index 194d888093b9e..1f141d0f8061d 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-broadcast-pr87767-7.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-broadcast-pr87767-7.c @@ -1,6 +1,7 @@ /* PR target/87767 */ /* { dg-do compile } */ /* { dg-options "-O2 -mavx512f -mavx512vl" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ /* { dg-additional-options "-mdynamic-no-pic" { target { *-*-darwin* && ia32 } } } /* { dg-final { scan-assembler-times "vadd\[^\n\]*\\\{1to2\\\}" 1 } } */ /* { dg-final { scan-assembler-times "vadd\[^\n\]*\\\{1to4\\\}" 2 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-broadcast-1.c b/gcc/testsuite/gcc.target/i386/avx512fp16-broadcast-1.c index 3e2397f066f86..1e9b8f3cad6be 100644 --- a/gcc/testsuite/gcc.target/i386/avx512fp16-broadcast-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-broadcast-1.c @@ -1,6 +1,7 @@ /* PR target/87767 */ /* { dg-do compile } */ /* { dg-options "-O2 -mavx512fp16 -mavx512vl -mavx512dq" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ /* { dg-additional-options "-mdynamic-no-pic" { target { *-*-darwin* && ia32 } } } /* { dg-final { scan-assembler-times "\[^\n\]*\\\{1to8\\\}" 4 } } */ /* { dg-final { scan-assembler-times "\[^\n\]*\\\{1to16\\\}" 4 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-pr101846.c b/gcc/testsuite/gcc.target/i386/avx512fp16-pr101846.c index abd91561785c0..01571d21e3d0f 100644 --- a/gcc/testsuite/gcc.target/i386/avx512fp16-pr101846.c +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-pr101846.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-mavx512fp16 -mavx512vl -O2" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ /* { dg-final { scan-assembler-times "vpmovzxwd" "3" } } */ /* { dg-final { scan-assembler-times "vpmovdw" "3" } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2si-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2si-1a.c index f29c953572d76..7200f291b1e56 100644 --- a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2si-1a.c +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2si-1a.c @@ -1,7 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-mavx512fp16 -O2" } */ -/* { dg-final { scan-assembler-times "vcvtsh2si\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%eax" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtsh2si\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%eax" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtsh2si\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%e\[ad]x" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtsh2si\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%e\[ad]x" 1 } } */ #include diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2usi-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2usi-1a.c index 7d00867247e91..0d00803c7304b 100644 --- a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2usi-1a.c +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2usi-1a.c @@ -1,7 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-mavx512fp16 -O2" } */ -/* { dg-final { scan-assembler-times "vcvtsh2usi\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%eax" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtsh2usi\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%eax" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtsh2usi\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%e\[ad]x" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtsh2usi\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%e\[ad]x" 1 } } */ #include diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvttsh2si-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvttsh2si-1a.c index 80d84fce1534d..4fb0684d6623a 100644 --- a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvttsh2si-1a.c +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvttsh2si-1a.c @@ -1,7 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-mavx512fp16 -O2" } */ -/* { dg-final { scan-assembler-times "vcvttsh2si\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%eax" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttsh2si\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%eax" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttsh2si\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%e\[ad]x" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttsh2si\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%e\[ad]x" 1 } } */ #include diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvttsh2usi-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvttsh2usi-1a.c index 59564578a4d5f..3d408f13d0953 100644 --- a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvttsh2usi-1a.c +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvttsh2usi-1a.c @@ -1,7 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-mavx512fp16 -O2" } */ -/* { dg-final { scan-assembler-times "vcvttsh2usi\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%eax" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttsh2usi\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%eax" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttsh2usi\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%e\[ad]x" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttsh2usi\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%e\[ad]x" 1 } } */ #include diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vmovsh-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vmovsh-1a.c index e35be10fcd0ec..ba10096aa200d 100644 --- a/gcc/testsuite/gcc.target/i386/avx512fp16-vmovsh-1a.c +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vmovsh-1a.c @@ -1,8 +1,8 @@ /* { dg-do compile } */ /* { dg-options "-mavx512fp16 -O2" } */ -/* { dg-final { scan-assembler-times "vmovsh\[ \\t\]+%xmm\[0-9\]+\[^\n\r\]*%\[er\]ax+\[^\n\r]*\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmovsh\[ \\t\]+\[^\n\r\]*%\[er\]ax+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmovsh\[ \\t\]+\[^\n\r\]*%\[er\]ax+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vmovsh\[ \\t\]+%xmm\[0-9\]+\[^\n\r\]*%\[er\]\[ad]x+\[^\n\r]*\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vmovsh\[ \\t\]+\[^\n\r\]*%\[er\]\[ad]x+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vmovsh\[ \\t\]+\[^\n\r\]*%\[er\]\[ad]x+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vmovsh\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vmovsh\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^z\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vmovsh\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-broadcast-pr87767-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-broadcast-pr87767-1.c index f8eb99f0b5fe2..0304b9de3a3c3 100644 --- a/gcc/testsuite/gcc.target/i386/avx512vl-broadcast-pr87767-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512vl-broadcast-pr87767-1.c @@ -1,6 +1,7 @@ /* PR target/87767 */ /* { dg-do compile } */ /* { dg-options "-O2 -mavx512f -mavx512vl -mavx512dq" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ /* { dg-additional-options "-mdynamic-no-pic" { target { *-*-darwin* && ia32 } } } /* { dg-final { scan-assembler-times "\[^\n\]*\\\{1to2\\\}" 2 { target { ! ia32 } } } } */ /* { dg-final { scan-assembler-times "\[^\n\]*\\\{1to4\\\}" 4 { target { ! ia32 } } } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-broadcast-pr87767-3.c b/gcc/testsuite/gcc.target/i386/avx512vl-broadcast-pr87767-3.c index 3b27def147d0a..8ad8fd75b1ab3 100644 --- a/gcc/testsuite/gcc.target/i386/avx512vl-broadcast-pr87767-3.c +++ b/gcc/testsuite/gcc.target/i386/avx512vl-broadcast-pr87767-3.c @@ -1,6 +1,7 @@ /* PR target/87767 */ /* { dg-do compile } */ /* { dg-options "-O2 -mavx512f -mavx512vl" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ /* { dg-additional-options "-mdynamic-no-pic" { target { *-*-darwin* && ia32 } } } /* { dg-final { scan-assembler-times "\[^\n\]*\\\{1to2\\\}" 4 } } */ /* { dg-final { scan-assembler-times "\[^\n\]*\\\{1to4\\\}" 8 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-broadcast-pr87767-5.c b/gcc/testsuite/gcc.target/i386/avx512vl-broadcast-pr87767-5.c index 32f6ac81841c4..0ba0cd943c2c7 100644 --- a/gcc/testsuite/gcc.target/i386/avx512vl-broadcast-pr87767-5.c +++ b/gcc/testsuite/gcc.target/i386/avx512vl-broadcast-pr87767-5.c @@ -1,6 +1,7 @@ /* PR target/87767 */ /* { dg-do compile } */ /* { dg-options "-O2 -mavx512f -mavx512vl" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ /* { dg-additional-options "-mdynamic-no-pic" { target { *-*-darwin* && ia32 } } } /* { dg-final { scan-assembler-times "\[^\n\]*\\\{1to2\\\}" 4 { target ia32 } } } */ /* { dg-final { scan-assembler-times "\[^\n\]*\\\{1to4\\\}" 4 { target ia32 } } } */ diff --git a/gcc/testsuite/gcc.target/i386/cet-sjlj-6a.c b/gcc/testsuite/gcc.target/i386/cet-sjlj-6a.c index c3d0eb929424d..6cc88ad436fe0 100644 --- a/gcc/testsuite/gcc.target/i386/cet-sjlj-6a.c +++ b/gcc/testsuite/gcc.target/i386/cet-sjlj-6a.c @@ -2,10 +2,8 @@ /* { dg-require-effective-target maybe_x32 } */ /* { dg-options "-O -maddress-mode=short -fcf-protection -mx32" } */ /* { dg-final { scan-assembler-times "endbr64" 2 } } */ -/* { dg-final { scan-assembler-times "movq\t\[^\n\]*buf\\+8" 1 { target nonpic } } } */ -/* { dg-final { scan-assembler-times "movq\t\[^\n\]*8\\+buf" 1 { target { ! nonpic } } } } */ -/* { dg-final { scan-assembler-times "subq\tbuf\\+8" 1 { target nonpic } } } */ -/* { dg-final { scan-assembler-times "subq\t8\\+buf" 1 { target { ! nonpic } } } } */ +/* { dg-final { scan-assembler-times "movq\t\[^\n\]*(?:8\\+buf|buf\\+8)" 1 } } */ +/* { dg-final { scan-assembler-times "subq\t(?:8\\+buf|buf\\+8)" 1 } } */ /* { dg-final { scan-assembler-times "shrl\t\\\$3," 1 } } */ /* { dg-final { scan-assembler-times "rdsspq" 2 } } */ /* { dg-final { scan-assembler-times "incsspq" 2 } } */ diff --git a/gcc/testsuite/gcc.target/i386/cet-sjlj-6b.c b/gcc/testsuite/gcc.target/i386/cet-sjlj-6b.c index 4c52685d7d1e1..b80acfdfdf80d 100644 --- a/gcc/testsuite/gcc.target/i386/cet-sjlj-6b.c +++ b/gcc/testsuite/gcc.target/i386/cet-sjlj-6b.c @@ -2,10 +2,8 @@ /* { dg-require-effective-target maybe_x32 } */ /* { dg-options "-O -maddress-mode=long -fcf-protection -mx32" } */ /* { dg-final { scan-assembler-times "endbr64" 2 } } */ -/* { dg-final { scan-assembler-times "movq\t\[^\n\]*buf\\+16" 1 { target nonpic } } } */ -/* { dg-final { scan-assembler-times "movq\t\[^\n\]*16\\+buf" 1 { target { ! nonpic } } } } */ -/* { dg-final { scan-assembler-times "subq\tbuf\\+16" 1 { target nonpic } } } */ -/* { dg-final { scan-assembler-times "subq\t16\\+buf" 1 { target { ! nonpic } } } } */ +/* { dg-final { scan-assembler-times "movq\t\[^\n\]*(?:16\\+buf|buf\\+16)" 1 } } */ +/* { dg-final { scan-assembler-times "subq\t(?:16\\+buf|buf\\+16)" 1 } } */ /* { dg-final { scan-assembler-times "shrl\t\\\$3," 1 } } */ /* { dg-final { scan-assembler-times "rdsspq" 2 } } */ /* { dg-final { scan-assembler-times "incsspq" 2 } } */ diff --git a/gcc/testsuite/gcc.target/i386/interrupt-11.c b/gcc/testsuite/gcc.target/i386/interrupt-11.c index ded589e0cd0d7..4a119b9748afe 100644 --- a/gcc/testsuite/gcc.target/i386/interrupt-11.c +++ b/gcc/testsuite/gcc.target/i386/interrupt-11.c @@ -15,7 +15,7 @@ foo (void *frame) /* { dg-final { scan-assembler-not "kmov.\[\\t \]*\[0-9\]*\\(%\[re\]?sp\\),\[\\t \]*%k\[0-7\]+" } } */ /* { dg-final { scan-assembler-not "pushq\[\\t \]*%rbx" { target { ! ia32 } } } } */ /* { dg-final { scan-assembler-not "pushq\[\\t \]*%r1\[2-5\]+" { target { ! ia32 } } } } */ -/* { dg-final { scan-assembler-not "pushl\[\\t \]*%ebx" { target ia32 } } } */ +/* { dg-final { scan-assembler-not "pushl\[\\t \]*%ebx" { target { ia32 && nonpic } } } } */ /* { dg-final { scan-assembler-not "pushl\[\\t \]*%edi" { target ia32 } } } */ /* { dg-final { scan-assembler-not "pushl\[\\t \]*%esi" { target ia32 } } } */ /* { dg-final { scan-assembler-times "push(?:l|q)\[\\t \]*%(?:e|r)ax" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/interrupt-12.c b/gcc/testsuite/gcc.target/i386/interrupt-12.c index 078bbcf779862..4e91a27de43b3 100644 --- a/gcc/testsuite/gcc.target/i386/interrupt-12.c +++ b/gcc/testsuite/gcc.target/i386/interrupt-12.c @@ -12,7 +12,8 @@ fn1 (void *frame, uword_t error) } /* { dg-final { scan-assembler-not "movups\[\\t .\]*%(x|y|z)mm\[0-9\]+" } } */ -/* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)(b|c|d)x" } } */ +/* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)bx" { target { nonpic || { ! ia32 } } } } } */ +/* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)(c|d)x" } } */ /* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)si" } } */ /* { dg-final { scan-assembler-not "(push|pop)l\[\\t \]*%edi" { target ia32 } } } */ /* { dg-final { scan-assembler-not "(push|pop)q\[\\t \]*%rax" { target { { ! ia32 } && nonpic } } } } */ @@ -20,7 +21,8 @@ fn1 (void *frame, uword_t error) /* { dg-final { scan-assembler-times "pushl\[\\t \]*%ebp" 1 { target ia32 } } } */ /* { dg-final { scan-assembler-times "leave" 1 { target { ia32 && nonpic } } } } */ /* { dg-final { scan-assembler-times "pushl\[\\t \]*%eax" 1 { target ia32 } } } */ -/* { dg-final { scan-assembler-times "movl\[\\t \]*-4\\(%ebp\\),\[\\t \]*%eax" 1 { target ia32 } } } */ +/* { dg-final { scan-assembler-times "movl\[\\t \]*-4\\(%ebp\\),\[\\t \]*%eax" 1 { target { ia32 && nonpic } } } } */ +/* { dg-final { scan-assembler-times "popl\[\\t \]*%eax" 1 { target { ia32 && { ! nonpic } } } } } */ /* { dg-final { scan-assembler-times "pushq\[\\t \]*%rdi" 1 { target { ! ia32 } } } } */ /* { dg-final { scan-assembler-times "popq\[\\t \]*%rdi" 1 { target { ! ia32 } } } } */ /* { dg-final { scan-assembler "(addl|leal).*4.*%esp" { target ia32 } } } */ diff --git a/gcc/testsuite/gcc.target/i386/interrupt-13.c b/gcc/testsuite/gcc.target/i386/interrupt-13.c index 77ee3a510701a..4afd1b03dac2e 100644 --- a/gcc/testsuite/gcc.target/i386/interrupt-13.c +++ b/gcc/testsuite/gcc.target/i386/interrupt-13.c @@ -12,7 +12,8 @@ fn1 (void *frame, uword_t error) } /* { dg-final { scan-assembler-not "movups\[\\t .\]*%(x|y|z)mm\[0-9\]+" } } */ -/* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)(b|c|d)x" } } */ +/* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)bx" { target { nonpic || { ! ia32 } } } } } */ +/* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)(c|d)x" } } */ /* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)si" } } */ /* { dg-final { scan-assembler-not "(push|pop)l\[\\t \]*%edi" { target ia32 } } } */ /* { dg-final { scan-assembler-not "(push|pop)q\[\\t \]*%rax" { target { { ! ia32 } && nonpic } } } } */ @@ -20,7 +21,8 @@ fn1 (void *frame, uword_t error) /* { dg-final { scan-assembler-times "pushl\[\\t \]*%ebp" 1 { target ia32 } } } */ /* { dg-final { scan-assembler-times "leave" 1 { target { ia32 && nonpic } } } } */ /* { dg-final { scan-assembler-times "pushl\[\\t \]*%eax" 1 { target ia32 } } } */ -/* { dg-final { scan-assembler-times "movl\[\\t \]*-4\\(%ebp\\),\[\\t \]*%eax" 1 { target ia32 } } } */ +/* { dg-final { scan-assembler-times "movl\[\\t \]*-4\\(%ebp\\),\[\\t \]*%eax" 1 { target { ia32 && nonpic } } } } */ +/* { dg-final { scan-assembler-times "popl\[\\t \]*%eax" 1 { target { ia32 && { ! nonpic } } } } } */ /* { dg-final { scan-assembler-times "pushq\[\\t \]*%rdi" 1 { target { ! ia32 } } } } */ /* { dg-final { scan-assembler-times "popq\[\\t \]*%rdi" 1 { target { ! ia32 } } } } */ /* { dg-final { scan-assembler "(addl|leal).*4.*%esp" { target ia32 } } } */ diff --git a/gcc/testsuite/gcc.target/i386/interrupt-15.c b/gcc/testsuite/gcc.target/i386/interrupt-15.c index 2a0d260cfe6ae..f43aabc90dde6 100644 --- a/gcc/testsuite/gcc.target/i386/interrupt-15.c +++ b/gcc/testsuite/gcc.target/i386/interrupt-15.c @@ -19,7 +19,8 @@ fn2 (void *frame, uword_t error) } /* { dg-final { scan-assembler-not "movups\[\\t .\]*%(x|y|z)mm\[0-9\]+" } } */ -/* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)(b|c|d)x" } } */ +/* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)ax" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)(c|d)x" } } */ /* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)si" } } */ /* { dg-final { scan-assembler-not "(push|pop)l\[\\t \]*%edi" { target ia32 } } } */ /* { dg-final { scan-assembler-not "(push|pop)q\[\\t \]*%rax" { target { { ! ia32 } && nonpic } } } } */ @@ -27,7 +28,7 @@ fn2 (void *frame, uword_t error) /* { dg-final { scan-assembler-times "pushl\[\\t \]*%ebp" 2 { target ia32 } } } */ /* { dg-final { scan-assembler-times "leave" 2 { target { ia32 && nonpic } } } } */ /* { dg-final { scan-assembler-times "pushl\[\\t \]*%eax" 2 { target ia32 } } } */ -/* { dg-final { scan-assembler-times "movl\[\\t \]*-4\\(%ebp\\),\[\\t \]*%eax" 2 { target ia32 } } } */ +/* { dg-final { scan-assembler-times "movl\[\\t \]*-4\\(%ebp\\),\[\\t \]*%eax" 2 { target { ia32 && nonpic } } } } */ /* { dg-final { scan-assembler-times "pushq\[\\t \]*%rdi" 2 { target { ! ia32 } } } } */ /* { dg-final { scan-assembler-times "popq\[\\t \]*%rdi" 2 { target { ! ia32 } } } } */ /* { dg-final { scan-assembler "(addl|leal).*4.*%esp" { target ia32 } } } */ diff --git a/gcc/testsuite/gcc.target/i386/interrupt-16.c b/gcc/testsuite/gcc.target/i386/interrupt-16.c index bc929c657a21f..cb45ba54e3dce 100644 --- a/gcc/testsuite/gcc.target/i386/interrupt-16.c +++ b/gcc/testsuite/gcc.target/i386/interrupt-16.c @@ -12,7 +12,8 @@ foo (int i) /* { dg-final { scan-assembler-not "movups\[\\t \]*%(x|y|z)mm\[0-9\]+,\[\\t \]-*\[0-9\]*\\(%\[re\]?bp\\)" } } */ /* { dg-final { scan-assembler-not "movups\[\\t \]*-\[0-9\]*\\(%\[re\]?bp\\),\[\\t \]*%(x|y|z)mm\[0-9\]+" } } */ -/* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)(a|b|c|d)x" } } */ +/* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)bx" { target { nonpic || { ! ia32 } } } } } */ +/* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)(a|c|d)x" } } */ /* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)si" } } */ /* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)bp" } } */ /* { dg-final { scan-assembler-not "(push|pop)l\[\\t \]*%edi" { target ia32 } } } */ diff --git a/gcc/testsuite/gcc.target/i386/interrupt-17.c b/gcc/testsuite/gcc.target/i386/interrupt-17.c index 5d5b59e289097..218ed60854a91 100644 --- a/gcc/testsuite/gcc.target/i386/interrupt-17.c +++ b/gcc/testsuite/gcc.target/i386/interrupt-17.c @@ -11,7 +11,8 @@ foo (int i) } /* { dg-final { scan-assembler-not "movups\[\\t \]*%(x|y|z)mm\[0-9\]+" } } */ -/* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)(a|b|c|d)x" } } */ +/* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)bx" { target { nonpic || { ! ia32 } } } } } */ +/* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)(a|c|d)x" } } */ /* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)si" } } */ /* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)bp" } } */ /* { dg-final { scan-assembler-not "(push|pop)l\[\\t \]*%edi" { target ia32 } } } */ diff --git a/gcc/testsuite/gcc.target/i386/interrupt-8.c b/gcc/testsuite/gcc.target/i386/interrupt-8.c index 34536d135eeeb..039ccd57f88e2 100644 --- a/gcc/testsuite/gcc.target/i386/interrupt-8.c +++ b/gcc/testsuite/gcc.target/i386/interrupt-8.c @@ -15,7 +15,7 @@ foo (void *frame) /* { dg-final { scan-assembler-not "kmov.\[\\t \]*\[0-9\]*\\(%\[re\]?sp\\),\[\\t \]*%k\[0-7\]+" } } */ /* { dg-final { scan-assembler-not "pushq\[\\t \]*%rbx" { target { ! ia32 } } } } */ /* { dg-final { scan-assembler-not "pushq\[\\t \]*%r1\[2-5\]+" { target { ! ia32 } } } } */ -/* { dg-final { scan-assembler-not "pushl\[\\t \]*%ebx" { target ia32 } } } */ +/* { dg-final { scan-assembler-not "pushl\[\\t \]*%ebx" { target { ia32 && nonpic } } } } */ /* { dg-final { scan-assembler-not "pushl\[\\t \]*%e(s|d)i" { target ia32 } } } */ /* { dg-final { scan-assembler-times "push(?:l|q)\[\\t \]*%(?:e|r)ax" 1 } } */ /* { dg-final { scan-assembler-times "push(?:l|q)\[\\t \]*%(?:e|r)cx" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/pad-10.c b/gcc/testsuite/gcc.target/i386/pad-10.c index 3d003a8a8632a..ac015f222c1d0 100644 --- a/gcc/testsuite/gcc.target/i386/pad-10.c +++ b/gcc/testsuite/gcc.target/i386/pad-10.c @@ -1,7 +1,7 @@ /* { dg-do compile } */ /* { dg-skip-if "" { *-*-* } { "-march=*" } { "-march=atom" } } */ /* { dg-options "-O2 -fomit-frame-pointer -march=atom" } */ -/* { dg-final { scan-assembler-not "nop" } } */ +/* { dg-final { scan-assembler-not "nop" { target { nonpic || { ! ia32 } } } } } */ /* { dg-final { scan-assembler-not "rep" } } */ extern void bar (); diff --git a/gcc/testsuite/gcc.target/i386/pr100704-3.c b/gcc/testsuite/gcc.target/i386/pr100704-3.c index 65f9745a197f4..6f7a3e59ecff5 100644 --- a/gcc/testsuite/gcc.target/i386/pr100704-3.c +++ b/gcc/testsuite/gcc.target/i386/pr100704-3.c @@ -17,4 +17,6 @@ foo (void) bar (1, 2, 3, 4, 5, 6, foooo[0]); } -/* { dg-final { scan-assembler "push\[lq\]\tfoooo\+" } } */ +/* { dg-final { scan-assembler "push\[lq\]\tfoooo\+" { target { nonpic || { ! ia32 } } } } }*/ +/* { dg-final { scan-assembler "movl\tfoooo@GOT\\(%ebx\\), %eax" { target { ia32 && { ! nonpic } } } } } */ +/* { dg-final { scan-assembler-times "pushl\t(?:|4|8|12)\\(%eax\\)" 4 { target { ia32 && { ! nonpic } } } } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr100865-2.c b/gcc/testsuite/gcc.target/i386/pr100865-2.c index f3ea7753abe8b..090a010b719d4 100644 --- a/gcc/testsuite/gcc.target/i386/pr100865-2.c +++ b/gcc/testsuite/gcc.target/i386/pr100865-2.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -march=skylake" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ extern char *dst; diff --git a/gcc/testsuite/gcc.target/i386/pr100865-3.c b/gcc/testsuite/gcc.target/i386/pr100865-3.c index 714c43e12c9b4..cde4b1c8927b7 100644 --- a/gcc/testsuite/gcc.target/i386/pr100865-3.c +++ b/gcc/testsuite/gcc.target/i386/pr100865-3.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -march=skylake-avx512" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ extern char *dst; diff --git a/gcc/testsuite/gcc.target/i386/pr100865-4a.c b/gcc/testsuite/gcc.target/i386/pr100865-4a.c index 8609d1128b8dd..bd99945fd9dbe 100644 --- a/gcc/testsuite/gcc.target/i386/pr100865-4a.c +++ b/gcc/testsuite/gcc.target/i386/pr100865-4a.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -march=skylake -mtune-ctrl=avx256_store_by_pieces" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ extern char array[64]; diff --git a/gcc/testsuite/gcc.target/i386/pr100865-4b.c b/gcc/testsuite/gcc.target/i386/pr100865-4b.c index 6d9cb91b8e9bf..1814306d5fc31 100644 --- a/gcc/testsuite/gcc.target/i386/pr100865-4b.c +++ b/gcc/testsuite/gcc.target/i386/pr100865-4b.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -march=skylake-avx512" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ #include "pr100865-4a.c" diff --git a/gcc/testsuite/gcc.target/i386/pr100865-5a.c b/gcc/testsuite/gcc.target/i386/pr100865-5a.c index 4149797fe816b..b023fcae0ad4f 100644 --- a/gcc/testsuite/gcc.target/i386/pr100865-5a.c +++ b/gcc/testsuite/gcc.target/i386/pr100865-5a.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O3 -march=skylake" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ extern short array[64]; diff --git a/gcc/testsuite/gcc.target/i386/pr100865-5b.c b/gcc/testsuite/gcc.target/i386/pr100865-5b.c index ded41b680d351..5bccfd0de9fd5 100644 --- a/gcc/testsuite/gcc.target/i386/pr100865-5b.c +++ b/gcc/testsuite/gcc.target/i386/pr100865-5b.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O3 -march=skylake-avx512" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ #include "pr100865-5a.c" diff --git a/gcc/testsuite/gcc.target/i386/pr100865-6a.c b/gcc/testsuite/gcc.target/i386/pr100865-6a.c index 3fde549a10dc2..34951a9c96891 100644 --- a/gcc/testsuite/gcc.target/i386/pr100865-6a.c +++ b/gcc/testsuite/gcc.target/i386/pr100865-6a.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O3 -march=skylake" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ extern int array[64]; diff --git a/gcc/testsuite/gcc.target/i386/pr100865-6b.c b/gcc/testsuite/gcc.target/i386/pr100865-6b.c index 9588249cb02c7..09b0e71d9120c 100644 --- a/gcc/testsuite/gcc.target/i386/pr100865-6b.c +++ b/gcc/testsuite/gcc.target/i386/pr100865-6b.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O3 -march=skylake-avx512" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ #include "pr100865-6a.c" diff --git a/gcc/testsuite/gcc.target/i386/pr100865-6c.c b/gcc/testsuite/gcc.target/i386/pr100865-6c.c index 46d31030ce851..bab7c88d89c17 100644 --- a/gcc/testsuite/gcc.target/i386/pr100865-6c.c +++ b/gcc/testsuite/gcc.target/i386/pr100865-6c.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O3 -march=skylake -mno-avx2" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ extern int array[64]; diff --git a/gcc/testsuite/gcc.target/i386/pr100865-7b.c b/gcc/testsuite/gcc.target/i386/pr100865-7b.c index 3b20c6805213e..49f752e1f241b 100644 --- a/gcc/testsuite/gcc.target/i386/pr100865-7b.c +++ b/gcc/testsuite/gcc.target/i386/pr100865-7b.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O3 -march=skylake-avx512" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ #include "pr100865-7a.c" diff --git a/gcc/testsuite/gcc.target/i386/pr101796-1.c b/gcc/testsuite/gcc.target/i386/pr101796-1.c index 3a5f50dbedab3..b25464ddb8722 100644 --- a/gcc/testsuite/gcc.target/i386/pr101796-1.c +++ b/gcc/testsuite/gcc.target/i386/pr101796-1.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -mavx512bw" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ /* { dg-final {scan-assembler-times "vpsrlw\[ \\t\]" 1 } } */ /* { dg-final {scan-assembler-times "vpsllw\[ \\t\]" 1 } } */ /* { dg-final {scan-assembler-times "vpsraw\[ \\t\]" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr101846-2.c b/gcc/testsuite/gcc.target/i386/pr101846-2.c index 26c9ed511e565..bc2b466262dfb 100644 --- a/gcc/testsuite/gcc.target/i386/pr101846-2.c +++ b/gcc/testsuite/gcc.target/i386/pr101846-2.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-mavx512vl -mavx512vbmi -O2" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ /* { dg-final { scan-assembler-times "vpmovwb" "3" } } */ /* { dg-final { scan-assembler-times "vpmovdw" "3" } } */ /* { dg-final { scan-assembler-times "vpmovqd" "3" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr101989-broadcast-1.c b/gcc/testsuite/gcc.target/i386/pr101989-broadcast-1.c index d03d192915f6e..428c40c49dba1 100644 --- a/gcc/testsuite/gcc.target/i386/pr101989-broadcast-1.c +++ b/gcc/testsuite/gcc.target/i386/pr101989-broadcast-1.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -mavx512vl" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ /* { dg-final { scan-assembler-times "vpternlog" 4 } } */ /* { dg-final { scan-assembler-times "\\\{1to4\\\}" 4 } } */ #include diff --git a/gcc/testsuite/gcc.target/i386/pr102021.c b/gcc/testsuite/gcc.target/i386/pr102021.c index 6db3f57dc761f..a5012a4beb10c 100644 --- a/gcc/testsuite/gcc.target/i386/pr102021.c +++ b/gcc/testsuite/gcc.target/i386/pr102021.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O3 -march=skylake-avx512" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ #include diff --git a/gcc/testsuite/gcc.target/i386/pr15184-1.c b/gcc/testsuite/gcc.target/i386/pr15184-1.c index 8c19e47585250..756183de987dc 100644 --- a/gcc/testsuite/gcc.target/i386/pr15184-1.c +++ b/gcc/testsuite/gcc.target/i386/pr15184-1.c @@ -1,6 +1,7 @@ /* PR 15184 first two tests, plus two addition ones. */ /* { dg-do compile { target ia32 } } */ /* { dg-options "-O2 -march=pentiumpro" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ #define regparm __attribute__((__regparm__(1))) diff --git a/gcc/testsuite/gcc.target/i386/pr15184-2.c b/gcc/testsuite/gcc.target/i386/pr15184-2.c index a6cb9ebc24eb3..cb8201f9731f0 100644 --- a/gcc/testsuite/gcc.target/i386/pr15184-2.c +++ b/gcc/testsuite/gcc.target/i386/pr15184-2.c @@ -1,6 +1,7 @@ /* PR 15184 second two tests /* { dg-do compile { target ia32 } } */ /* { dg-options "-O2 -march=pentiumpro" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ #define regparm __attribute__((__regparm__(1))) diff --git a/gcc/testsuite/gcc.target/i386/pr27971.c b/gcc/testsuite/gcc.target/i386/pr27971.c index f80cb6502fdd1..19eb3548d87f1 100644 --- a/gcc/testsuite/gcc.target/i386/pr27971.c +++ b/gcc/testsuite/gcc.target/i386/pr27971.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -mno-tbm" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ /* { dg-additional-options "-mdynamic-no-pic" { target { *-*-darwin* && ia32 } } } */ unsigned array[4]; @@ -17,4 +18,3 @@ unsigned foo(TYPE x) /* { dg-final { scan-assembler-not "shr\[^\\n\]*2" } } */ /* { dg-final { scan-assembler "and\[^\\n\]*12" } } */ - \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/i386/pr54855-3.c b/gcc/testsuite/gcc.target/i386/pr54855-3.c index 3c15dfc93d110..a58a8ba534767 100644 --- a/gcc/testsuite/gcc.target/i386/pr54855-3.c +++ b/gcc/testsuite/gcc.target/i386/pr54855-3.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -msse2 -mfpmath=sse" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ /* { dg-final { scan-assembler-times "subsd" 1 } } */ /* { dg-final { scan-assembler-not "movapd" } } */ /* { dg-final { scan-assembler-not "movsd" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr54855-7.c b/gcc/testsuite/gcc.target/i386/pr54855-7.c index a551bd5c92f9e..d9ef66a3b44ac 100644 --- a/gcc/testsuite/gcc.target/i386/pr54855-7.c +++ b/gcc/testsuite/gcc.target/i386/pr54855-7.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -msse -mfpmath=sse" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ /* { dg-final { scan-assembler-times "divss" 1 } } */ /* { dg-final { scan-assembler-not "movaps" } } */ /* { dg-final { scan-assembler-not "movss" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr70263-2.c b/gcc/testsuite/gcc.target/i386/pr70263-2.c index 19f79fd0e3673..20447ede517c6 100644 --- a/gcc/testsuite/gcc.target/i386/pr70263-2.c +++ b/gcc/testsuite/gcc.target/i386/pr70263-2.c @@ -1,5 +1,8 @@ /* { dg-do compile } */ /* { dg-options "-O2 -fdump-rtl-ira" } */ +/* ia32 PIC prevents tail-calling, which forces bar's arg to be pushed, which + drops the equivalence. */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ /* { dg-final { scan-rtl-dump "Adding REG_EQUIV to insn \[0-9\]+ for source of insn \[0-9\]+" "ira" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr70321.c b/gcc/testsuite/gcc.target/i386/pr70321.c index eaba7285ccf65..57552efe7a279 100644 --- a/gcc/testsuite/gcc.target/i386/pr70321.c +++ b/gcc/testsuite/gcc.target/i386/pr70321.c @@ -7,4 +7,6 @@ void foo (long long ixi) __builtin_abort (); } -/* { dg-final { scan-assembler-times "mov" 1 } } */ +/* { dg-final { scan-assembler-times "mov" 1 { target nonpic } } } */ +/* get_pc_thunk adds an extra mov insn. */ +/* { dg-final { scan-assembler-times "mov" 2 { target { ! nonpic } } } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr78035.c b/gcc/testsuite/gcc.target/i386/pr78035.c index 2e673a8ce2d7c..7d3a983b2188f 100644 --- a/gcc/testsuite/gcc.target/i386/pr78035.c +++ b/gcc/testsuite/gcc.target/i386/pr78035.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ extern int a; extern int b; diff --git a/gcc/testsuite/gcc.target/i386/pr81563.c b/gcc/testsuite/gcc.target/i386/pr81563.c index f0efcf9134014..3d3f95944b8dd 100644 --- a/gcc/testsuite/gcc.target/i386/pr81563.c +++ b/gcc/testsuite/gcc.target/i386/pr81563.c @@ -10,4 +10,4 @@ fn1 (long long int x) return x; } -/* { dg-final { scan-assembler-not "movl\[ \\t\]+\[0-9]*\\(%esp\\)" } } */ +/* { dg-final { scan-assembler-not "movl\[ \\t\]+\[0-9]+\\(%esp\\)" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr81736-5.c b/gcc/testsuite/gcc.target/i386/pr81736-5.c index e1602cf25ba9f..0dcf17b98a2a6 100644 --- a/gcc/testsuite/gcc.target/i386/pr81736-5.c +++ b/gcc/testsuite/gcc.target/i386/pr81736-5.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -fno-omit-frame-pointer -mavx" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ typedef int v8si __attribute__ ((vector_size (32))); diff --git a/gcc/testsuite/gcc.target/i386/pr81736-7.c b/gcc/testsuite/gcc.target/i386/pr81736-7.c index f947886e64273..95b380d238b2e 100644 --- a/gcc/testsuite/gcc.target/i386/pr81736-7.c +++ b/gcc/testsuite/gcc.target/i386/pr81736-7.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -fno-omit-frame-pointer" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ extern int foo (void); diff --git a/gcc/testsuite/gcc.target/i386/pr84278.c b/gcc/testsuite/gcc.target/i386/pr84278.c index d100dff198455..2fa84802c6790 100644 --- a/gcc/testsuite/gcc.target/i386/pr84278.c +++ b/gcc/testsuite/gcc.target/i386/pr84278.c @@ -15,4 +15,6 @@ void foo(void) } } -/* { dg-final { scan-assembler-not "\\\(%.sp\\\)" } } */ +/* { dg-final { scan-assembler-not "\\\(%.sp\\\)" { target { nonpic || { ! ia32 } } } } } */ +/* ia32's get_pc_thunk variants all load from %(esp). */ +/* { dg-final { scan-assembler-times "movl\[ \t]*\\\(%.sp\\\)" 1 { target { ! { nonpic || { ! ia32 } } } } } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr85620-6.c b/gcc/testsuite/gcc.target/i386/pr85620-6.c index 0b6a64e8454b8..4f04ba0e49141 100644 --- a/gcc/testsuite/gcc.target/i386/pr85620-6.c +++ b/gcc/testsuite/gcc.target/i386/pr85620-6.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -fcf-protection" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ /* { dg-final { scan-assembler "jmp" } } */ struct ucontext; diff --git a/gcc/testsuite/gcc.target/i386/pr85667-6.c b/gcc/testsuite/gcc.target/i386/pr85667-6.c index 5d2c66e7f97ce..06570dd64608f 100644 --- a/gcc/testsuite/gcc.target/i386/pr85667-6.c +++ b/gcc/testsuite/gcc.target/i386/pr85667-6.c @@ -1,5 +1,6 @@ /* { dg-do compile { target ia32 } } */ /* { dg-options "-O2" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ /* { dg-final { scan-assembler-times "movl\[^\n\r]*, %eax" 1 } } */ /* { dg-final { scan-assembler-times "flds\[^\n\r]*" 1 } } */ typedef struct diff --git a/gcc/testsuite/gcc.target/i386/pr90773-17.c b/gcc/testsuite/gcc.target/i386/pr90773-17.c index 570748366f87a..3036085b7bf77 100644 --- a/gcc/testsuite/gcc.target/i386/pr90773-17.c +++ b/gcc/testsuite/gcc.target/i386/pr90773-17.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -march=skylake-avx512" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ extern char *dst; diff --git a/gcc/testsuite/gcc.target/i386/pr90773-2.c b/gcc/testsuite/gcc.target/i386/pr90773-2.c index 64495751b4640..b5373ca8c0d6a 100644 --- a/gcc/testsuite/gcc.target/i386/pr90773-2.c +++ b/gcc/testsuite/gcc.target/i386/pr90773-2.c @@ -13,7 +13,10 @@ foo (void) /* { dg-final { scan-assembler-times "movdqu\[\\t \]+\\(%\[\^,\]+\\)," 1 { target { ! ia32 } } } } */ /* { dg-final { scan-assembler-times "movl\[\\t \]+15\\(%\[\^,\]+\\)," 1 { target { ! ia32 } } } } */ -/* { dg-final { scan-assembler-times "movl\[\\t \]+\\(%\[\^,\]+\\)," 1 { target ia32 } } } */ +/* PIC gets one extra match in get_pc_thunk, and two extra matches to load + dst's and src's values after loading their addresses from the GOT. */ +/* { dg-final { scan-assembler-times "movl\[\\t \]+\\(%\[\^,\]+\\)," 1 { target { ia32 && nonpic } } } } */ +/* { dg-final { scan-assembler-times "movl\[\\t \]+\\(%\[\^,\]+\\)," 4 { target { ia32 && { ! nonpic } } } } } */ /* { dg-final { scan-assembler-times "movl\[\\t \]+4\\(%\[\^,\]+\\)," 1 { target ia32 } } } */ /* { dg-final { scan-assembler-times "movl\[\\t \]+8\\(%\[\^,\]+\\)," 1 { target ia32 } } } */ /* { dg-final { scan-assembler-times "movl\[\\t \]+12\\(%\[\^,\]+\\)," 1 { target ia32 } } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr90773-3.c b/gcc/testsuite/gcc.target/i386/pr90773-3.c index 84747c9465256..dd2430f0bbbf7 100644 --- a/gcc/testsuite/gcc.target/i386/pr90773-3.c +++ b/gcc/testsuite/gcc.target/i386/pr90773-3.c @@ -13,7 +13,10 @@ foo (void) /* { dg-final { scan-assembler-times "movdqu\[\\t \]+\\(%\[\^,\]+\\)," 1 { target { ! ia32 } } } } */ /* { dg-final { scan-assembler-times "movdqu\[\\t \]+15\\(%\[\^,\]+\\)," 1 { target { ! ia32 } } } } */ -/* { dg-final { scan-assembler-times "movl\[\\t \]+\\(%\[\^,\]+\\)," 1 { target ia32 } } } */ +/* PIC gets one extra match in get_pc_thunk, and two extra matches to load + dst's and src's values after loading their addresses from the GOT. */ +/* { dg-final { scan-assembler-times "movl\[\\t \]+\\(%\[\^,\]+\\)," 1 { target { ia32 && nonpic } } } } */ +/* { dg-final { scan-assembler-times "movl\[\\t \]+\\(%\[\^,\]+\\)," 4 { target { ia32 && { ! nonpic } } } } } */ /* { dg-final { scan-assembler-times "movl\[\\t \]+4\\(%\[\^,\]+\\)," 1 { target ia32 } } } */ /* { dg-final { scan-assembler-times "movl\[\\t \]+8\\(%\[\^,\]+\\)," 1 { target ia32 } } } */ /* { dg-final { scan-assembler-times "movl\[\\t \]+12\\(%\[\^,\]+\\)," 1 { target ia32 } } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr93492-5.c b/gcc/testsuite/gcc.target/i386/pr93492-5.c index 5aebb3847f5be..1ca5ba1fac16c 100644 --- a/gcc/testsuite/gcc.target/i386/pr93492-5.c +++ b/gcc/testsuite/gcc.target/i386/pr93492-5.c @@ -1,5 +1,6 @@ /* { dg-do "compile" { target *-*-linux* } } */ /* { dg-options "-O1 -fpatchable-function-entry=1 -mfentry -pg -fasynchronous-unwind-tables" } */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ /* Test the placement of the .LPFE1 label. */ diff --git a/gcc/testsuite/gcc.target/i386/pr94913-2.c b/gcc/testsuite/gcc.target/i386/pr94913-2.c index 22bca2bf27b66..199f3fe7a0168 100644 --- a/gcc/testsuite/gcc.target/i386/pr94913-2.c +++ b/gcc/testsuite/gcc.target/i386/pr94913-2.c @@ -21,4 +21,8 @@ void fooi (unsigned long x, unsigned long y) } /* { dg-final { scan-assembler-not "cmp" } } */ -/* { dg-final { scan-assembler-times "add" 3 } } */ +/* On IA32, PIC adds one add per function to compute the PIC register, and + another add to adjust %esp in the epilogue needed to restore the PIC + register. */ +/* { dg-final { scan-assembler-times "add" 3 { target { ! { ia32 && { ! nonpic } } } } } } */ +/* { dg-final { scan-assembler-times "add" 9 { target { ia32 && { ! nonpic } } } } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr95126-m32-1.c b/gcc/testsuite/gcc.target/i386/pr95126-m32-1.c index 1d6acd66df66e..9dfe15d7efe37 100644 --- a/gcc/testsuite/gcc.target/i386/pr95126-m32-1.c +++ b/gcc/testsuite/gcc.target/i386/pr95126-m32-1.c @@ -10,7 +10,8 @@ void call_func(void) func(s); } -/* { dg-final { scan-assembler "movl\[ \\t]*\\\$" } } */ -/* { dg-final { scan-assembler "movb\[ \\t]*\\\$0, " } } */ -/* { dg-final { scan-assembler-not "movzwl" } } */ - +/* The @GOTOFF addressing seems to prevent the optimization of the loads to + known constants. */ +/* { dg-final { scan-assembler "movl\[ \\t]*\\\$" { xfail { ! nonpic } } } } */ +/* { dg-final { scan-assembler "movb\[ \\t]*\\\$0, " { xfail { ! nonpic } } } } */ +/* { dg-final { scan-assembler-not "movzwl" { xfail { ! nonpic } } } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr95126-m32-2.c b/gcc/testsuite/gcc.target/i386/pr95126-m32-2.c index b46be9d112bc9..f4d9123a76800 100644 --- a/gcc/testsuite/gcc.target/i386/pr95126-m32-2.c +++ b/gcc/testsuite/gcc.target/i386/pr95126-m32-2.c @@ -10,7 +10,8 @@ void call_func(void) func(s); } -/* { dg-final { scan-assembler "movl\[ \\t]*\\\$" } } */ -/* { dg-final { scan-assembler "movb\[ \\t]*\\\$0, " } } */ -/* { dg-final { scan-assembler-not "movzwl" } } */ - +/* The @GOTOFF addressing seems to prevent the optimization of the loads to + known constants. */ +/* { dg-final { scan-assembler "movl\[ \\t]*\\\$" { xfail { ! nonpic } } } } */ +/* { dg-final { scan-assembler "movb\[ \\t]*\\\$0, " { xfail { ! nonpic } } } } */ +/* { dg-final { scan-assembler-not "movzwl" { xfail { ! nonpic } } } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr95852-2.c b/gcc/testsuite/gcc.target/i386/pr95852-2.c index de85cecfe15e5..558308fee1fe3 100644 --- a/gcc/testsuite/gcc.target/i386/pr95852-2.c +++ b/gcc/testsuite/gcc.target/i386/pr95852-2.c @@ -3,7 +3,13 @@ /* { dg-options "-O2 -fdump-tree-optimized -masm=att" } */ /* { dg-final { scan-tree-dump-times " = \.MUL_OVERFLOW " 32 "optimized" } } */ /* { dg-final { scan-assembler-times "\tmull\t" 32 } } */ -/* { dg-final { scan-assembler-times "\tseto\t" 8 } } */ +/* In functions that return 0 on non-overflow (f2, f10, f18, f26), the overflow + flag is propagated to the return value's PHI node in the non-call path; on + ia32 PIC, sibcalls are not viable, so the known value of the flag can't be + propagated to the return block, that is only duplicated in bbro, too late + for fwprop2 or even cprop_hardreg. */ +/* { dg-final { scan-assembler-times "\tseto\t" 12 { target { ia32 && { ! nonpic } } } } } */ +/* { dg-final { scan-assembler-times "\tseto\t" 8 { target { nonpic || { ! ia32 } } } } } */ /* { dg-final { scan-assembler-times "\tsetno\t" 8 } } */ /* { dg-final { scan-assembler-times "\tjn\?o\t" 16 } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr95852-4.c b/gcc/testsuite/gcc.target/i386/pr95852-4.c index f8b46564baa39..cb48b61121e5d 100644 --- a/gcc/testsuite/gcc.target/i386/pr95852-4.c +++ b/gcc/testsuite/gcc.target/i386/pr95852-4.c @@ -3,7 +3,13 @@ /* { dg-options "-O2 -fdump-tree-optimized -masm=att" } */ /* { dg-final { scan-tree-dump-times " = \.MUL_OVERFLOW " 32 "optimized" } } */ /* { dg-final { scan-assembler-times "\timull\t" 32 } } */ -/* { dg-final { scan-assembler-times "\tseto\t" 8 } } */ +/* In functions that return 0 on non-overflow (f2, f10, f18, f26), the overflow + flag is propagated to the return value's PHI node in the non-call path; on + ia32 PIC, sibcalls are not viable, so the known value of the flag can't be + propagated to the return block, that is only duplicated in bbro, too late + for fwprop2 or even cprop_hardreg. */ +/* { dg-final { scan-assembler-times "\tseto\t" 12 { target { ia32 && { ! nonpic } } } } } */ +/* { dg-final { scan-assembler-times "\tseto\t" 8 { target { nonpic || { ! ia32 } } } } } */ /* { dg-final { scan-assembler-times "\tsetno\t" 8 } } */ /* { dg-final { scan-assembler-times "\tjn\?o\t" 16 } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr96539.c b/gcc/testsuite/gcc.target/i386/pr96539.c index fc164f8b88985..696929be0af2d 100644 --- a/gcc/testsuite/gcc.target/i386/pr96539.c +++ b/gcc/testsuite/gcc.target/i386/pr96539.c @@ -1,6 +1,9 @@ /* PR rtl-optimization/96539 */ /* { dg-do compile } * /* { dg-options "-Os" } */ +/* The need to restore the PIC register prevents PLT tail-calls on ia32, + so S has to be copied to call baz. */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ /* { dg-final { scan-assembler-not "rep\[^\n\r]\*movs" } } */ struct A { int a, b, c, d, e, f; void *g, *h, *i, *j, *k, *l, *m; }; diff --git a/gcc/testsuite/gcc.target/i386/stack-check-12.c b/gcc/testsuite/gcc.target/i386/stack-check-12.c index 74d3a26cad1f2..aa9c233e74992 100644 --- a/gcc/testsuite/gcc.target/i386/stack-check-12.c +++ b/gcc/testsuite/gcc.target/i386/stack-check-12.c @@ -11,8 +11,9 @@ f (void) } /* { dg-final { scan-assembler-not "or\[ql\]" } } */ -/* { dg-final { scan-assembler "pushl %esi" { target ia32 } } } */ -/* { dg-final { scan-assembler "popl %esi" { target ia32 } } }*/ +/* On ia32 PIC, saving the PIC register requires a stack frame, which does away + with the need for the dummy %esi pushing and popping for stack probing. */ +/* { dg-final { scan-assembler "pushl %esi" { target { ia32 && nonpic } } } } */ +/* { dg-final { scan-assembler "popl %esi" { target { ia32 && nonpic } } } } */ /* { dg-final { scan-assembler "pushq %rax" { target { ! ia32 } } } } */ -/* { dg-final { scan-assembler "popq %rax" { target { ! ia32 } } } }*/ - +/* { dg-final { scan-assembler "popq %rax" { target { ! ia32 } } } } */ diff --git a/gcc/testsuite/gcc.target/i386/stack-check-17.c b/gcc/testsuite/gcc.target/i386/stack-check-17.c index 25ae97740614e..b3e41cb3d2556 100644 --- a/gcc/testsuite/gcc.target/i386/stack-check-17.c +++ b/gcc/testsuite/gcc.target/i386/stack-check-17.c @@ -31,9 +31,11 @@ f3 (void) into either a stack slot or callee saved register. The former would be rather dumb. So assume it does not happen. - So search for two/four pushes for the callee register saves/argument - pushes and no pops (since the function has no reachable epilogue). */ + So search for two/four pushes for the callee register saves/argument pushes + (plus one for the PIC register if needed on ia32) and no pops (since the + function has no reachable epilogue). */ /* { dg-final { scan-assembler-times "push\[ql\]" 2 { target { ! ia32 } } } } */ -/* { dg-final { scan-assembler-times "push\[ql\]" 4 { target { ia32 } } } } */ +/* { dg-final { scan-assembler-times "push\[ql\]" 4 { target { ia32 && nonpic } } } } */ +/* { dg-final { scan-assembler-times "push\[ql\]" 5 { target { ia32 && { ! nonpic } } } } } */ /* { dg-final { scan-assembler-not "pop" } } */ diff --git a/gcc/testsuite/gcc.target/i386/stack-prot-sym.c b/gcc/testsuite/gcc.target/i386/stack-prot-sym.c index dcd7cbd38be38..81790f63753f1 100644 --- a/gcc/testsuite/gcc.target/i386/stack-prot-sym.c +++ b/gcc/testsuite/gcc.target/i386/stack-prot-sym.c @@ -1,6 +1,8 @@ /* { dg-do compile } */ /* { dg-require-effective-target tls_native } */ /* { dg-options "-O2 -fstack-protector-all -mstack-protector-guard=tls -mstack-protector-guard-reg=gs -mstack-protector-guard-symbol=my_guard" } */ +/* We don't expect GOT relocations; should we? */ +/* { dg-additional-options "-fno-PIE" { target ia32 } } */ void f(void) { } -- Alexandre Oliva, happy hacker https://FSFLA.org/blogs/lxo/ Free Software Activist GNU Toolchain Engineer Disinformation flourishes because many people care deeply about injustice but very few check the facts. Ask me about