From: Alexandre Oliva <oliva@adacore.com>
To: Richard Biener <richard.guenther@gmail.com>
Cc: Alexandre Oliva via Gcc-patches <gcc-patches@gcc.gnu.org>
Subject: Re: [PATCH] hardened conditionals
Date: Tue, 12 Oct 2021 03:35:08 -0300 [thread overview]
Message-ID: <orsfx6lpib.fsf@lxoliva.fsfla.org> (raw)
In-Reply-To: <42A19672-C6EF-4C2F-A826-4CB9EE388B95@gmail.com> (Richard Biener's message of "Sat, 09 Oct 2021 08:42:16 +0200")
On Oct 9, 2021, Richard Biener <richard.guenther@gmail.com> wrote:
> Why two passes (and two IL traverses?)
Different traversals, no reason to force them into a single pass. One
only looks at the last stmt of each block, where cond stmts may be,
while the other has to look at every stmt.
> How do you prevent RTL optimizers (jump threading) from removing the
> redundant tests?
The trick I'm using to copy of a value without the compiler's knowing
it's still the same value is 'asm ("" : "=g" (alt) : "0" (src));'
I've pondered introducing __builtin_hidden_copy or somesuch, but it
didn't seem worth it.
> I'd have expected such hardening to occur very late in the RTL
> pipeline.
Yeah, that would be another way to do it, but then it would have to be a
lot trickier, given all the different ways in which compare-and-branch
can be expressed in RTL.
--
Alexandre Oliva, happy hacker https://FSFLA.org/blogs/lxo/
Free Software Activist GNU Toolchain Engineer
Disinformation flourishes because many people care deeply about injustice
but very few check the facts. Ask me about <https://stallmansupport.org>
next prev parent reply other threads:[~2021-10-12 6:36 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-09 3:30 Alexandre Oliva
2021-10-09 6:42 ` Richard Biener
2021-10-12 6:35 ` Alexandre Oliva [this message]
2021-10-12 12:23 ` Richard Biener
2021-10-13 18:54 ` Alexandre Oliva
2021-10-14 7:49 ` Richard Biener
2021-10-15 18:35 ` Alexandre Oliva
2021-10-18 9:17 ` Richard Biener
2021-10-20 8:50 ` Alexandre Oliva
2021-10-22 2:19 ` Alexandre Oliva
2021-10-26 8:21 ` Richard Biener
2021-10-28 4:04 ` Alexandre Oliva
2021-10-30 9:44 ` Alexandre Oliva
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